Lines Matching refs:var16
14 @var16 = global i16 0
45 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
46 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
50 %old = atomicrmw add i16* @var16, i16 %offset seq_cst
52 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
53 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
169 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
170 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
174 %old = atomicrmw or i16* @var16, i16 %offset seq_cst
176 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
177 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
293 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
294 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
298 %old = atomicrmw xor i16* @var16, i16 %offset seq_cst
300 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
301 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
423 ; OUTLINE-ATOMICS-NEXT: adrp x9, var16
424 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
436 %old = atomicrmw min i16* @var16, i16 %offset seq_cst
438 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
439 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
582 ; OUTLINE-ATOMICS-NEXT: adrp x9, var16
583 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
594 %old = atomicrmw umin i16* @var16, i16 %offset seq_cst
596 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
597 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
741 ; OUTLINE-ATOMICS-NEXT: adrp x9, var16
742 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
754 %old = atomicrmw max i16* @var16, i16 %offset seq_cst
756 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
757 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
900 ; OUTLINE-ATOMICS-NEXT: adrp x9, var16
901 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
912 %old = atomicrmw umax i16* @var16, i16 %offset seq_cst
914 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
915 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
1053 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
1054 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
1058 %old = atomicrmw xchg i16* @var16, i16 %offset seq_cst
1060 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
1061 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
1207 ; OUTLINE-ATOMICS-NEXT: adrp x2, var16
1208 ; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var16
1212 %pair = cmpxchg i16* @var16, i16 %wanted, i16 %new acquire acquire
1216 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
1217 ; CHECK-NEXT: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
1230 ; OUTLINE-ATOMICS-NEXT: adrp x2, var16
1231 ; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var16
1237 %pair = cmpxchg i16* @var16, i16 %wanted, i16 %new acquire acquire
1241 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
1242 ; CHECK-NEXT: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
1350 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
1351 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
1355 %old = atomicrmw sub i16* @var16, i16 %offset seq_cst
1358 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
1359 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
1487 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
1488 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
1493 %old = atomicrmw sub i16* @var16, i16 -1 seq_cst
1496 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
1497 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
1578 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
1579 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
1584 %old = atomicrmw sub i16* @var16, i16 %neg seq_cst
1587 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
1588 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
1667 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
1668 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
1672 %old = atomicrmw and i16* @var16, i16 %offset seq_cst
1675 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
1676 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
1753 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
1754 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
1759 %old = atomicrmw and i16* @var16, i16 -2 seq_cst
1761 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
1762 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
1836 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
1837 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
1842 %old = atomicrmw and i16* @var16, i16 %inv seq_cst
1844 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
1845 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
1961 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
1962 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
1966 %old = atomicrmw add i16* @var16, i16 %offset acq_rel
1968 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
1969 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
2085 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
2086 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
2090 %old = atomicrmw add i16* @var16, i16 %offset acquire
2092 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
2093 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
2209 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
2210 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
2214 %old = atomicrmw add i16* @var16, i16 %offset monotonic
2216 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
2217 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
2333 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
2334 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
2338 %old = atomicrmw add i16* @var16, i16 %offset release
2340 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
2341 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
2457 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
2458 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
2462 %old = atomicrmw add i16* @var16, i16 %offset seq_cst
2464 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
2465 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
2583 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
2584 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
2588 %old = atomicrmw and i16* @var16, i16 %offset acq_rel
2591 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
2592 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
2715 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
2716 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
2720 %old = atomicrmw and i16* @var16, i16 %offset acquire
2723 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
2724 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
2847 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
2848 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
2852 %old = atomicrmw and i16* @var16, i16 %offset monotonic
2855 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
2856 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
2979 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
2980 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
2984 %old = atomicrmw and i16* @var16, i16 %offset release
2987 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
2988 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
3111 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
3112 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
3116 %old = atomicrmw and i16* @var16, i16 %offset seq_cst
3119 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
3120 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
3243 ; OUTLINE-ATOMICS-NEXT: adrp x2, var16
3244 ; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var16
3248 %pair = cmpxchg i16* @var16, i16 %wanted, i16 %new acquire acquire
3252 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
3253 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
3358 ; OUTLINE-ATOMICS-NEXT: adrp x2, var16
3359 ; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var16
3363 %pair = cmpxchg i16* @var16, i16 %wanted, i16 %new monotonic monotonic
3367 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
3368 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
3473 ; OUTLINE-ATOMICS-NEXT: adrp x2, var16
3474 ; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var16
3478 %pair = cmpxchg i16* @var16, i16 %wanted, i16 %new seq_cst seq_cst
3482 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
3483 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
3592 ; OUTLINE-ATOMICS-NEXT: adrp x9, var16
3593 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
3605 %old = atomicrmw max i16* @var16, i16 %offset acq_rel
3607 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
3608 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
3752 ; OUTLINE-ATOMICS-NEXT: adrp x9, var16
3753 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
3765 %old = atomicrmw max i16* @var16, i16 %offset acquire
3767 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
3768 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
3912 ; OUTLINE-ATOMICS-NEXT: adrp x9, var16
3913 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
3925 %old = atomicrmw max i16* @var16, i16 %offset monotonic
3927 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
3928 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
4072 ; OUTLINE-ATOMICS-NEXT: adrp x9, var16
4073 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
4085 %old = atomicrmw max i16* @var16, i16 %offset release
4087 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
4088 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
4232 ; OUTLINE-ATOMICS-NEXT: adrp x9, var16
4233 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
4245 %old = atomicrmw max i16* @var16, i16 %offset seq_cst
4247 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
4248 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
4392 ; OUTLINE-ATOMICS-NEXT: adrp x9, var16
4393 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
4405 %old = atomicrmw min i16* @var16, i16 %offset acq_rel
4407 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
4408 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
4552 ; OUTLINE-ATOMICS-NEXT: adrp x9, var16
4553 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
4565 %old = atomicrmw min i16* @var16, i16 %offset acquire
4567 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
4568 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
4712 ; OUTLINE-ATOMICS-NEXT: adrp x9, var16
4713 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
4725 %old = atomicrmw min i16* @var16, i16 %offset monotonic
4727 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
4728 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
4872 ; OUTLINE-ATOMICS-NEXT: adrp x9, var16
4873 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
4885 %old = atomicrmw min i16* @var16, i16 %offset release
4887 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
4888 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
5032 ; OUTLINE-ATOMICS-NEXT: adrp x9, var16
5033 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
5045 %old = atomicrmw min i16* @var16, i16 %offset seq_cst
5047 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
5048 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
5186 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
5187 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
5191 %old = atomicrmw or i16* @var16, i16 %offset acq_rel
5193 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
5194 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
5310 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
5311 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
5315 %old = atomicrmw or i16* @var16, i16 %offset acquire
5317 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
5318 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
5434 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
5435 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
5439 %old = atomicrmw or i16* @var16, i16 %offset monotonic
5441 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
5442 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
5558 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
5559 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
5563 %old = atomicrmw or i16* @var16, i16 %offset release
5565 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
5566 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
5682 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
5683 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
5687 %old = atomicrmw or i16* @var16, i16 %offset seq_cst
5689 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
5690 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
5809 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
5810 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
5814 %old = atomicrmw sub i16* @var16, i16 %offset acq_rel
5817 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
5818 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
5947 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
5948 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
5952 %old = atomicrmw sub i16* @var16, i16 %offset acquire
5955 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
5956 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
6085 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
6086 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
6090 %old = atomicrmw sub i16* @var16, i16 %offset monotonic
6093 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
6094 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
6223 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
6224 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
6228 %old = atomicrmw sub i16* @var16, i16 %offset release
6231 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
6232 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
6361 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
6362 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
6366 %old = atomicrmw sub i16* @var16, i16 %offset seq_cst
6369 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
6370 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
6496 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
6497 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
6501 %old = atomicrmw xchg i16* @var16, i16 %offset acq_rel
6503 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
6504 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
6622 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
6623 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
6627 %old = atomicrmw xchg i16* @var16, i16 %offset acquire
6629 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
6630 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
6748 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
6749 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
6753 %old = atomicrmw xchg i16* @var16, i16 %offset monotonic
6755 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
6756 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
6874 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
6875 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
6879 %old = atomicrmw xchg i16* @var16, i16 %offset release
6881 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
6882 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
7000 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
7001 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
7005 %old = atomicrmw xchg i16* @var16, i16 %offset seq_cst
7007 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
7008 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
7131 ; OUTLINE-ATOMICS-NEXT: adrp x9, var16
7132 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
7143 %old = atomicrmw umax i16* @var16, i16 %offset acq_rel
7145 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
7146 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
7289 ; OUTLINE-ATOMICS-NEXT: adrp x9, var16
7290 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
7301 %old = atomicrmw umax i16* @var16, i16 %offset acquire
7303 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
7304 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
7447 ; OUTLINE-ATOMICS-NEXT: adrp x9, var16
7448 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
7459 %old = atomicrmw umax i16* @var16, i16 %offset monotonic
7461 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
7462 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
7605 ; OUTLINE-ATOMICS-NEXT: adrp x9, var16
7606 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
7617 %old = atomicrmw umax i16* @var16, i16 %offset release
7619 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
7620 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
7763 ; OUTLINE-ATOMICS-NEXT: adrp x9, var16
7764 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
7775 %old = atomicrmw umax i16* @var16, i16 %offset seq_cst
7777 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
7778 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
7921 ; OUTLINE-ATOMICS-NEXT: adrp x9, var16
7922 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
7933 %old = atomicrmw umin i16* @var16, i16 %offset acq_rel
7935 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
7936 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
8079 ; OUTLINE-ATOMICS-NEXT: adrp x9, var16
8080 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
8091 %old = atomicrmw umin i16* @var16, i16 %offset acquire
8093 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
8094 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
8237 ; OUTLINE-ATOMICS-NEXT: adrp x9, var16
8238 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
8249 %old = atomicrmw umin i16* @var16, i16 %offset monotonic
8251 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
8252 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
8395 ; OUTLINE-ATOMICS-NEXT: adrp x9, var16
8396 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
8407 %old = atomicrmw umin i16* @var16, i16 %offset release
8409 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
8410 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
8553 ; OUTLINE-ATOMICS-NEXT: adrp x9, var16
8554 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
8565 %old = atomicrmw umin i16* @var16, i16 %offset seq_cst
8567 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
8568 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
8706 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
8707 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
8711 %old = atomicrmw xor i16* @var16, i16 %offset acq_rel
8713 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
8714 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
8830 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
8831 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
8835 %old = atomicrmw xor i16* @var16, i16 %offset acquire
8837 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
8838 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
8954 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
8955 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
8959 %old = atomicrmw xor i16* @var16, i16 %offset monotonic
8961 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
8962 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
9078 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
9079 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
9083 %old = atomicrmw xor i16* @var16, i16 %offset release
9085 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
9086 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
9202 ; OUTLINE-ATOMICS-NEXT: adrp x1, var16
9203 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
9207 %old = atomicrmw xor i16* @var16, i16 %offset seq_cst
9209 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
9210 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16