Lines Matching refs:var8
13 @var8 = global i8 0
24 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
25 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
29 %old = atomicrmw add i8* @var8, i8 %offset seq_cst
31 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
32 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
148 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
149 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
153 %old = atomicrmw or i8* @var8, i8 %offset seq_cst
155 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
156 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
272 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
273 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
277 %old = atomicrmw xor i8* @var8, i8 %offset seq_cst
279 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
280 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
395 ; OUTLINE-ATOMICS-NEXT: adrp x9, var8
396 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
408 %old = atomicrmw min i8* @var8, i8 %offset seq_cst
410 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
411 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
555 ; OUTLINE-ATOMICS-NEXT: adrp x9, var8
556 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
567 %old = atomicrmw umin i8* @var8, i8 %offset seq_cst
569 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
570 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
713 ; OUTLINE-ATOMICS-NEXT: adrp x9, var8
714 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
726 %old = atomicrmw max i8* @var8, i8 %offset seq_cst
728 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
729 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
873 ; OUTLINE-ATOMICS-NEXT: adrp x9, var8
874 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
885 %old = atomicrmw umax i8* @var8, i8 %offset seq_cst
887 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
888 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
1032 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
1033 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
1037 %old = atomicrmw xchg i8* @var8, i8 %offset seq_cst
1039 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
1040 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
1158 ; OUTLINE-ATOMICS-NEXT: adrp x2, var8
1159 ; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var8
1163 %pair = cmpxchg i8* @var8, i8 %wanted, i8 %new acquire acquire
1167 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
1168 ; CHECK-NEXT: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
1181 ; OUTLINE-ATOMICS-NEXT: adrp x2, var8
1182 ; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var8
1188 %pair = cmpxchg i8* @var8, i8 %wanted, i8 %new acquire acquire
1192 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
1193 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
1327 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
1328 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
1332 %old = atomicrmw sub i8* @var8, i8 %offset seq_cst
1335 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
1336 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
1464 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
1465 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
1470 %old = atomicrmw sub i8* @var8, i8 -1 seq_cst
1473 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
1474 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
1556 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
1557 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
1562 %old = atomicrmw sub i8* @var8, i8 %neg seq_cst
1565 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
1566 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
1645 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
1646 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
1650 %old = atomicrmw and i8* @var8, i8 %offset seq_cst
1653 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
1654 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
1732 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
1733 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
1738 %old = atomicrmw and i8* @var8, i8 -2 seq_cst
1740 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
1741 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
1816 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
1817 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
1822 %old = atomicrmw and i8* @var8, i8 %inv seq_cst
1824 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
1825 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
1940 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
1941 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
1945 %old = atomicrmw add i8* @var8, i8 %offset acq_rel
1947 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
1948 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
2064 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
2065 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
2069 %old = atomicrmw add i8* @var8, i8 %offset acquire
2071 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
2072 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
2188 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
2189 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
2193 %old = atomicrmw add i8* @var8, i8 %offset monotonic
2195 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
2196 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
2312 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
2313 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
2317 %old = atomicrmw add i8* @var8, i8 %offset release
2319 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
2320 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
2436 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
2437 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
2441 %old = atomicrmw add i8* @var8, i8 %offset seq_cst
2443 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
2444 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
2561 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
2562 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
2566 %old = atomicrmw and i8* @var8, i8 %offset acq_rel
2569 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
2570 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
2693 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
2694 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
2698 %old = atomicrmw and i8* @var8, i8 %offset acquire
2701 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
2702 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
2825 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
2826 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
2830 %old = atomicrmw and i8* @var8, i8 %offset monotonic
2833 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
2834 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
2957 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
2958 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
2962 %old = atomicrmw and i8* @var8, i8 %offset release
2965 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
2966 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
3089 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
3090 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
3094 %old = atomicrmw and i8* @var8, i8 %offset seq_cst
3097 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
3098 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
3220 ; OUTLINE-ATOMICS-NEXT: adrp x2, var8
3221 ; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var8
3225 %pair = cmpxchg i8* @var8, i8 %wanted, i8 %new acquire acquire
3229 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
3230 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
3335 ; OUTLINE-ATOMICS-NEXT: adrp x2, var8
3336 ; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var8
3340 %pair = cmpxchg i8* @var8, i8 %wanted, i8 %new monotonic monotonic
3344 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
3345 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
3450 ; OUTLINE-ATOMICS-NEXT: adrp x2, var8
3451 ; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var8
3455 %pair = cmpxchg i8* @var8, i8 %wanted, i8 %new seq_cst seq_cst
3459 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
3460 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
3564 ; OUTLINE-ATOMICS-NEXT: adrp x9, var8
3565 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
3577 %old = atomicrmw max i8* @var8, i8 %offset acq_rel
3579 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
3580 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
3724 ; OUTLINE-ATOMICS-NEXT: adrp x9, var8
3725 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
3737 %old = atomicrmw max i8* @var8, i8 %offset acquire
3739 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
3740 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
3884 ; OUTLINE-ATOMICS-NEXT: adrp x9, var8
3885 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
3897 %old = atomicrmw max i8* @var8, i8 %offset monotonic
3899 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
3900 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
4044 ; OUTLINE-ATOMICS-NEXT: adrp x9, var8
4045 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
4057 %old = atomicrmw max i8* @var8, i8 %offset release
4059 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
4060 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
4204 ; OUTLINE-ATOMICS-NEXT: adrp x9, var8
4205 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
4217 %old = atomicrmw max i8* @var8, i8 %offset seq_cst
4219 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
4220 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
4364 ; OUTLINE-ATOMICS-NEXT: adrp x9, var8
4365 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
4377 %old = atomicrmw min i8* @var8, i8 %offset acq_rel
4379 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
4380 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
4524 ; OUTLINE-ATOMICS-NEXT: adrp x9, var8
4525 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
4537 %old = atomicrmw min i8* @var8, i8 %offset acquire
4539 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
4540 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
4684 ; OUTLINE-ATOMICS-NEXT: adrp x9, var8
4685 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
4697 %old = atomicrmw min i8* @var8, i8 %offset monotonic
4699 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
4700 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
4844 ; OUTLINE-ATOMICS-NEXT: adrp x9, var8
4845 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
4857 %old = atomicrmw min i8* @var8, i8 %offset release
4859 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
4860 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
5004 ; OUTLINE-ATOMICS-NEXT: adrp x9, var8
5005 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
5017 %old = atomicrmw min i8* @var8, i8 %offset seq_cst
5019 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
5020 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
5165 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
5166 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
5170 %old = atomicrmw or i8* @var8, i8 %offset acq_rel
5172 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
5173 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
5289 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
5290 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
5294 %old = atomicrmw or i8* @var8, i8 %offset acquire
5296 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
5297 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
5413 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
5414 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
5418 %old = atomicrmw or i8* @var8, i8 %offset monotonic
5420 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
5421 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
5537 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
5538 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
5542 %old = atomicrmw or i8* @var8, i8 %offset release
5544 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
5545 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
5661 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
5662 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
5666 %old = atomicrmw or i8* @var8, i8 %offset seq_cst
5668 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
5669 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
5786 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
5787 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
5791 %old = atomicrmw sub i8* @var8, i8 %offset acq_rel
5794 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
5795 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
5924 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
5925 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
5929 %old = atomicrmw sub i8* @var8, i8 %offset acquire
5932 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
5933 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
6062 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
6063 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
6067 %old = atomicrmw sub i8* @var8, i8 %offset monotonic
6070 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
6071 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
6200 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
6201 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
6205 %old = atomicrmw sub i8* @var8, i8 %offset release
6208 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
6209 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
6338 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
6339 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
6343 %old = atomicrmw sub i8* @var8, i8 %offset seq_cst
6346 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
6347 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
6475 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
6476 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
6480 %old = atomicrmw xchg i8* @var8, i8 %offset acq_rel
6482 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
6483 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
6601 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
6602 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
6606 %old = atomicrmw xchg i8* @var8, i8 %offset acquire
6608 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
6609 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
6727 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
6728 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
6732 %old = atomicrmw xchg i8* @var8, i8 %offset monotonic
6734 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
6735 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
6853 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
6854 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
6858 %old = atomicrmw xchg i8* @var8, i8 %offset release
6860 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
6861 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
6979 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
6980 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
6984 %old = atomicrmw xchg i8* @var8, i8 %offset seq_cst
6986 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
6987 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
7104 ; OUTLINE-ATOMICS-NEXT: adrp x9, var8
7105 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
7116 %old = atomicrmw umax i8* @var8, i8 %offset acq_rel
7118 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
7119 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
7262 ; OUTLINE-ATOMICS-NEXT: adrp x9, var8
7263 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
7274 %old = atomicrmw umax i8* @var8, i8 %offset acquire
7276 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
7277 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
7420 ; OUTLINE-ATOMICS-NEXT: adrp x9, var8
7421 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
7432 %old = atomicrmw umax i8* @var8, i8 %offset monotonic
7434 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
7435 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
7578 ; OUTLINE-ATOMICS-NEXT: adrp x9, var8
7579 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
7590 %old = atomicrmw umax i8* @var8, i8 %offset release
7592 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
7593 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
7736 ; OUTLINE-ATOMICS-NEXT: adrp x9, var8
7737 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
7748 %old = atomicrmw umax i8* @var8, i8 %offset seq_cst
7750 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
7751 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
7894 ; OUTLINE-ATOMICS-NEXT: adrp x9, var8
7895 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
7906 %old = atomicrmw umin i8* @var8, i8 %offset acq_rel
7908 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
7909 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
8052 ; OUTLINE-ATOMICS-NEXT: adrp x9, var8
8053 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
8064 %old = atomicrmw umin i8* @var8, i8 %offset acquire
8066 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
8067 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
8210 ; OUTLINE-ATOMICS-NEXT: adrp x9, var8
8211 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
8222 %old = atomicrmw umin i8* @var8, i8 %offset monotonic
8224 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
8225 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
8368 ; OUTLINE-ATOMICS-NEXT: adrp x9, var8
8369 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
8380 %old = atomicrmw umin i8* @var8, i8 %offset release
8382 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
8383 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
8526 ; OUTLINE-ATOMICS-NEXT: adrp x9, var8
8527 ; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
8538 %old = atomicrmw umin i8* @var8, i8 %offset seq_cst
8540 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
8541 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
8685 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
8686 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
8690 %old = atomicrmw xor i8* @var8, i8 %offset acq_rel
8692 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
8693 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
8809 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
8810 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
8814 %old = atomicrmw xor i8* @var8, i8 %offset acquire
8816 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
8817 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
8933 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
8934 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
8938 %old = atomicrmw xor i8* @var8, i8 %offset monotonic
8940 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
8941 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
9057 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
9058 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
9062 %old = atomicrmw xor i8* @var8, i8 %offset release
9064 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
9065 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
9181 ; OUTLINE-ATOMICS-NEXT: adrp x1, var8
9182 ; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
9186 %old = atomicrmw xor i8* @var8, i8 %offset seq_cst
9188 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
9189 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8