Lines Matching refs:var16
12 @var16 = global i16 0
49 ; OUTLINE_ATOMICS-NEXT: adrp x1, var16
50 ; OUTLINE_ATOMICS-NEXT: add x1, x1, :lo12:var16
54 %old = atomicrmw add i16* @var16, i16 %offset acquire
56 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
57 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
163 ; OUTLINE_ATOMICS-NEXT: adrp x1, var16
164 ; OUTLINE_ATOMICS-NEXT: add x1, x1, :lo12:var16
168 %old = atomicrmw sub i16* @var16, i16 %offset release
170 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
171 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
279 ; OUTLINE_ATOMICS-NEXT: adrp x1, var16
280 ; OUTLINE_ATOMICS-NEXT: add x1, x1, :lo12:var16
284 %old = atomicrmw and i16* @var16, i16 %offset monotonic
286 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
287 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
393 ; OUTLINE_ATOMICS-NEXT: adrp x1, var16
394 ; OUTLINE_ATOMICS-NEXT: add x1, x1, :lo12:var16
398 %old = atomicrmw or i16* @var16, i16 %offset monotonic
400 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
401 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
505 ; OUTLINE_ATOMICS-NEXT: adrp x1, var16
506 ; OUTLINE_ATOMICS-NEXT: add x1, x1, :lo12:var16
510 %old = atomicrmw xor i16* @var16, i16 %offset release
512 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
513 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
616 ; OUTLINE_ATOMICS-NEXT: adrp x1, var16
617 ; OUTLINE_ATOMICS-NEXT: add x1, x1, :lo12:var16
621 %old = atomicrmw xchg i16* @var16, i16 %offset seq_cst
623 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
624 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
735 ; OUTLINE_ATOMICS-NEXT: adrp x9, var16
736 ; OUTLINE_ATOMICS-NEXT: add x9, x9, :lo12:var16
748 %old = atomicrmw min i16* @var16, i16 %offset release
750 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
751 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
891 ; OUTLINE_ATOMICS-NEXT: adrp x9, var16
892 ; OUTLINE_ATOMICS-NEXT: add x9, x9, :lo12:var16
904 %old = atomicrmw max i16* @var16, i16 %offset acquire
906 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
907 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
1045 ; OUTLINE_ATOMICS-NEXT: adrp x9, var16
1046 ; OUTLINE_ATOMICS-NEXT: add x9, x9, :lo12:var16
1057 %old = atomicrmw umin i16* @var16, i16 %offset acquire
1059 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
1060 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
1197 ; OUTLINE_ATOMICS-NEXT: adrp x9, var16
1198 ; OUTLINE_ATOMICS-NEXT: add x9, x9, :lo12:var16
1209 %old = atomicrmw umax i16* @var16, i16 %offset monotonic
1211 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
1212 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
1345 ; OUTLINE_ATOMICS-NEXT: adrp x2, var16
1346 ; OUTLINE_ATOMICS-NEXT: add x2, x2, :lo12:var16
1350 %pair = cmpxchg i16* @var16, i16 %wanted, i16 %new seq_cst seq_cst
1354 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
1355 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
1516 ; OUTLINE_ATOMICS-NEXT: adrp x8, var16
1517 ; OUTLINE_ATOMICS-NEXT: ldrh w0, [x8, :lo12:var16]
1519 %val = load atomic i16, i16* @var16 monotonic, align 2
1521 ; CHECK: adrp x[[HIADDR:[0-9]+]], var16
1523 ; CHECK: ldrh w0, [x[[HIADDR]], {{#?}}:lo12:var16]
1636 ; OUTLINE_ATOMICS-NEXT: adrp x8, var16
1637 ; OUTLINE_ATOMICS-NEXT: strh w0, [x8, :lo12:var16]
1639 store atomic i16 %val, i16* @var16 monotonic, align 2
1641 ; CHECK: adrp x[[HIADDR:[0-9]+]], var16
1643 ; CHECK: strh w0, [x[[HIADDR]], {{#?}}:lo12:var16]