Lines Matching refs:SEXT

53 ; CHECK-NEXT: mov [[SEXT:z[0-9]+]].b, [[CMP]]/z, #-1
54 ; CHECK-NEXT: st1b { [[SEXT]].b }, [[PG]], [x0]
70 ; VBITS_GE_512-NEXT: mov [[SEXT:z[0-9]+]].b, [[CMP]]/z, #-1
71 ; VBITS_GE_512-NEXT: st1b { [[SEXT]].b }, [[PG]], [x0]
102 ; VBITS_GE_1024-NEXT: mov [[SEXT:z[0-9]+]].b, [[CMP]]/z, #-1
103 ; VBITS_GE_1024-NEXT: st1b { [[SEXT]].b }, [[PG]], [x0]
119 ; VBITS_GE_2048-NEXT: mov [[SEXT:z[0-9]+]].b, [[CMP]]/z, #-1
120 ; VBITS_GE_2048-NEXT: st1b { [[SEXT]].b }, [[PG]], [x0]
156 ; CHECK-NEXT: mov [[SEXT:z[0-9]+]].h, [[CMP]]/z, #-1
157 ; CHECK-NEXT: st1h { [[SEXT]].h }, [[PG]], [x0]
173 ; VBITS_GE_512-NEXT: mov [[SEXT:z[0-9]+]].h, [[CMP]]/z, #-1
174 ; VBITS_GE_512-NEXT: st1h { [[SEXT]].h }, [[PG]], [x0]
206 ; VBITS_GE_1024-NEXT: mov [[SEXT:z[0-9]+]].h, [[CMP]]/z, #-1
207 ; VBITS_GE_1024-NEXT: st1h { [[SEXT]].h }, [[PG]], [x0]
223 ; VBITS_GE_2048-NEXT: mov [[SEXT:z[0-9]+]].h, [[CMP]]/z, #-1
224 ; VBITS_GE_2048-NEXT: st1h { [[SEXT]].h }, [[PG]], [x0]
260 ; CHECK-NEXT: mov [[SEXT:z[0-9]+]].s, [[CMP]]/z, #-1
261 ; CHECK-NEXT: st1w { [[SEXT]].s }, [[PG]], [x0]
277 ; VBITS_GE_512-NEXT: mov [[SEXT:z[0-9]+]].s, [[CMP]]/z, #-1
278 ; VBITS_GE_512-NEXT: st1w { [[SEXT]].s }, [[PG]], [x0]
310 ; VBITS_GE_1024-NEXT: mov [[SEXT:z[0-9]+]].s, [[CMP]]/z, #-1
311 ; VBITS_GE_1024-NEXT: st1w { [[SEXT]].s }, [[PG]], [x0]
327 ; VBITS_GE_2048-NEXT: mov [[SEXT:z[0-9]+]].s, [[CMP]]/z, #-1
328 ; VBITS_GE_2048-NEXT: st1w { [[SEXT]].s }, [[PG]], [x0]
364 ; CHECK-NEXT: mov [[SEXT:z[0-9]+]].d, [[CMP]]/z, #-1
365 ; CHECK-NEXT: st1d { [[SEXT]].d }, [[PG]], [x0]
381 ; VBITS_GE_512-NEXT: mov [[SEXT:z[0-9]+]].d, [[CMP]]/z, #-1
382 ; VBITS_GE_512-NEXT: st1d { [[SEXT]].d }, [[PG]], [x0]
414 ; VBITS_GE_1024-NEXT: mov [[SEXT:z[0-9]+]].d, [[CMP]]/z, #-1
415 ; VBITS_GE_1024-NEXT: st1d { [[SEXT]].d }, [[PG]], [x0]
431 ; VBITS_GE_2048-NEXT: mov [[SEXT:z[0-9]+]].d, [[CMP]]/z, #-1
432 ; VBITS_GE_2048-NEXT: st1d { [[SEXT]].d }, [[PG]], [x0]
452 ; CHECK-NEXT: mov [[SEXT:z[0-9]+]].b, [[CMP]]/z, #-1
453 ; CHECK-NEXT: st1b { [[SEXT]].b }, [[PG]], [x0]
473 ; VBITS_GE_512-NEXT: mov [[SEXT:z[0-9]+]].h, [[CMP]]/z, #-1
474 ; VBITS_GE_512-NEXT: st1h { [[SEXT]].h }, [[PG]], [x0]
494 ; CHECK-NEXT: mov [[SEXT:z[0-9]+]].h, [[CMP]]/z, #-1
495 ; CHECK-NEXT: st1h { [[SEXT]].h }, [[PG]], [x0]
515 ; VBITS_GE_512-NEXT: mov [[SEXT:z[0-9]+]].s, [[CMP]]/z, #-1
516 ; VBITS_GE_512-NEXT: st1w { [[SEXT]].s }, [[PG]], [x0]
536 ; CHECK-NEXT: mov [[SEXT:z[0-9]+]].s, [[CMP]]/z, #-1
537 ; CHECK-NEXT: st1w { [[SEXT]].s }, [[PG]], [x0]
557 ; VBITS_GE_512-NEXT: mov [[SEXT:z[0-9]+]].d, [[CMP]]/z, #-1
558 ; VBITS_GE_512-NEXT: st1d { [[SEXT]].d }, [[PG]], [x0]
578 ; CHECK-NEXT: mov [[SEXT:z[0-9]+]].d, [[CMP]]/z, #-1
579 ; CHECK-NEXT: st1d { [[SEXT]].d }, [[PG]], [x0]
599 ; VBITS_GE_1024-NEXT: mov [[SEXT:z[0-9]+]].d, [[CMP]]/z, #-1
600 ; VBITS_GE_1024-NEXT: st1d { [[SEXT]].d }, [[PG]], [x0]
620 ; VBITS_GE_2048-NEXT: mov [[SEXT:z[0-9]+]].d, [[CMP]]/z, #-1
621 ; VBITS_GE_2048-NEXT: st1d { [[SEXT]].d }, [[PG]], [x0]