Lines Matching refs:cmpne

843 ; CHECK: cmpne p0.b, p0/z, z0.b, z1.b
845   %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmpne.nxv16i8(<vscale x 16 x i1> %pg,
853 ; CHECK: cmpne p0.h, p0/z, z0.h, z1.h
855   %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmpne.nxv8i16(<vscale x 8 x i1> %pg,
863 ; CHECK: cmpne p0.s, p0/z, z0.s, z1.s
865   %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmpne.nxv4i32(<vscale x 4 x i1> %pg,
873 ; CHECK: cmpne p0.d, p0/z, z0.d, z1.d
875   %out = call <vscale x 2 x i1> @llvm.aarch64.sve.cmpne.nxv2i64(<vscale x 2 x i1> %pg,
883 ; CHECK: cmpne p0.b, p0/z, z0.b, z1.d
885   %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmpne.wide.nxv16i8(<vscale x 16 x i1> %pg,
893 ; CHECK: cmpne p0.h, p0/z, z0.h, z1.d
895   %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmpne.wide.nxv8i16(<vscale x 8 x i1> %pg,
903 ; CHECK: cmpne p0.s, p0/z, z0.s, z1.d
905   %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmpne.wide.nxv4i32(<vscale x 4 x i1> %pg,
914 ; CHECK-NEXT: cmpne p0.b, p0/z, z0.b, z1.b
923 ; CHECK-NEXT: cmpne p0.h, p0/z, z0.h, z1.h
932 ; CHECK-NEXT: cmpne p0.s, p0/z, z0.s, z1.s
941 ; CHECK-NEXT: cmpne p0.d, p0/z, z0.d, z1.d
1027 declare <vscale x 16 x i1> @llvm.aarch64.sve.cmpne.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x i8>, …
1028 declare <vscale x 8 x i1> @llvm.aarch64.sve.cmpne.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <v…
1029 declare <vscale x 4 x i1> @llvm.aarch64.sve.cmpne.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <v…
1030 declare <vscale x 2 x i1> @llvm.aarch64.sve.cmpne.nxv2i64(<vscale x 2 x i1>, <vscale x 2 x i64>, <v…
1031 declare <vscale x 16 x i1> @llvm.aarch64.sve.cmpne.wide.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x …
1032 declare <vscale x 8 x i1> @llvm.aarch64.sve.cmpne.wide.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16…
1033 declare <vscale x 4 x i1> @llvm.aarch64.sve.cmpne.wide.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32…