Lines Matching refs:s17
2413 ; GFX6-NEXT: s_cmp_gt_i32 s34, s17
2414 ; GFX6-NEXT: s_cselect_b32 s17, s34, s17
2415 ; GFX6-NEXT: s_cmp_lt_i32 s17, s16
2416 ; GFX6-NEXT: s_cselect_b32 s16, s17, s16
2422 ; GFX6-NEXT: s_cselect_b32 s17, s2, 0
2423 ; GFX6-NEXT: s_sub_i32 s17, s33, s17
2424 ; GFX6-NEXT: s_cmp_gt_i32 s17, s18
2425 ; GFX6-NEXT: s_cselect_b32 s17, s17, s18
2426 ; GFX6-NEXT: s_cmp_lt_i32 s17, s16
2427 ; GFX6-NEXT: s_cselect_b32 s16, s17, s16
2433 ; GFX6-NEXT: s_cselect_b32 s17, s3, 0
2434 ; GFX6-NEXT: s_sub_i32 s17, s33, s17
2435 ; GFX6-NEXT: s_cmp_gt_i32 s17, s19
2436 ; GFX6-NEXT: s_cselect_b32 s17, s17, s19
2437 ; GFX6-NEXT: s_cmp_lt_i32 s17, s16
2438 ; GFX6-NEXT: s_cselect_b32 s16, s17, s16
2444 ; GFX6-NEXT: s_cselect_b32 s17, s4, 0
2445 ; GFX6-NEXT: s_sub_i32 s17, s33, s17
2446 ; GFX6-NEXT: s_cmp_gt_i32 s17, s20
2447 ; GFX6-NEXT: s_cselect_b32 s17, s17, s20
2448 ; GFX6-NEXT: s_cmp_lt_i32 s17, s16
2449 ; GFX6-NEXT: s_cselect_b32 s16, s17, s16
2455 ; GFX6-NEXT: s_cselect_b32 s17, s5, 0
2456 ; GFX6-NEXT: s_sub_i32 s17, s33, s17
2457 ; GFX6-NEXT: s_cmp_gt_i32 s17, s21
2458 ; GFX6-NEXT: s_cselect_b32 s17, s17, s21
2459 ; GFX6-NEXT: s_cmp_lt_i32 s17, s16
2460 ; GFX6-NEXT: s_cselect_b32 s16, s17, s16
2466 ; GFX6-NEXT: s_cselect_b32 s17, s6, 0
2467 ; GFX6-NEXT: s_sub_i32 s17, s33, s17
2468 ; GFX6-NEXT: s_cmp_gt_i32 s17, s22
2469 ; GFX6-NEXT: s_cselect_b32 s17, s17, s22
2470 ; GFX6-NEXT: s_cmp_lt_i32 s17, s16
2471 ; GFX6-NEXT: s_cselect_b32 s16, s17, s16
2477 ; GFX6-NEXT: s_cselect_b32 s17, s7, 0
2478 ; GFX6-NEXT: s_sub_i32 s17, s33, s17
2479 ; GFX6-NEXT: s_cmp_gt_i32 s17, s23
2480 ; GFX6-NEXT: s_cselect_b32 s17, s17, s23
2481 ; GFX6-NEXT: s_cmp_lt_i32 s17, s16
2482 ; GFX6-NEXT: s_cselect_b32 s16, s17, s16
2488 ; GFX6-NEXT: s_cselect_b32 s17, s8, 0
2489 ; GFX6-NEXT: s_sub_i32 s17, s33, s17
2490 ; GFX6-NEXT: s_cmp_gt_i32 s17, s24
2491 ; GFX6-NEXT: s_cselect_b32 s17, s17, s24
2492 ; GFX6-NEXT: s_cmp_lt_i32 s17, s16
2493 ; GFX6-NEXT: s_cselect_b32 s16, s17, s16
2499 ; GFX6-NEXT: s_cselect_b32 s17, s9, 0
2500 ; GFX6-NEXT: s_sub_i32 s17, s33, s17
2501 ; GFX6-NEXT: s_cmp_gt_i32 s17, s25
2502 ; GFX6-NEXT: s_cselect_b32 s17, s17, s25
2503 ; GFX6-NEXT: s_cmp_lt_i32 s17, s16
2504 ; GFX6-NEXT: s_cselect_b32 s16, s17, s16
2510 ; GFX6-NEXT: s_cselect_b32 s17, s10, 0
2511 ; GFX6-NEXT: s_sub_i32 s17, s33, s17
2512 ; GFX6-NEXT: s_cmp_gt_i32 s17, s26
2513 ; GFX6-NEXT: s_cselect_b32 s17, s17, s26
2514 ; GFX6-NEXT: s_cmp_lt_i32 s17, s16
2515 ; GFX6-NEXT: s_cselect_b32 s16, s17, s16
2521 ; GFX6-NEXT: s_cselect_b32 s17, s11, 0
2522 ; GFX6-NEXT: s_sub_i32 s17, s33, s17
2523 ; GFX6-NEXT: s_cmp_gt_i32 s17, s27
2524 ; GFX6-NEXT: s_cselect_b32 s17, s17, s27
2525 ; GFX6-NEXT: s_cmp_lt_i32 s17, s16
2526 ; GFX6-NEXT: s_cselect_b32 s16, s17, s16
2532 ; GFX6-NEXT: s_cselect_b32 s17, s12, 0
2533 ; GFX6-NEXT: s_sub_i32 s17, s33, s17
2534 ; GFX6-NEXT: s_cmp_gt_i32 s17, s28
2535 ; GFX6-NEXT: s_cselect_b32 s17, s17, s28
2536 ; GFX6-NEXT: s_cmp_lt_i32 s17, s16
2537 ; GFX6-NEXT: s_cselect_b32 s16, s17, s16
2543 ; GFX6-NEXT: s_cselect_b32 s17, s13, 0
2544 ; GFX6-NEXT: s_sub_i32 s17, s33, s17
2545 ; GFX6-NEXT: s_cmp_gt_i32 s17, s29
2546 ; GFX6-NEXT: s_cselect_b32 s17, s17, s29
2547 ; GFX6-NEXT: s_cmp_lt_i32 s17, s16
2548 ; GFX6-NEXT: s_cselect_b32 s16, s17, s16
2554 ; GFX6-NEXT: s_cselect_b32 s17, s14, 0
2555 ; GFX6-NEXT: s_sub_i32 s17, s33, s17
2556 ; GFX6-NEXT: s_cmp_gt_i32 s17, s30
2557 ; GFX6-NEXT: s_cselect_b32 s17, s17, s30
2558 ; GFX6-NEXT: s_cmp_lt_i32 s17, s16
2559 ; GFX6-NEXT: s_cselect_b32 s16, s17, s16
2565 ; GFX6-NEXT: s_cselect_b32 s17, s15, 0
2566 ; GFX6-NEXT: s_sub_i32 s17, s33, s17
2567 ; GFX6-NEXT: s_cmp_gt_i32 s17, s31
2568 ; GFX6-NEXT: s_cselect_b32 s17, s17, s31
2569 ; GFX6-NEXT: s_cmp_lt_i32 s17, s16
2570 ; GFX6-NEXT: s_cselect_b32 s16, s17, s16
2595 ; GFX8-NEXT: s_cmp_gt_i32 s34, s17
2596 ; GFX8-NEXT: s_cselect_b32 s17, s34, s17
2597 ; GFX8-NEXT: s_cmp_lt_i32 s17, s16
2598 ; GFX8-NEXT: s_cselect_b32 s16, s17, s16
2604 ; GFX8-NEXT: s_cselect_b32 s17, s2, 0
2605 ; GFX8-NEXT: s_sub_i32 s17, s33, s17
2606 ; GFX8-NEXT: s_cmp_gt_i32 s17, s18
2607 ; GFX8-NEXT: s_cselect_b32 s17, s17, s18
2608 ; GFX8-NEXT: s_cmp_lt_i32 s17, s16
2609 ; GFX8-NEXT: s_cselect_b32 s16, s17, s16
2615 ; GFX8-NEXT: s_cselect_b32 s17, s3, 0
2616 ; GFX8-NEXT: s_sub_i32 s17, s33, s17
2617 ; GFX8-NEXT: s_cmp_gt_i32 s17, s19
2618 ; GFX8-NEXT: s_cselect_b32 s17, s17, s19
2619 ; GFX8-NEXT: s_cmp_lt_i32 s17, s16
2620 ; GFX8-NEXT: s_cselect_b32 s16, s17, s16
2626 ; GFX8-NEXT: s_cselect_b32 s17, s4, 0
2627 ; GFX8-NEXT: s_sub_i32 s17, s33, s17
2628 ; GFX8-NEXT: s_cmp_gt_i32 s17, s20
2629 ; GFX8-NEXT: s_cselect_b32 s17, s17, s20
2630 ; GFX8-NEXT: s_cmp_lt_i32 s17, s16
2631 ; GFX8-NEXT: s_cselect_b32 s16, s17, s16
2637 ; GFX8-NEXT: s_cselect_b32 s17, s5, 0
2638 ; GFX8-NEXT: s_sub_i32 s17, s33, s17
2639 ; GFX8-NEXT: s_cmp_gt_i32 s17, s21
2640 ; GFX8-NEXT: s_cselect_b32 s17, s17, s21
2641 ; GFX8-NEXT: s_cmp_lt_i32 s17, s16
2642 ; GFX8-NEXT: s_cselect_b32 s16, s17, s16
2648 ; GFX8-NEXT: s_cselect_b32 s17, s6, 0
2649 ; GFX8-NEXT: s_sub_i32 s17, s33, s17
2650 ; GFX8-NEXT: s_cmp_gt_i32 s17, s22
2651 ; GFX8-NEXT: s_cselect_b32 s17, s17, s22
2652 ; GFX8-NEXT: s_cmp_lt_i32 s17, s16
2653 ; GFX8-NEXT: s_cselect_b32 s16, s17, s16
2659 ; GFX8-NEXT: s_cselect_b32 s17, s7, 0
2660 ; GFX8-NEXT: s_sub_i32 s17, s33, s17
2661 ; GFX8-NEXT: s_cmp_gt_i32 s17, s23
2662 ; GFX8-NEXT: s_cselect_b32 s17, s17, s23
2663 ; GFX8-NEXT: s_cmp_lt_i32 s17, s16
2664 ; GFX8-NEXT: s_cselect_b32 s16, s17, s16
2670 ; GFX8-NEXT: s_cselect_b32 s17, s8, 0
2671 ; GFX8-NEXT: s_sub_i32 s17, s33, s17
2672 ; GFX8-NEXT: s_cmp_gt_i32 s17, s24
2673 ; GFX8-NEXT: s_cselect_b32 s17, s17, s24
2674 ; GFX8-NEXT: s_cmp_lt_i32 s17, s16
2675 ; GFX8-NEXT: s_cselect_b32 s16, s17, s16
2681 ; GFX8-NEXT: s_cselect_b32 s17, s9, 0
2682 ; GFX8-NEXT: s_sub_i32 s17, s33, s17
2683 ; GFX8-NEXT: s_cmp_gt_i32 s17, s25
2684 ; GFX8-NEXT: s_cselect_b32 s17, s17, s25
2685 ; GFX8-NEXT: s_cmp_lt_i32 s17, s16
2686 ; GFX8-NEXT: s_cselect_b32 s16, s17, s16
2692 ; GFX8-NEXT: s_cselect_b32 s17, s10, 0
2693 ; GFX8-NEXT: s_sub_i32 s17, s33, s17
2694 ; GFX8-NEXT: s_cmp_gt_i32 s17, s26
2695 ; GFX8-NEXT: s_cselect_b32 s17, s17, s26
2696 ; GFX8-NEXT: s_cmp_lt_i32 s17, s16
2697 ; GFX8-NEXT: s_cselect_b32 s16, s17, s16
2703 ; GFX8-NEXT: s_cselect_b32 s17, s11, 0
2704 ; GFX8-NEXT: s_sub_i32 s17, s33, s17
2705 ; GFX8-NEXT: s_cmp_gt_i32 s17, s27
2706 ; GFX8-NEXT: s_cselect_b32 s17, s17, s27
2707 ; GFX8-NEXT: s_cmp_lt_i32 s17, s16
2708 ; GFX8-NEXT: s_cselect_b32 s16, s17, s16
2714 ; GFX8-NEXT: s_cselect_b32 s17, s12, 0
2715 ; GFX8-NEXT: s_sub_i32 s17, s33, s17
2716 ; GFX8-NEXT: s_cmp_gt_i32 s17, s28
2717 ; GFX8-NEXT: s_cselect_b32 s17, s17, s28
2718 ; GFX8-NEXT: s_cmp_lt_i32 s17, s16
2719 ; GFX8-NEXT: s_cselect_b32 s16, s17, s16
2725 ; GFX8-NEXT: s_cselect_b32 s17, s13, 0
2726 ; GFX8-NEXT: s_sub_i32 s17, s33, s17
2727 ; GFX8-NEXT: s_cmp_gt_i32 s17, s29
2728 ; GFX8-NEXT: s_cselect_b32 s17, s17, s29
2729 ; GFX8-NEXT: s_cmp_lt_i32 s17, s16
2730 ; GFX8-NEXT: s_cselect_b32 s16, s17, s16
2736 ; GFX8-NEXT: s_cselect_b32 s17, s14, 0
2737 ; GFX8-NEXT: s_sub_i32 s17, s33, s17
2738 ; GFX8-NEXT: s_cmp_gt_i32 s17, s30
2739 ; GFX8-NEXT: s_cselect_b32 s17, s17, s30
2740 ; GFX8-NEXT: s_cmp_lt_i32 s17, s16
2741 ; GFX8-NEXT: s_cselect_b32 s16, s17, s16
2747 ; GFX8-NEXT: s_cselect_b32 s17, s15, 0
2748 ; GFX8-NEXT: s_sub_i32 s17, s33, s17
2749 ; GFX8-NEXT: s_cmp_gt_i32 s17, s31
2750 ; GFX8-NEXT: s_cselect_b32 s17, s17, s31
2751 ; GFX8-NEXT: s_cmp_lt_i32 s17, s16
2752 ; GFX8-NEXT: s_cselect_b32 s16, s17, s16
2759 ; GFX9-NEXT: v_mov_b32_e32 v1, s17
2811 ; GFX10-NEXT: v_add_nc_i32 v1, s1, s17 clamp
4294 ; GFX6-NEXT: s_brev_b32 s17, 1
4296 ; GFX6-NEXT: s_sub_i32 s19, s17, s19
4310 ; GFX6-NEXT: s_sub_i32 s18, s17, s18
4324 ; GFX6-NEXT: s_sub_i32 s10, s17, s10
4338 ; GFX6-NEXT: s_sub_i32 s10, s17, s10
4352 ; GFX6-NEXT: s_sub_i32 s10, s17, s10
4366 ; GFX6-NEXT: s_sub_i32 s10, s17, s10
4380 ; GFX6-NEXT: s_sub_i32 s10, s17, s10
4394 ; GFX6-NEXT: s_sub_i32 s10, s17, s10
4437 ; GFX8-NEXT: s_movk_i32 s17, 0x8000
4439 ; GFX8-NEXT: s_sub_i32 s18, s17, s18
4455 ; GFX8-NEXT: s_sub_i32 s4, s17, s4
4471 ; GFX8-NEXT: s_sub_i32 s4, s17, s4
4487 ; GFX8-NEXT: s_sub_i32 s4, s17, s4
4503 ; GFX8-NEXT: s_sub_i32 s4, s17, s4
4519 ; GFX8-NEXT: s_sub_i32 s4, s17, s4
4535 ; GFX8-NEXT: s_sub_i32 s4, s17, s4
4551 ; GFX8-NEXT: s_sub_i32 s4, s17, s4
6573 ; GFX6-NEXT: s_cselect_b32 s17, 1, 0
6574 ; GFX6-NEXT: s_and_b32 s17, s17, 1
6575 ; GFX6-NEXT: s_cmp_lg_u32 s17, 0
6576 ; GFX6-NEXT: s_addc_u32 s17, s1, s9
6654 ; GFX6-NEXT: v_mov_b32_e32 v4, s17
6741 ; GFX8-NEXT: s_cselect_b32 s17, 1, 0
6742 ; GFX8-NEXT: s_and_b32 s17, s17, 1
6743 ; GFX8-NEXT: s_cmp_lg_u32 s17, 0
6744 ; GFX8-NEXT: s_addc_u32 s17, s1, s9
6828 ; GFX8-NEXT: v_mov_b32_e32 v4, s17
6921 ; GFX9-NEXT: s_cselect_b32 s17, 1, 0
6922 ; GFX9-NEXT: s_and_b32 s17, s17, 1
6923 ; GFX9-NEXT: s_cmp_lg_u32 s17, 0
6924 ; GFX9-NEXT: s_addc_u32 s17, s1, s9
7008 ; GFX9-NEXT: v_mov_b32_e32 v4, s17
7101 ; GFX10-NEXT: s_cselect_b32 s17, 1, 0
7103 ; GFX10-NEXT: s_and_b32 s17, s17, 1
7105 ; GFX10-NEXT: s_cmp_lg_u32 s17, 0