Lines Matching refs:TMP3
14 ; VI-NEXT: [[TMP3:%.*]] = add nuw nsw i32 [[TMP1]], [[TMP2]]
15 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i3
33 ; VI-NEXT: [[TMP3:%.*]] = add nuw nsw i32 [[TMP1]], [[TMP2]]
34 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i3
52 ; VI-NEXT: [[TMP3:%.*]] = add nuw nsw i32 [[TMP1]], [[TMP2]]
53 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i3
71 ; VI-NEXT: [[TMP3:%.*]] = add nuw nsw i32 [[TMP1]], [[TMP2]]
72 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i3
90 ; VI-NEXT: [[TMP3:%.*]] = sub nsw i32 [[TMP1]], [[TMP2]]
91 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i3
109 ; VI-NEXT: [[TMP3:%.*]] = sub nsw i32 [[TMP1]], [[TMP2]]
110 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i3
128 ; VI-NEXT: [[TMP3:%.*]] = sub nuw nsw i32 [[TMP1]], [[TMP2]]
129 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i3
147 ; VI-NEXT: [[TMP3:%.*]] = sub nuw nsw i32 [[TMP1]], [[TMP2]]
148 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i3
166 ; VI-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP1]], [[TMP2]]
167 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i3
185 ; VI-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP1]], [[TMP2]]
186 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i3
204 ; VI-NEXT: [[TMP3:%.*]] = mul nuw nsw i32 [[TMP1]], [[TMP2]]
205 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i3
223 ; VI-NEXT: [[TMP3:%.*]] = mul nuw nsw i32 [[TMP1]], [[TMP2]]
224 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i3
242 ; VI-NEXT: [[TMP3:%.*]] = shl nuw nsw i32 [[TMP1]], [[TMP2]]
243 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i3
261 ; VI-NEXT: [[TMP3:%.*]] = shl nuw nsw i32 [[TMP1]], [[TMP2]]
262 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i3
280 ; VI-NEXT: [[TMP3:%.*]] = shl nuw nsw i32 [[TMP1]], [[TMP2]]
281 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i3
299 ; VI-NEXT: [[TMP3:%.*]] = shl nuw nsw i32 [[TMP1]], [[TMP2]]
300 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i3
318 ; VI-NEXT: [[TMP3:%.*]] = lshr i32 [[TMP1]], [[TMP2]]
319 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i3
337 ; VI-NEXT: [[TMP3:%.*]] = lshr exact i32 [[TMP1]], [[TMP2]]
338 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i3
356 ; VI-NEXT: [[TMP3:%.*]] = ashr i32 [[TMP1]], [[TMP2]]
357 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i3
375 ; VI-NEXT: [[TMP3:%.*]] = ashr exact i32 [[TMP1]], [[TMP2]]
376 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i3
394 ; VI-NEXT: [[TMP3:%.*]] = and i32 [[TMP1]], [[TMP2]]
395 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i3
413 ; VI-NEXT: [[TMP3:%.*]] = or i32 [[TMP1]], [[TMP2]]
414 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i3
432 ; VI-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], [[TMP2]]
433 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i3
452 ; VI-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP1]], [[TMP2]]
455 ; VI-NEXT: [[TMP6:%.*]] = select i1 [[TMP3]], i32 [[TMP4]], i32 [[TMP5]]
476 ; VI-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP1]], [[TMP2]]
479 ; VI-NEXT: [[TMP6:%.*]] = select i1 [[TMP3]], i32 [[TMP4]], i32 [[TMP5]]
500 ; VI-NEXT: [[TMP3:%.*]] = icmp ugt i32 [[TMP1]], [[TMP2]]
503 ; VI-NEXT: [[TMP6:%.*]] = select i1 [[TMP3]], i32 [[TMP4]], i32 [[TMP5]]
524 ; VI-NEXT: [[TMP3:%.*]] = icmp uge i32 [[TMP1]], [[TMP2]]
527 ; VI-NEXT: [[TMP6:%.*]] = select i1 [[TMP3]], i32 [[TMP4]], i32 [[TMP5]]
548 ; VI-NEXT: [[TMP3:%.*]] = icmp ult i32 [[TMP1]], [[TMP2]]
551 ; VI-NEXT: [[TMP6:%.*]] = select i1 [[TMP3]], i32 [[TMP4]], i32 [[TMP5]]
572 ; VI-NEXT: [[TMP3:%.*]] = icmp ule i32 [[TMP1]], [[TMP2]]
575 ; VI-NEXT: [[TMP6:%.*]] = select i1 [[TMP3]], i32 [[TMP4]], i32 [[TMP5]]
596 ; VI-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP1]], [[TMP2]]
599 ; VI-NEXT: [[TMP6:%.*]] = select i1 [[TMP3]], i32 [[TMP4]], i32 [[TMP5]]
620 ; VI-NEXT: [[TMP3:%.*]] = icmp sge i32 [[TMP1]], [[TMP2]]
623 ; VI-NEXT: [[TMP6:%.*]] = select i1 [[TMP3]], i32 [[TMP4]], i32 [[TMP5]]
644 ; VI-NEXT: [[TMP3:%.*]] = icmp slt i32 [[TMP1]], [[TMP2]]
647 ; VI-NEXT: [[TMP6:%.*]] = select i1 [[TMP3]], i32 [[TMP4]], i32 [[TMP5]]
668 ; VI-NEXT: [[TMP3:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
671 ; VI-NEXT: [[TMP6:%.*]] = select i1 [[TMP3]], i32 [[TMP4]], i32 [[TMP5]]
692 ; VI-NEXT: [[TMP3:%.*]] = lshr i32 [[TMP2]], 29
693 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i3
711 ; VI-NEXT: [[TMP3:%.*]] = add nuw nsw i32 [[TMP1]], [[TMP2]]
712 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i16
775 ; VI-NEXT: [[TMP3:%.*]] = add nuw nsw i32 [[TMP1]], [[TMP2]]
776 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i16
794 ; VI-NEXT: [[TMP3:%.*]] = add nuw nsw i32 [[TMP1]], [[TMP2]]
795 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i16
813 ; VI-NEXT: [[TMP3:%.*]] = add nuw nsw i32 [[TMP1]], [[TMP2]]
814 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i16
832 ; VI-NEXT: [[TMP3:%.*]] = sub nsw i32 [[TMP1]], [[TMP2]]
833 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i16
851 ; VI-NEXT: [[TMP3:%.*]] = sub nsw i32 [[TMP1]], [[TMP2]]
852 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i16
870 ; VI-NEXT: [[TMP3:%.*]] = sub nuw nsw i32 [[TMP1]], [[TMP2]]
871 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i16
889 ; VI-NEXT: [[TMP3:%.*]] = sub nuw nsw i32 [[TMP1]], [[TMP2]]
890 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i16
908 ; VI-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP1]], [[TMP2]]
909 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i16
927 ; VI-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP1]], [[TMP2]]
928 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i16
946 ; VI-NEXT: [[TMP3:%.*]] = mul nuw nsw i32 [[TMP1]], [[TMP2]]
947 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i16
965 ; VI-NEXT: [[TMP3:%.*]] = mul nuw nsw i32 [[TMP1]], [[TMP2]]
966 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i16
984 ; VI-NEXT: [[TMP3:%.*]] = shl nuw nsw i32 [[TMP1]], [[TMP2]]
985 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i16
1003 ; VI-NEXT: [[TMP3:%.*]] = shl nuw nsw i32 [[TMP1]], [[TMP2]]
1004 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i16
1022 ; VI-NEXT: [[TMP3:%.*]] = shl nuw nsw i32 [[TMP1]], [[TMP2]]
1023 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i16
1041 ; VI-NEXT: [[TMP3:%.*]] = shl nuw nsw i32 [[TMP1]], [[TMP2]]
1042 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i16
1060 ; VI-NEXT: [[TMP3:%.*]] = lshr i32 [[TMP1]], [[TMP2]]
1061 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i16
1079 ; VI-NEXT: [[TMP3:%.*]] = lshr exact i32 [[TMP1]], [[TMP2]]
1080 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i16
1098 ; VI-NEXT: [[TMP3:%.*]] = ashr i32 [[TMP1]], [[TMP2]]
1099 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i16
1117 ; VI-NEXT: [[TMP3:%.*]] = ashr exact i32 [[TMP1]], [[TMP2]]
1118 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i16
1151 ; VI-NEXT: [[TMP3:%.*]] = and i32 [[TMP1]], [[TMP2]]
1152 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i16
1170 ; VI-NEXT: [[TMP3:%.*]] = or i32 [[TMP1]], [[TMP2]]
1171 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i16
1189 ; VI-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], [[TMP2]]
1190 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i16
1209 ; VI-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP1]], [[TMP2]]
1212 ; VI-NEXT: [[TMP6:%.*]] = select i1 [[TMP3]], i32 [[TMP4]], i32 [[TMP5]]
1233 ; VI-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP1]], [[TMP2]]
1236 ; VI-NEXT: [[TMP6:%.*]] = select i1 [[TMP3]], i32 [[TMP4]], i32 [[TMP5]]
1257 ; VI-NEXT: [[TMP3:%.*]] = icmp ugt i32 [[TMP1]], [[TMP2]]
1260 ; VI-NEXT: [[TMP6:%.*]] = select i1 [[TMP3]], i32 [[TMP4]], i32 [[TMP5]]
1281 ; VI-NEXT: [[TMP3:%.*]] = icmp uge i32 [[TMP1]], [[TMP2]]
1284 ; VI-NEXT: [[TMP6:%.*]] = select i1 [[TMP3]], i32 [[TMP4]], i32 [[TMP5]]
1305 ; VI-NEXT: [[TMP3:%.*]] = icmp ult i32 [[TMP1]], [[TMP2]]
1308 ; VI-NEXT: [[TMP6:%.*]] = select i1 [[TMP3]], i32 [[TMP4]], i32 [[TMP5]]
1329 ; VI-NEXT: [[TMP3:%.*]] = icmp ule i32 [[TMP1]], [[TMP2]]
1332 ; VI-NEXT: [[TMP6:%.*]] = select i1 [[TMP3]], i32 [[TMP4]], i32 [[TMP5]]
1353 ; VI-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP1]], [[TMP2]]
1356 ; VI-NEXT: [[TMP6:%.*]] = select i1 [[TMP3]], i32 [[TMP4]], i32 [[TMP5]]
1377 ; VI-NEXT: [[TMP3:%.*]] = icmp sge i32 [[TMP1]], [[TMP2]]
1380 ; VI-NEXT: [[TMP6:%.*]] = select i1 [[TMP3]], i32 [[TMP4]], i32 [[TMP5]]
1401 ; VI-NEXT: [[TMP3:%.*]] = icmp slt i32 [[TMP1]], [[TMP2]]
1404 ; VI-NEXT: [[TMP6:%.*]] = select i1 [[TMP3]], i32 [[TMP4]], i32 [[TMP5]]
1425 ; VI-NEXT: [[TMP3:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
1428 ; VI-NEXT: [[TMP6:%.*]] = select i1 [[TMP3]], i32 [[TMP4]], i32 [[TMP5]]
1450 ; VI-NEXT: [[TMP3:%.*]] = lshr i32 [[TMP2]], 16
1451 ; VI-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i16
1469 ; VI-NEXT: [[TMP3:%.*]] = add nuw nsw <3 x i32> [[TMP1]], [[TMP2]]
1470 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i15>
1488 ; VI-NEXT: [[TMP3:%.*]] = add nuw nsw <3 x i32> [[TMP1]], [[TMP2]]
1489 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i15>
1507 ; VI-NEXT: [[TMP3:%.*]] = add nuw nsw <3 x i32> [[TMP1]], [[TMP2]]
1508 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i15>
1526 ; VI-NEXT: [[TMP3:%.*]] = add nuw nsw <3 x i32> [[TMP1]], [[TMP2]]
1527 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i15>
1545 ; VI-NEXT: [[TMP3:%.*]] = sub nsw <3 x i32> [[TMP1]], [[TMP2]]
1546 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i15>
1564 ; VI-NEXT: [[TMP3:%.*]] = sub nsw <3 x i32> [[TMP1]], [[TMP2]]
1565 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i15>
1583 ; VI-NEXT: [[TMP3:%.*]] = sub nuw nsw <3 x i32> [[TMP1]], [[TMP2]]
1584 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i15>
1602 ; VI-NEXT: [[TMP3:%.*]] = sub nuw nsw <3 x i32> [[TMP1]], [[TMP2]]
1603 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i15>
1621 ; VI-NEXT: [[TMP3:%.*]] = mul nuw <3 x i32> [[TMP1]], [[TMP2]]
1622 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i15>
1640 ; VI-NEXT: [[TMP3:%.*]] = mul nuw <3 x i32> [[TMP1]], [[TMP2]]
1641 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i15>
1659 ; VI-NEXT: [[TMP3:%.*]] = mul nuw nsw <3 x i32> [[TMP1]], [[TMP2]]
1660 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i15>
1678 ; VI-NEXT: [[TMP3:%.*]] = mul nuw nsw <3 x i32> [[TMP1]], [[TMP2]]
1679 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i15>
1697 ; VI-NEXT: [[TMP3:%.*]] = shl nuw nsw <3 x i32> [[TMP1]], [[TMP2]]
1698 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i15>
1716 ; VI-NEXT: [[TMP3:%.*]] = shl nuw nsw <3 x i32> [[TMP1]], [[TMP2]]
1717 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i15>
1735 ; VI-NEXT: [[TMP3:%.*]] = shl nuw nsw <3 x i32> [[TMP1]], [[TMP2]]
1736 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i15>
1754 ; VI-NEXT: [[TMP3:%.*]] = shl nuw nsw <3 x i32> [[TMP1]], [[TMP2]]
1755 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i15>
1773 ; VI-NEXT: [[TMP3:%.*]] = lshr <3 x i32> [[TMP1]], [[TMP2]]
1774 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i15>
1792 ; VI-NEXT: [[TMP3:%.*]] = lshr exact <3 x i32> [[TMP1]], [[TMP2]]
1793 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i15>
1811 ; VI-NEXT: [[TMP3:%.*]] = ashr <3 x i32> [[TMP1]], [[TMP2]]
1812 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i15>
1830 ; VI-NEXT: [[TMP3:%.*]] = ashr exact <3 x i32> [[TMP1]], [[TMP2]]
1831 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i15>
1849 ; VI-NEXT: [[TMP3:%.*]] = and <3 x i32> [[TMP1]], [[TMP2]]
1850 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i15>
1868 ; VI-NEXT: [[TMP3:%.*]] = or <3 x i32> [[TMP1]], [[TMP2]]
1869 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i15>
1887 ; VI-NEXT: [[TMP3:%.*]] = xor <3 x i32> [[TMP1]], [[TMP2]]
1888 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i15>
1907 ; VI-NEXT: [[TMP3:%.*]] = icmp eq <3 x i32> [[TMP1]], [[TMP2]]
1910 ; VI-NEXT: [[TMP6:%.*]] = select <3 x i1> [[TMP3]], <3 x i32> [[TMP4]], <3 x i32> [[TMP5]]
1931 ; VI-NEXT: [[TMP3:%.*]] = icmp ne <3 x i32> [[TMP1]], [[TMP2]]
1934 ; VI-NEXT: [[TMP6:%.*]] = select <3 x i1> [[TMP3]], <3 x i32> [[TMP4]], <3 x i32> [[TMP5]]
1955 ; VI-NEXT: [[TMP3:%.*]] = icmp ugt <3 x i32> [[TMP1]], [[TMP2]]
1958 ; VI-NEXT: [[TMP6:%.*]] = select <3 x i1> [[TMP3]], <3 x i32> [[TMP4]], <3 x i32> [[TMP5]]
1979 ; VI-NEXT: [[TMP3:%.*]] = icmp uge <3 x i32> [[TMP1]], [[TMP2]]
1982 ; VI-NEXT: [[TMP6:%.*]] = select <3 x i1> [[TMP3]], <3 x i32> [[TMP4]], <3 x i32> [[TMP5]]
2003 ; VI-NEXT: [[TMP3:%.*]] = icmp ult <3 x i32> [[TMP1]], [[TMP2]]
2006 ; VI-NEXT: [[TMP6:%.*]] = select <3 x i1> [[TMP3]], <3 x i32> [[TMP4]], <3 x i32> [[TMP5]]
2027 ; VI-NEXT: [[TMP3:%.*]] = icmp ule <3 x i32> [[TMP1]], [[TMP2]]
2030 ; VI-NEXT: [[TMP6:%.*]] = select <3 x i1> [[TMP3]], <3 x i32> [[TMP4]], <3 x i32> [[TMP5]]
2051 ; VI-NEXT: [[TMP3:%.*]] = icmp sgt <3 x i32> [[TMP1]], [[TMP2]]
2054 ; VI-NEXT: [[TMP6:%.*]] = select <3 x i1> [[TMP3]], <3 x i32> [[TMP4]], <3 x i32> [[TMP5]]
2075 ; VI-NEXT: [[TMP3:%.*]] = icmp sge <3 x i32> [[TMP1]], [[TMP2]]
2078 ; VI-NEXT: [[TMP6:%.*]] = select <3 x i1> [[TMP3]], <3 x i32> [[TMP4]], <3 x i32> [[TMP5]]
2099 ; VI-NEXT: [[TMP3:%.*]] = icmp slt <3 x i32> [[TMP1]], [[TMP2]]
2102 ; VI-NEXT: [[TMP6:%.*]] = select <3 x i1> [[TMP3]], <3 x i32> [[TMP4]], <3 x i32> [[TMP5]]
2123 ; VI-NEXT: [[TMP3:%.*]] = icmp sle <3 x i32> [[TMP1]], [[TMP2]]
2126 ; VI-NEXT: [[TMP6:%.*]] = select <3 x i1> [[TMP3]], <3 x i32> [[TMP4]], <3 x i32> [[TMP5]]
2147 ; VI-NEXT: [[TMP3:%.*]] = lshr <3 x i32> [[TMP2]], <i32 17, i32 17, i32 17>
2148 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i15>
2166 ; VI-NEXT: [[TMP3:%.*]] = add nuw nsw <3 x i32> [[TMP1]], [[TMP2]]
2167 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i16>
2185 ; VI-NEXT: [[TMP3:%.*]] = add nuw nsw <3 x i32> [[TMP1]], [[TMP2]]
2186 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i16>
2204 ; VI-NEXT: [[TMP3:%.*]] = add nuw nsw <3 x i32> [[TMP1]], [[TMP2]]
2205 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i16>
2223 ; VI-NEXT: [[TMP3:%.*]] = add nuw nsw <3 x i32> [[TMP1]], [[TMP2]]
2224 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i16>
2242 ; VI-NEXT: [[TMP3:%.*]] = sub nsw <3 x i32> [[TMP1]], [[TMP2]]
2243 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i16>
2261 ; VI-NEXT: [[TMP3:%.*]] = sub nsw <3 x i32> [[TMP1]], [[TMP2]]
2262 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i16>
2280 ; VI-NEXT: [[TMP3:%.*]] = sub nuw nsw <3 x i32> [[TMP1]], [[TMP2]]
2281 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i16>
2299 ; VI-NEXT: [[TMP3:%.*]] = sub nuw nsw <3 x i32> [[TMP1]], [[TMP2]]
2300 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i16>
2318 ; VI-NEXT: [[TMP3:%.*]] = mul nuw <3 x i32> [[TMP1]], [[TMP2]]
2319 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i16>
2337 ; VI-NEXT: [[TMP3:%.*]] = mul nuw <3 x i32> [[TMP1]], [[TMP2]]
2338 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i16>
2356 ; VI-NEXT: [[TMP3:%.*]] = mul nuw nsw <3 x i32> [[TMP1]], [[TMP2]]
2357 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i16>
2375 ; VI-NEXT: [[TMP3:%.*]] = mul nuw nsw <3 x i32> [[TMP1]], [[TMP2]]
2376 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i16>
2394 ; VI-NEXT: [[TMP3:%.*]] = shl nuw nsw <3 x i32> [[TMP1]], [[TMP2]]
2395 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i16>
2413 ; VI-NEXT: [[TMP3:%.*]] = shl nuw nsw <3 x i32> [[TMP1]], [[TMP2]]
2414 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i16>
2432 ; VI-NEXT: [[TMP3:%.*]] = shl nuw nsw <3 x i32> [[TMP1]], [[TMP2]]
2433 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i16>
2451 ; VI-NEXT: [[TMP3:%.*]] = shl nuw nsw <3 x i32> [[TMP1]], [[TMP2]]
2452 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i16>
2470 ; VI-NEXT: [[TMP3:%.*]] = lshr <3 x i32> [[TMP1]], [[TMP2]]
2471 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i16>
2489 ; VI-NEXT: [[TMP3:%.*]] = lshr exact <3 x i32> [[TMP1]], [[TMP2]]
2490 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i16>
2508 ; VI-NEXT: [[TMP3:%.*]] = ashr <3 x i32> [[TMP1]], [[TMP2]]
2509 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i16>
2527 ; VI-NEXT: [[TMP3:%.*]] = ashr exact <3 x i32> [[TMP1]], [[TMP2]]
2528 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i16>
2546 ; VI-NEXT: [[TMP3:%.*]] = and <3 x i32> [[TMP1]], [[TMP2]]
2547 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i16>
2565 ; VI-NEXT: [[TMP3:%.*]] = or <3 x i32> [[TMP1]], [[TMP2]]
2566 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i16>
2584 ; VI-NEXT: [[TMP3:%.*]] = xor <3 x i32> [[TMP1]], [[TMP2]]
2585 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i16>
2604 ; VI-NEXT: [[TMP3:%.*]] = icmp eq <3 x i32> [[TMP1]], [[TMP2]]
2607 ; VI-NEXT: [[TMP6:%.*]] = select <3 x i1> [[TMP3]], <3 x i32> [[TMP4]], <3 x i32> [[TMP5]]
2628 ; VI-NEXT: [[TMP3:%.*]] = icmp ne <3 x i32> [[TMP1]], [[TMP2]]
2631 ; VI-NEXT: [[TMP6:%.*]] = select <3 x i1> [[TMP3]], <3 x i32> [[TMP4]], <3 x i32> [[TMP5]]
2652 ; VI-NEXT: [[TMP3:%.*]] = icmp ugt <3 x i32> [[TMP1]], [[TMP2]]
2655 ; VI-NEXT: [[TMP6:%.*]] = select <3 x i1> [[TMP3]], <3 x i32> [[TMP4]], <3 x i32> [[TMP5]]
2676 ; VI-NEXT: [[TMP3:%.*]] = icmp uge <3 x i32> [[TMP1]], [[TMP2]]
2679 ; VI-NEXT: [[TMP6:%.*]] = select <3 x i1> [[TMP3]], <3 x i32> [[TMP4]], <3 x i32> [[TMP5]]
2700 ; VI-NEXT: [[TMP3:%.*]] = icmp ult <3 x i32> [[TMP1]], [[TMP2]]
2703 ; VI-NEXT: [[TMP6:%.*]] = select <3 x i1> [[TMP3]], <3 x i32> [[TMP4]], <3 x i32> [[TMP5]]
2724 ; VI-NEXT: [[TMP3:%.*]] = icmp ule <3 x i32> [[TMP1]], [[TMP2]]
2727 ; VI-NEXT: [[TMP6:%.*]] = select <3 x i1> [[TMP3]], <3 x i32> [[TMP4]], <3 x i32> [[TMP5]]
2748 ; VI-NEXT: [[TMP3:%.*]] = icmp sgt <3 x i32> [[TMP1]], [[TMP2]]
2751 ; VI-NEXT: [[TMP6:%.*]] = select <3 x i1> [[TMP3]], <3 x i32> [[TMP4]], <3 x i32> [[TMP5]]
2772 ; VI-NEXT: [[TMP3:%.*]] = icmp sge <3 x i32> [[TMP1]], [[TMP2]]
2775 ; VI-NEXT: [[TMP6:%.*]] = select <3 x i1> [[TMP3]], <3 x i32> [[TMP4]], <3 x i32> [[TMP5]]
2796 ; VI-NEXT: [[TMP3:%.*]] = icmp slt <3 x i32> [[TMP1]], [[TMP2]]
2799 ; VI-NEXT: [[TMP6:%.*]] = select <3 x i1> [[TMP3]], <3 x i32> [[TMP4]], <3 x i32> [[TMP5]]
2820 ; VI-NEXT: [[TMP3:%.*]] = icmp sle <3 x i32> [[TMP1]], [[TMP2]]
2823 ; VI-NEXT: [[TMP6:%.*]] = select <3 x i1> [[TMP3]], <3 x i32> [[TMP4]], <3 x i32> [[TMP5]]
2845 ; VI-NEXT: [[TMP3:%.*]] = lshr <3 x i32> [[TMP2]], <i32 16, i32 16, i32 16>
2846 ; VI-NEXT: [[TMP4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i16>