Lines Matching refs:m0
16 ; GFX9: $m0 = S_MOV_B32 -1
18 ; GFX9: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec
21 ; VI: $m0 = S_MOV_B32 -1
23 ; VI: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec
26 ; CI: $m0 = S_MOV_B32 -1
27 ; CI: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec
30 ; SI: $m0 = S_MOV_B32 -1
31 ; SI: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec
32 $m0 = S_MOV_B32 -1
33 DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec
45 ; GFX9: $m0 = S_MOV_B32 -1
47 ; GFX9: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec
50 ; VI: $m0 = S_MOV_B32 -1
52 ; VI: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec
55 ; CI: $m0 = S_MOV_B32 -1
56 ; CI: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec
59 ; SI: $m0 = S_MOV_B32 -1
60 ; SI: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec
62 $m0 = S_MOV_B32 -1
63 DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec
67 # Test a typical situation where m0 needs to be set from a VGPR
80 ; GFX9: $m0 = S_MOV_B32 $sgpr0
82 ; GFX9: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec
86 ; VI: $m0 = S_MOV_B32 $sgpr0
88 ; VI: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec
92 ; CI: $m0 = S_MOV_B32 $sgpr0
93 ; CI: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec
97 ; SI: $m0 = S_MOV_B32 $sgpr0
98 ; SI: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec
100 $m0 = S_MOV_B32 $sgpr0
101 DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec