Lines Matching refs:sext
9 ; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP0]] to i32
12 ; CHECK-NEXT: [[CONV3:%.*]] = sext i16 [[TMP1]] to i32
16 ; CHECK-NEXT: [[CONV11:%.*]] = sext i16 [[TMP2]] to i32
20 ; CHECK-NEXT: [[CONV17:%.*]] = sext i16 [[TMP3]] to i32
24 ; CHECK-NEXT: [[CONV21:%.*]] = sext i16 [[TMP4]] to i32
38 %conv = sext i16 %1 to i32
41 %conv3 = sext i16 %2 to i32
45 %conv11 = sext i16 %3 to i32
49 %conv17 = sext i16 %4 to i32
53 %conv21 = sext i16 %5 to i32
71 ; CHECK-NEXT: [[SEXT_A_0:%.*]] = sext i16 [[LD_A_0]] to i32
75 ; CHECK-NEXT: [[TMP3:%.*]] = sext i16 [[TMP2]] to i32
79 ; CHECK-NEXT: [[TMP7:%.*]] = sext i16 [[TMP6]] to i32
91 %sext.a.0 = sext i16 %ld.a.0 to i32
95 %sext.a.1 = sext i16 %ld.a.1 to i32
96 %sext.b.1 = sext i16 %ld.b.1 to i32
97 %sext.b.0 = sext i16 %ld.b.0 to i32
98 %mul.0 = mul i32 %sext.a.0, %sext.a.0
99 %mul.1 = mul i32 %sext.a.1, %sext.b.1
104 %sext.a.2 = sext i16 %ld.a.2 to i32
105 %sext.b.2 = sext i16 %ld.b.2 to i32
106 %mul.2 = mul i32 %sext.a.2, %sext.b.2
121 ; CHECK-NEXT: [[TMP4:%.*]] = sext i16 [[TMP3]] to i32
126 ; CHECK-NEXT: [[TMP9:%.*]] = sext i16 [[TMP8]] to i32
132 ; CHECK-NEXT: [[SEXT_A_2:%.*]] = sext i16 [[LD_A_2]] to i32
133 ; CHECK-NEXT: [[SEXT_B_2:%.*]] = sext i16 [[LD_B_2]] to i32
145 %sext.a.0 = sext i16 %ld.a.0 to i32
149 %sext.a.1 = sext i16 %ld.a.1 to i32
150 %sext.b.1 = sext i16 %ld.b.1 to i32
151 %sext.b.0 = sext i16 %ld.b.0 to i32
152 %mul.0 = mul i32 %sext.a.0, %sext.b.0
153 %mul.1 = mul i32 %sext.a.1, %sext.b.1
158 %sext.a.2 = sext i16 %ld.a.2 to i32
159 %sext.b.2 = sext i16 %ld.b.2 to i32
160 %mul.2 = mul i32 %sext.a.2, %sext.a.2
165 %res = add i32 %add.3, %sext.b.2
175 ; CHECK-NEXT: [[SEXT_A_0:%.*]] = sext i16 [[LD_A_0]] to i32
178 ; CHECK-NEXT: [[SEXT_A_1:%.*]] = sext i16 [[LD_A_1]] to i32
179 ; CHECK-NEXT: [[SEXT_B_1:%.*]] = sext i16 [[LD_B_1]] to i32
184 ; CHECK-NEXT: [[SEXT_B_2:%.*]] = sext i16 [[LD_B_2]] to i32
196 %sext.a.0 = sext i16 %ld.a.0 to i32
200 %sext.a.1 = sext i16 %ld.a.1 to i32
201 %sext.b.1 = sext i16 %ld.b.1 to i32
202 %sext.b.0 = sext i16 %ld.b.0 to i32
203 %mul.0 = mul i32 %sext.a.0, %sext.a.0
204 %mul.1 = mul i32 %sext.a.1, %sext.b.1
209 %sext.a.2 = sext i16 %ld.a.2 to i32
210 %sext.b.2 = sext i16 %ld.b.2 to i32
211 %mul.2 = mul i32 %sext.b.2, %sext.b.2
215 %add.3 = add i32 %add.2, %sext.a.2
226 ; CHECK-NEXT: [[SEXT_A_0:%.*]] = sext i16 [[LD_A_0]] to i32
229 ; CHECK-NEXT: [[SEXT_A_1:%.*]] = sext i16 [[LD_A_1]] to i32
230 ; CHECK-NEXT: [[SEXT_B_1:%.*]] = sext i16 [[LD_B_1]] to i32
237 ; CHECK-NEXT: [[SEXT_A_2:%.*]] = sext i16 [[LD_A_2]] to i32
238 ; CHECK-NEXT: [[SEXT_B_2:%.*]] = sext i16 [[LD_B_2]] to i32
252 %sext.a.0 = sext i16 %ld.a.0 to i32
256 %sext.a.1 = sext i16 %ld.a.1 to i32
257 %sext.b.1 = sext i16 %ld.b.1 to i32
258 %sext.b.0 = sext i16 %ld.b.0 to i32
259 %mul.0 = mul i32 %sext.a.0, %sext.a.0
260 %mul.1 = mul i32 %sext.a.1, %sext.a.1
265 %sext.a.2 = sext i16 %ld.a.2 to i32
266 %sext.b.2 = sext i16 %ld.b.2 to i32
267 %mul.2 = mul i32 %sext.a.2, %sext.b.2
268 %add = add i32 %mul.1, %sext.b.1
272 %add.4 = add i32 %add.3, %sext.a.2