Lines Matching refs:DISABLE

4 …fcvt-fn-stop=0 -tail-dup-placement=0 -mtriple=thumb-macho | FileCheck %s --check-prefix=DISABLE-V4T
5 …vt-fn-stop=0 -tail-dup-placement=0 -mtriple=thumbv5-macho | FileCheck %s --check-prefix=DISABLE-V5T
73 ; DISABLE-V4T-LABEL: foo:
74 ; DISABLE-V4T:       @ %bb.0:
75 ; DISABLE-V4T-NEXT:    push {r7, lr}
76 ; DISABLE-V4T-NEXT:    .cfi_def_cfa_offset 8
77 ; DISABLE-V4T-NEXT:    .cfi_offset lr, -4
78 ; DISABLE-V4T-NEXT:    .cfi_offset r7, -8
79 ; DISABLE-V4T-NEXT:    sub sp, #8
80 ; DISABLE-V4T-NEXT:    .cfi_def_cfa_offset 16
81 ; DISABLE-V4T-NEXT:    cmp r0, r1
82 ; DISABLE-V4T-NEXT:    bge LBB0_2
83 ; DISABLE-V4T-NEXT:  @ %bb.1: @ %true
84 ; DISABLE-V4T-NEXT:    str r0, [sp, #4]
85 ; DISABLE-V4T-NEXT:    ldr r0, LCPI0_0
86 ; DISABLE-V4T-NEXT:  LPC0_0:
87 ; DISABLE-V4T-NEXT:    add r0, pc
88 ; DISABLE-V4T-NEXT:    ldr r2, [r0]
89 ; DISABLE-V4T-NEXT:    movs r0, #0
90 ; DISABLE-V4T-NEXT:    add r1, sp, #4
91 ; DISABLE-V4T-NEXT:    bl Ltmp0
92 ; DISABLE-V4T-NEXT:  LBB0_2: @ %false
93 ; DISABLE-V4T-NEXT:    add sp, #8
94 ; DISABLE-V4T-NEXT:    pop {r7}
95 ; DISABLE-V4T-NEXT:    pop {r1}
96 ; DISABLE-V4T-NEXT:    bx r1
97 ; DISABLE-V4T-NEXT:    .p2align 2
98 ; DISABLE-V4T-NEXT:  @ %bb.3:
99 ; DISABLE-V4T-NEXT:    .data_region
100 ; DISABLE-V4T-NEXT:  LCPI0_0:
101 ; DISABLE-V4T-NEXT:    .long L_doSomething$non_lazy_ptr-(LPC0_0+4)
102 ; DISABLE-V4T-NEXT:    .end_data_region
104 ; DISABLE-V5T-LABEL: foo:
105 ; DISABLE-V5T:       @ %bb.0:
106 ; DISABLE-V5T-NEXT:    push {r7, lr}
107 ; DISABLE-V5T-NEXT:    .cfi_def_cfa_offset 8
108 ; DISABLE-V5T-NEXT:    .cfi_offset lr, -4
109 ; DISABLE-V5T-NEXT:    .cfi_offset r7, -8
110 ; DISABLE-V5T-NEXT:    sub sp, #8
111 ; DISABLE-V5T-NEXT:    .cfi_def_cfa_offset 16
112 ; DISABLE-V5T-NEXT:    cmp r0, r1
113 ; DISABLE-V5T-NEXT:    bge LBB0_2
114 ; DISABLE-V5T-NEXT:  @ %bb.1: @ %true
115 ; DISABLE-V5T-NEXT:    str r0, [sp, #4]
116 ; DISABLE-V5T-NEXT:    movs r0, #0
117 ; DISABLE-V5T-NEXT:    add r1, sp, #4
118 ; DISABLE-V5T-NEXT:    bl _doSomething
119 ; DISABLE-V5T-NEXT:  LBB0_2: @ %false
120 ; DISABLE-V5T-NEXT:    add sp, #8
121 ; DISABLE-V5T-NEXT:    pop {r7, pc}
195 ; DISABLE-V4T-LABEL: bar:
196 ; DISABLE-V4T:       @ %bb.0:
197 ; DISABLE-V4T-NEXT:    push {r7, lr}
198 ; DISABLE-V4T-NEXT:    .cfi_def_cfa_offset 8
199 ; DISABLE-V4T-NEXT:    .cfi_offset lr, -4
200 ; DISABLE-V4T-NEXT:    .cfi_offset r7, -8
201 ; DISABLE-V4T-NEXT:    sub sp, #8
202 ; DISABLE-V4T-NEXT:    .cfi_def_cfa_offset 16
203 ; DISABLE-V4T-NEXT:    cmp r0, r1
204 ; DISABLE-V4T-NEXT:    bge LBB1_2
205 ; DISABLE-V4T-NEXT:  @ %bb.1: @ %true
206 ; DISABLE-V4T-NEXT:    str r0, [sp, #4]
207 ; DISABLE-V4T-NEXT:    ldr r0, LCPI1_0
208 ; DISABLE-V4T-NEXT:  LPC1_0:
209 ; DISABLE-V4T-NEXT:    add r0, pc
210 ; DISABLE-V4T-NEXT:    ldr r2, [r0]
211 ; DISABLE-V4T-NEXT:    movs r0, #0
212 ; DISABLE-V4T-NEXT:    add r1, sp, #4
213 ; DISABLE-V4T-NEXT:    bl Ltmp1
214 ; DISABLE-V4T-NEXT:  LBB1_2: @ %false
215 ; DISABLE-V4T-NEXT:    movs r0, #42
216 ; DISABLE-V4T-NEXT:    add sp, #8
217 ; DISABLE-V4T-NEXT:    pop {r7}
218 ; DISABLE-V4T-NEXT:    pop {r1}
219 ; DISABLE-V4T-NEXT:    bx r1
220 ; DISABLE-V4T-NEXT:    .p2align 2
221 ; DISABLE-V4T-NEXT:  @ %bb.3:
222 ; DISABLE-V4T-NEXT:    .data_region
223 ; DISABLE-V4T-NEXT:  LCPI1_0:
224 ; DISABLE-V4T-NEXT:    .long L_doSomething$non_lazy_ptr-(LPC1_0+4)
225 ; DISABLE-V4T-NEXT:    .end_data_region
227 ; DISABLE-V5T-LABEL: bar:
228 ; DISABLE-V5T:       @ %bb.0:
229 ; DISABLE-V5T-NEXT:    push {r7, lr}
230 ; DISABLE-V5T-NEXT:    .cfi_def_cfa_offset 8
231 ; DISABLE-V5T-NEXT:    .cfi_offset lr, -4
232 ; DISABLE-V5T-NEXT:    .cfi_offset r7, -8
233 ; DISABLE-V5T-NEXT:    sub sp, #8
234 ; DISABLE-V5T-NEXT:    .cfi_def_cfa_offset 16
235 ; DISABLE-V5T-NEXT:    cmp r0, r1
236 ; DISABLE-V5T-NEXT:    bge LBB1_2
237 ; DISABLE-V5T-NEXT:  @ %bb.1: @ %true
238 ; DISABLE-V5T-NEXT:    str r0, [sp, #4]
239 ; DISABLE-V5T-NEXT:    movs r0, #0
240 ; DISABLE-V5T-NEXT:    add r1, sp, #4
241 ; DISABLE-V5T-NEXT:    bl _doSomething
242 ; DISABLE-V5T-NEXT:  LBB1_2: @ %false
243 ; DISABLE-V5T-NEXT:    movs r0, #42
244 ; DISABLE-V5T-NEXT:    add sp, #8
245 ; DISABLE-V5T-NEXT:    pop {r7, pc}
327 ; DISABLE-V4T-LABEL: freqSaveAndRestoreOutsideLoop:
328 ; DISABLE-V4T:       @ %bb.0: @ %entry
329 ; DISABLE-V4T-NEXT:    push {r4, lr}
330 ; DISABLE-V4T-NEXT:    .cfi_def_cfa_offset 8
331 ; DISABLE-V4T-NEXT:    .cfi_offset lr, -4
332 ; DISABLE-V4T-NEXT:    .cfi_offset r4, -8
333 ; DISABLE-V4T-NEXT:    cmp r0, #0
334 ; DISABLE-V4T-NEXT:    beq LBB2_4
335 ; DISABLE-V4T-NEXT:  @ %bb.1: @ %for.preheader
336 ; DISABLE-V4T-NEXT:    @ InlineAsm Start
337 ; DISABLE-V4T-NEXT:    mov r8, r8
338 ; DISABLE-V4T-NEXT:    @ InlineAsm End
339 ; DISABLE-V4T-NEXT:    movs r0, #0
340 ; DISABLE-V4T-NEXT:    movs r1, #10
341 ; DISABLE-V4T-NEXT:  LBB2_2: @ %for.body
342 ; DISABLE-V4T-NEXT:    @ =>This Inner Loop Header: Depth=1
343 ; DISABLE-V4T-NEXT:    @ InlineAsm Start
344 ; DISABLE-V4T-NEXT:    movs r2, #1
345 ; DISABLE-V4T-NEXT:    @ InlineAsm End
346 ; DISABLE-V4T-NEXT:    adds r0, r2, r0
347 ; DISABLE-V4T-NEXT:    subs r1, r1, #1
348 ; DISABLE-V4T-NEXT:    bne LBB2_2
349 ; DISABLE-V4T-NEXT:  @ %bb.3: @ %for.end
350 ; DISABLE-V4T-NEXT:    lsls r0, r0, #3
351 ; DISABLE-V4T-NEXT:    b LBB2_5
352 ; DISABLE-V4T-NEXT:  LBB2_4: @ %if.else
353 ; DISABLE-V4T-NEXT:    lsls r0, r1, #1
354 ; DISABLE-V4T-NEXT:  LBB2_5: @ %if.end
355 ; DISABLE-V4T-NEXT:    pop {r4}
356 ; DISABLE-V4T-NEXT:    pop {r1}
357 ; DISABLE-V4T-NEXT:    bx r1
359 ; DISABLE-V5T-LABEL: freqSaveAndRestoreOutsideLoop:
360 ; DISABLE-V5T:       @ %bb.0: @ %entry
361 ; DISABLE-V5T-NEXT:    push {r4, lr}
362 ; DISABLE-V5T-NEXT:    .cfi_def_cfa_offset 8
363 ; DISABLE-V5T-NEXT:    .cfi_offset lr, -4
364 ; DISABLE-V5T-NEXT:    .cfi_offset r4, -8
365 ; DISABLE-V5T-NEXT:    cmp r0, #0
366 ; DISABLE-V5T-NEXT:    beq LBB2_4
367 ; DISABLE-V5T-NEXT:  @ %bb.1: @ %for.preheader
368 ; DISABLE-V5T-NEXT:    @ InlineAsm Start
369 ; DISABLE-V5T-NEXT:    mov r8, r8
370 ; DISABLE-V5T-NEXT:    @ InlineAsm End
371 ; DISABLE-V5T-NEXT:    movs r0, #0
372 ; DISABLE-V5T-NEXT:    movs r1, #10
373 ; DISABLE-V5T-NEXT:  LBB2_2: @ %for.body
374 ; DISABLE-V5T-NEXT:    @ =>This Inner Loop Header: Depth=1
375 ; DISABLE-V5T-NEXT:    @ InlineAsm Start
376 ; DISABLE-V5T-NEXT:    movs r2, #1
377 ; DISABLE-V5T-NEXT:    @ InlineAsm End
378 ; DISABLE-V5T-NEXT:    adds r0, r2, r0
379 ; DISABLE-V5T-NEXT:    subs r1, r1, #1
380 ; DISABLE-V5T-NEXT:    bne LBB2_2
381 ; DISABLE-V5T-NEXT:  @ %bb.3: @ %for.end
382 ; DISABLE-V5T-NEXT:    lsls r0, r0, #3
383 ; DISABLE-V5T-NEXT:    pop {r4, pc}
384 ; DISABLE-V5T-NEXT:  LBB2_4: @ %if.else
385 ; DISABLE-V5T-NEXT:    lsls r0, r1, #1
386 ; DISABLE-V5T-NEXT:    pop {r4, pc}
476 ; DISABLE-V4T-LABEL: freqSaveAndRestoreOutsideLoop2:
477 ; DISABLE-V4T:       @ %bb.0: @ %entry
478 ; DISABLE-V4T-NEXT:    push {r4, lr}
479 ; DISABLE-V4T-NEXT:    .cfi_def_cfa_offset 8
480 ; DISABLE-V4T-NEXT:    .cfi_offset lr, -4
481 ; DISABLE-V4T-NEXT:    .cfi_offset r4, -8
482 ; DISABLE-V4T-NEXT:    @ InlineAsm Start
483 ; DISABLE-V4T-NEXT:    mov r8, r8
484 ; DISABLE-V4T-NEXT:    @ InlineAsm End
485 ; DISABLE-V4T-NEXT:    movs r0, #0
486 ; DISABLE-V4T-NEXT:    movs r1, #10
487 ; DISABLE-V4T-NEXT:  LBB3_1: @ %for.body
488 ; DISABLE-V4T-NEXT:    @ =>This Inner Loop Header: Depth=1
489 ; DISABLE-V4T-NEXT:    @ InlineAsm Start
490 ; DISABLE-V4T-NEXT:    movs r2, #1
491 ; DISABLE-V4T-NEXT:    @ InlineAsm End
492 ; DISABLE-V4T-NEXT:    adds r0, r2, r0
493 ; DISABLE-V4T-NEXT:    subs r1, r1, #1
494 ; DISABLE-V4T-NEXT:    bne LBB3_1
495 ; DISABLE-V4T-NEXT:  @ %bb.2: @ %for.exit
496 ; DISABLE-V4T-NEXT:    @ InlineAsm Start
497 ; DISABLE-V4T-NEXT:    mov r8, r8
498 ; DISABLE-V4T-NEXT:    @ InlineAsm End
499 ; DISABLE-V4T-NEXT:    pop {r4}
500 ; DISABLE-V4T-NEXT:    pop {r1}
501 ; DISABLE-V4T-NEXT:    bx r1
503 ; DISABLE-V5T-LABEL: freqSaveAndRestoreOutsideLoop2:
504 ; DISABLE-V5T:       @ %bb.0: @ %entry
505 ; DISABLE-V5T-NEXT:    push {r4, lr}
506 ; DISABLE-V5T-NEXT:    .cfi_def_cfa_offset 8
507 ; DISABLE-V5T-NEXT:    .cfi_offset lr, -4
508 ; DISABLE-V5T-NEXT:    .cfi_offset r4, -8
509 ; DISABLE-V5T-NEXT:    @ InlineAsm Start
510 ; DISABLE-V5T-NEXT:    mov r8, r8
511 ; DISABLE-V5T-NEXT:    @ InlineAsm End
512 ; DISABLE-V5T-NEXT:    movs r0, #0
513 ; DISABLE-V5T-NEXT:    movs r1, #10
514 ; DISABLE-V5T-NEXT:  LBB3_1: @ %for.body
515 ; DISABLE-V5T-NEXT:    @ =>This Inner Loop Header: Depth=1
516 ; DISABLE-V5T-NEXT:    @ InlineAsm Start
517 ; DISABLE-V5T-NEXT:    movs r2, #1
518 ; DISABLE-V5T-NEXT:    @ InlineAsm End
519 ; DISABLE-V5T-NEXT:    adds r0, r2, r0
520 ; DISABLE-V5T-NEXT:    subs r1, r1, #1
521 ; DISABLE-V5T-NEXT:    bne LBB3_1
522 ; DISABLE-V5T-NEXT:  @ %bb.2: @ %for.exit
523 ; DISABLE-V5T-NEXT:    @ InlineAsm Start
524 ; DISABLE-V5T-NEXT:    mov r8, r8
525 ; DISABLE-V5T-NEXT:    @ InlineAsm End
526 ; DISABLE-V5T-NEXT:    pop {r4, pc}
621 ; DISABLE-V4T-LABEL: loopInfoSaveOutsideLoop:
622 ; DISABLE-V4T:       @ %bb.0: @ %entry
623 ; DISABLE-V4T-NEXT:    push {r4, lr}
624 ; DISABLE-V4T-NEXT:    .cfi_def_cfa_offset 8
625 ; DISABLE-V4T-NEXT:    .cfi_offset lr, -4
626 ; DISABLE-V4T-NEXT:    .cfi_offset r4, -8
627 ; DISABLE-V4T-NEXT:    cmp r0, #0
628 ; DISABLE-V4T-NEXT:    beq LBB4_4
629 ; DISABLE-V4T-NEXT:  @ %bb.1: @ %for.preheader
630 ; DISABLE-V4T-NEXT:    @ InlineAsm Start
631 ; DISABLE-V4T-NEXT:    mov r8, r8
632 ; DISABLE-V4T-NEXT:    @ InlineAsm End
633 ; DISABLE-V4T-NEXT:    movs r0, #0
634 ; DISABLE-V4T-NEXT:    movs r1, #10
635 ; DISABLE-V4T-NEXT:  LBB4_2: @ %for.body
636 ; DISABLE-V4T-NEXT:    @ =>This Inner Loop Header: Depth=1
637 ; DISABLE-V4T-NEXT:    @ InlineAsm Start
638 ; DISABLE-V4T-NEXT:    movs r2, #1
639 ; DISABLE-V4T-NEXT:    @ InlineAsm End
640 ; DISABLE-V4T-NEXT:    adds r0, r2, r0
641 ; DISABLE-V4T-NEXT:    subs r1, r1, #1
642 ; DISABLE-V4T-NEXT:    bne LBB4_2
643 ; DISABLE-V4T-NEXT:  @ %bb.3: @ %for.end
644 ; DISABLE-V4T-NEXT:    @ InlineAsm Start
645 ; DISABLE-V4T-NEXT:    mov r8, r8
646 ; DISABLE-V4T-NEXT:    @ InlineAsm End
647 ; DISABLE-V4T-NEXT:    lsls r0, r0, #3
648 ; DISABLE-V4T-NEXT:    b LBB4_5
649 ; DISABLE-V4T-NEXT:  LBB4_4: @ %if.else
650 ; DISABLE-V4T-NEXT:    lsls r0, r1, #1
651 ; DISABLE-V4T-NEXT:  LBB4_5: @ %if.end
652 ; DISABLE-V4T-NEXT:    pop {r4}
653 ; DISABLE-V4T-NEXT:    pop {r1}
654 ; DISABLE-V4T-NEXT:    bx r1
656 ; DISABLE-V5T-LABEL: loopInfoSaveOutsideLoop:
657 ; DISABLE-V5T:       @ %bb.0: @ %entry
658 ; DISABLE-V5T-NEXT:    push {r4, lr}
659 ; DISABLE-V5T-NEXT:    .cfi_def_cfa_offset 8
660 ; DISABLE-V5T-NEXT:    .cfi_offset lr, -4
661 ; DISABLE-V5T-NEXT:    .cfi_offset r4, -8
662 ; DISABLE-V5T-NEXT:    cmp r0, #0
663 ; DISABLE-V5T-NEXT:    beq LBB4_4
664 ; DISABLE-V5T-NEXT:  @ %bb.1: @ %for.preheader
665 ; DISABLE-V5T-NEXT:    @ InlineAsm Start
666 ; DISABLE-V5T-NEXT:    mov r8, r8
667 ; DISABLE-V5T-NEXT:    @ InlineAsm End
668 ; DISABLE-V5T-NEXT:    movs r0, #0
669 ; DISABLE-V5T-NEXT:    movs r1, #10
670 ; DISABLE-V5T-NEXT:  LBB4_2: @ %for.body
671 ; DISABLE-V5T-NEXT:    @ =>This Inner Loop Header: Depth=1
672 ; DISABLE-V5T-NEXT:    @ InlineAsm Start
673 ; DISABLE-V5T-NEXT:    movs r2, #1
674 ; DISABLE-V5T-NEXT:    @ InlineAsm End
675 ; DISABLE-V5T-NEXT:    adds r0, r2, r0
676 ; DISABLE-V5T-NEXT:    subs r1, r1, #1
677 ; DISABLE-V5T-NEXT:    bne LBB4_2
678 ; DISABLE-V5T-NEXT:  @ %bb.3: @ %for.end
679 ; DISABLE-V5T-NEXT:    @ InlineAsm Start
680 ; DISABLE-V5T-NEXT:    mov r8, r8
681 ; DISABLE-V5T-NEXT:    @ InlineAsm End
682 ; DISABLE-V5T-NEXT:    lsls r0, r0, #3
683 ; DISABLE-V5T-NEXT:    pop {r4, pc}
684 ; DISABLE-V5T-NEXT:  LBB4_4: @ %if.else
685 ; DISABLE-V5T-NEXT:    lsls r0, r1, #1
686 ; DISABLE-V5T-NEXT:    pop {r4, pc}
798 ; DISABLE-V4T-LABEL: loopInfoRestoreOutsideLoop:
799 ; DISABLE-V4T:       @ %bb.0: @ %entry
800 ; DISABLE-V4T-NEXT:    push {r4, lr}
801 ; DISABLE-V4T-NEXT:    cmp r0, #0
802 ; DISABLE-V4T-NEXT:    beq LBB5_4
803 ; DISABLE-V4T-NEXT:  @ %bb.1: @ %if.then
804 ; DISABLE-V4T-NEXT:    @ InlineAsm Start
805 ; DISABLE-V4T-NEXT:    mov r8, r8
806 ; DISABLE-V4T-NEXT:    @ InlineAsm End
807 ; DISABLE-V4T-NEXT:    movs r0, #0
808 ; DISABLE-V4T-NEXT:    movs r1, #10
809 ; DISABLE-V4T-NEXT:  LBB5_2: @ %for.body
810 ; DISABLE-V4T-NEXT:    @ =>This Inner Loop Header: Depth=1
811 ; DISABLE-V4T-NEXT:    @ InlineAsm Start
812 ; DISABLE-V4T-NEXT:    movs r2, #1
813 ; DISABLE-V4T-NEXT:    @ InlineAsm End
814 ; DISABLE-V4T-NEXT:    adds r0, r2, r0
815 ; DISABLE-V4T-NEXT:    subs r1, r1, #1
816 ; DISABLE-V4T-NEXT:    bne LBB5_2
817 ; DISABLE-V4T-NEXT:  @ %bb.3: @ %for.end
818 ; DISABLE-V4T-NEXT:    lsls r0, r0, #3
819 ; DISABLE-V4T-NEXT:    b LBB5_5
820 ; DISABLE-V4T-NEXT:  LBB5_4: @ %if.else
821 ; DISABLE-V4T-NEXT:    lsls r0, r1, #1
822 ; DISABLE-V4T-NEXT:  LBB5_5: @ %if.end
823 ; DISABLE-V4T-NEXT:    pop {r4}
824 ; DISABLE-V4T-NEXT:    pop {r1}
825 ; DISABLE-V4T-NEXT:    bx r1
826 ; DISABLE-V4T-NEXT:    @ -- End function
827 ; DISABLE-V4T-NEXT:    .globl _emptyFrame @ -- Begin function emptyFrame
828 ; DISABLE-V4T-NEXT:    .p2align 1
829 ; DISABLE-V4T-NEXT:    .code 16 @ @emptyFrame
830 ; DISABLE-V4T-NEXT:    .thumb_func _emptyFrame
831 ; DISABLE-V4T-NEXT:  _emptyFrame:
832 ; DISABLE-V4T-NEXT:    .cfi_startproc
833 ; DISABLE-V4T-NEXT:  @ %bb.0: @ %entry
834 ; DISABLE-V4T-NEXT:    movs r0, #0
835 ; DISABLE-V4T-NEXT:    bx lr
837 ; DISABLE-V5T-LABEL: loopInfoRestoreOutsideLoop:
838 ; DISABLE-V5T:       @ %bb.0: @ %entry
839 ; DISABLE-V5T-NEXT:    push {r4, lr}
840 ; DISABLE-V5T-NEXT:    cmp r0, #0
841 ; DISABLE-V5T-NEXT:    beq LBB5_4
842 ; DISABLE-V5T-NEXT:  @ %bb.1: @ %if.then
843 ; DISABLE-V5T-NEXT:    @ InlineAsm Start
844 ; DISABLE-V5T-NEXT:    mov r8, r8
845 ; DISABLE-V5T-NEXT:    @ InlineAsm End
846 ; DISABLE-V5T-NEXT:    movs r0, #0
847 ; DISABLE-V5T-NEXT:    movs r1, #10
848 ; DISABLE-V5T-NEXT:  LBB5_2: @ %for.body
849 ; DISABLE-V5T-NEXT:    @ =>This Inner Loop Header: Depth=1
850 ; DISABLE-V5T-NEXT:    @ InlineAsm Start
851 ; DISABLE-V5T-NEXT:    movs r2, #1
852 ; DISABLE-V5T-NEXT:    @ InlineAsm End
853 ; DISABLE-V5T-NEXT:    adds r0, r2, r0
854 ; DISABLE-V5T-NEXT:    subs r1, r1, #1
855 ; DISABLE-V5T-NEXT:    bne LBB5_2
856 ; DISABLE-V5T-NEXT:  @ %bb.3: @ %for.end
857 ; DISABLE-V5T-NEXT:    lsls r0, r0, #3
858 ; DISABLE-V5T-NEXT:    pop {r4, pc}
859 ; DISABLE-V5T-NEXT:  LBB5_4: @ %if.else
860 ; DISABLE-V5T-NEXT:    lsls r0, r1, #1
861 ; DISABLE-V5T-NEXT:    pop {r4, pc}
862 ; DISABLE-V5T-NEXT:    @ -- End function
863 ; DISABLE-V5T-NEXT:    .globl _emptyFrame @ -- Begin function emptyFrame
864 ; DISABLE-V5T-NEXT:    .p2align 1
865 ; DISABLE-V5T-NEXT:    .code 16 @ @emptyFrame
866 ; DISABLE-V5T-NEXT:    .thumb_func _emptyFrame
867 ; DISABLE-V5T-NEXT:  _emptyFrame:
868 ; DISABLE-V5T-NEXT:    .cfi_startproc
869 ; DISABLE-V5T-NEXT:  @ %bb.0: @ %entry
870 ; DISABLE-V5T-NEXT:    movs r0, #0
871 ; DISABLE-V5T-NEXT:    bx lr
973 ; DISABLE-V4T-LABEL: inlineAsm:
974 ; DISABLE-V4T:       @ %bb.0: @ %entry
975 ; DISABLE-V4T-NEXT:    push {r4, lr}
976 ; DISABLE-V4T-NEXT:    .cfi_def_cfa_offset 8
977 ; DISABLE-V4T-NEXT:    .cfi_offset lr, -4
978 ; DISABLE-V4T-NEXT:    .cfi_offset r4, -8
979 ; DISABLE-V4T-NEXT:    cmp r0, #0
980 ; DISABLE-V4T-NEXT:    beq LBB7_4
981 ; DISABLE-V4T-NEXT:  @ %bb.1: @ %for.preheader
982 ; DISABLE-V4T-NEXT:    @ InlineAsm Start
983 ; DISABLE-V4T-NEXT:    mov r8, r8
984 ; DISABLE-V4T-NEXT:    @ InlineAsm End
985 ; DISABLE-V4T-NEXT:    movs r0, #10
986 ; DISABLE-V4T-NEXT:  LBB7_2: @ %for.body
987 ; DISABLE-V4T-NEXT:    @ =>This Inner Loop Header: Depth=1
988 ; DISABLE-V4T-NEXT:    @ InlineAsm Start
989 ; DISABLE-V4T-NEXT:    movs r4, #1
990 ; DISABLE-V4T-NEXT:    @ InlineAsm End
991 ; DISABLE-V4T-NEXT:    subs r0, r0, #1
992 ; DISABLE-V4T-NEXT:    bne LBB7_2
993 ; DISABLE-V4T-NEXT:  @ %bb.3: @ %for.exit
994 ; DISABLE-V4T-NEXT:    @ InlineAsm Start
995 ; DISABLE-V4T-NEXT:    mov r8, r8
996 ; DISABLE-V4T-NEXT:    @ InlineAsm End
997 ; DISABLE-V4T-NEXT:    movs r0, #0
998 ; DISABLE-V4T-NEXT:    b LBB7_5
999 ; DISABLE-V4T-NEXT:  LBB7_4: @ %if.else
1000 ; DISABLE-V4T-NEXT:    lsls r0, r1, #1
1001 ; DISABLE-V4T-NEXT:  LBB7_5: @ %if.end
1002 ; DISABLE-V4T-NEXT:    pop {r4}
1003 ; DISABLE-V4T-NEXT:    pop {r1}
1004 ; DISABLE-V4T-NEXT:    bx r1
1006 ; DISABLE-V5T-LABEL: inlineAsm:
1007 ; DISABLE-V5T:       @ %bb.0: @ %entry
1008 ; DISABLE-V5T-NEXT:    push {r4, lr}
1009 ; DISABLE-V5T-NEXT:    .cfi_def_cfa_offset 8
1010 ; DISABLE-V5T-NEXT:    .cfi_offset lr, -4
1011 ; DISABLE-V5T-NEXT:    .cfi_offset r4, -8
1012 ; DISABLE-V5T-NEXT:    cmp r0, #0
1013 ; DISABLE-V5T-NEXT:    beq LBB7_4
1014 ; DISABLE-V5T-NEXT:  @ %bb.1: @ %for.preheader
1015 ; DISABLE-V5T-NEXT:    @ InlineAsm Start
1016 ; DISABLE-V5T-NEXT:    mov r8, r8
1017 ; DISABLE-V5T-NEXT:    @ InlineAsm End
1018 ; DISABLE-V5T-NEXT:    movs r0, #10
1019 ; DISABLE-V5T-NEXT:  LBB7_2: @ %for.body
1020 ; DISABLE-V5T-NEXT:    @ =>This Inner Loop Header: Depth=1
1021 ; DISABLE-V5T-NEXT:    @ InlineAsm Start
1022 ; DISABLE-V5T-NEXT:    movs r4, #1
1023 ; DISABLE-V5T-NEXT:    @ InlineAsm End
1024 ; DISABLE-V5T-NEXT:    subs r0, r0, #1
1025 ; DISABLE-V5T-NEXT:    bne LBB7_2
1026 ; DISABLE-V5T-NEXT:  @ %bb.3: @ %for.exit
1027 ; DISABLE-V5T-NEXT:    @ InlineAsm Start
1028 ; DISABLE-V5T-NEXT:    mov r8, r8
1029 ; DISABLE-V5T-NEXT:    @ InlineAsm End
1030 ; DISABLE-V5T-NEXT:    movs r0, #0
1031 ; DISABLE-V5T-NEXT:    pop {r4, pc}
1032 ; DISABLE-V5T-NEXT:  LBB7_4: @ %if.else
1033 ; DISABLE-V5T-NEXT:    lsls r0, r1, #1
1034 ; DISABLE-V5T-NEXT:    pop {r4, pc}
1128 ; DISABLE-V4T-LABEL: callVariadicFunc:
1129 ; DISABLE-V4T:       @ %bb.0: @ %entry
1130 ; DISABLE-V4T-NEXT:    push {r4, lr}
1131 ; DISABLE-V4T-NEXT:    .cfi_def_cfa_offset 8
1132 ; DISABLE-V4T-NEXT:    .cfi_offset lr, -4
1133 ; DISABLE-V4T-NEXT:    .cfi_offset r4, -8
1134 ; DISABLE-V4T-NEXT:    sub sp, #16
1135 ; DISABLE-V4T-NEXT:    .cfi_def_cfa_offset 24
1136 ; DISABLE-V4T-NEXT:    cmp r0, #0
1137 ; DISABLE-V4T-NEXT:    beq LBB8_2
1138 ; DISABLE-V4T-NEXT:  @ %bb.1: @ %if.then
1139 ; DISABLE-V4T-NEXT:    str r1, [sp]
1140 ; DISABLE-V4T-NEXT:    str r1, [sp, #4]
1141 ; DISABLE-V4T-NEXT:    str r1, [sp, #8]
1142 ; DISABLE-V4T-NEXT:    ldr r0, LCPI8_0
1143 ; DISABLE-V4T-NEXT:  LPC8_0:
1144 ; DISABLE-V4T-NEXT:    add r0, pc
1145 ; DISABLE-V4T-NEXT:    ldr r4, [r0]
1146 ; DISABLE-V4T-NEXT:    movs r0, r1
1147 ; DISABLE-V4T-NEXT:    movs r2, r1
1148 ; DISABLE-V4T-NEXT:    movs r3, r1
1149 ; DISABLE-V4T-NEXT:    bl Ltmp2
1150 ; DISABLE-V4T-NEXT:    lsls r0, r0, #3
1151 ; DISABLE-V4T-NEXT:    b LBB8_3
1152 ; DISABLE-V4T-NEXT:  LBB8_2: @ %if.else
1153 ; DISABLE-V4T-NEXT:    lsls r0, r1, #1
1154 ; DISABLE-V4T-NEXT:  LBB8_3: @ %if.end
1155 ; DISABLE-V4T-NEXT:    add sp, #16
1156 ; DISABLE-V4T-NEXT:    pop {r4}
1157 ; DISABLE-V4T-NEXT:    pop {r1}
1158 ; DISABLE-V4T-NEXT:    bx r1
1159 ; DISABLE-V4T-NEXT:    .p2align 2
1160 ; DISABLE-V4T-NEXT:  @ %bb.4:
1161 ; DISABLE-V4T-NEXT:    .data_region
1162 ; DISABLE-V4T-NEXT:  LCPI8_0:
1163 ; DISABLE-V4T-NEXT:    .long L_someVariadicFunc$non_lazy_ptr-(LPC8_0+4)
1164 ; DISABLE-V4T-NEXT:    .end_data_region
1166 ; DISABLE-V5T-LABEL: callVariadicFunc:
1167 ; DISABLE-V5T:       @ %bb.0: @ %entry
1168 ; DISABLE-V5T-NEXT:    push {r7, lr}
1169 ; DISABLE-V5T-NEXT:    .cfi_def_cfa_offset 8
1170 ; DISABLE-V5T-NEXT:    .cfi_offset lr, -4
1171 ; DISABLE-V5T-NEXT:    .cfi_offset r7, -8
1172 ; DISABLE-V5T-NEXT:    sub sp, #16
1173 ; DISABLE-V5T-NEXT:    .cfi_def_cfa_offset 24
1174 ; DISABLE-V5T-NEXT:    cmp r0, #0
1175 ; DISABLE-V5T-NEXT:    beq LBB8_2
1176 ; DISABLE-V5T-NEXT:  @ %bb.1: @ %if.then
1177 ; DISABLE-V5T-NEXT:    str r1, [sp]
1178 ; DISABLE-V5T-NEXT:    str r1, [sp, #4]
1179 ; DISABLE-V5T-NEXT:    str r1, [sp, #8]
1180 ; DISABLE-V5T-NEXT:    movs r0, r1
1181 ; DISABLE-V5T-NEXT:    movs r2, r1
1182 ; DISABLE-V5T-NEXT:    movs r3, r1
1183 ; DISABLE-V5T-NEXT:    bl _someVariadicFunc
1184 ; DISABLE-V5T-NEXT:    lsls r0, r0, #3
1185 ; DISABLE-V5T-NEXT:    add sp, #16
1186 ; DISABLE-V5T-NEXT:    pop {r7, pc}
1187 ; DISABLE-V5T-NEXT:  LBB8_2: @ %if.else
1188 ; DISABLE-V5T-NEXT:    lsls r0, r1, #1
1189 ; DISABLE-V5T-NEXT:    add sp, #16
1190 ; DISABLE-V5T-NEXT:    pop {r7, pc}
1260 ; DISABLE-V4T-LABEL: noreturn:
1261 ; DISABLE-V4T:       @ %bb.0: @ %entry
1262 ; DISABLE-V4T-NEXT:    push {r4, lr}
1263 ; DISABLE-V4T-NEXT:    .cfi_def_cfa_offset 8
1264 ; DISABLE-V4T-NEXT:    .cfi_offset lr, -4
1265 ; DISABLE-V4T-NEXT:    .cfi_offset r4, -8
1266 ; DISABLE-V4T-NEXT:    cmp r0, #0
1267 ; DISABLE-V4T-NEXT:    bne LBB9_2
1268 ; DISABLE-V4T-NEXT:  @ %bb.1: @ %if.end
1269 ; DISABLE-V4T-NEXT:    movs r0, #42
1270 ; DISABLE-V4T-NEXT:    pop {r4}
1271 ; DISABLE-V4T-NEXT:    pop {r1}
1272 ; DISABLE-V4T-NEXT:    bx r1
1273 ; DISABLE-V4T-NEXT:  LBB9_2: @ %if.abort
1274 ; DISABLE-V4T-NEXT:    ldr r0, LCPI9_0
1275 ; DISABLE-V4T-NEXT:  LPC9_0:
1276 ; DISABLE-V4T-NEXT:    add r0, pc
1277 ; DISABLE-V4T-NEXT:    ldr r0, [r0]
1278 ; DISABLE-V4T-NEXT:    @ InlineAsm Start
1279 ; DISABLE-V4T-NEXT:    movs r1, #1
1280 ; DISABLE-V4T-NEXT:    @ InlineAsm End
1281 ; DISABLE-V4T-NEXT:    bl Ltmp3
1282 ; DISABLE-V4T-NEXT:    .p2align 2
1283 ; DISABLE-V4T-NEXT:  @ %bb.3:
1284 ; DISABLE-V4T-NEXT:    .data_region
1285 ; DISABLE-V4T-NEXT:  LCPI9_0:
1286 ; DISABLE-V4T-NEXT:    .long L_abort$non_lazy_ptr-(LPC9_0+4)
1287 ; DISABLE-V4T-NEXT:    .end_data_region
1289 ; DISABLE-V5T-LABEL: noreturn:
1290 ; DISABLE-V5T:       @ %bb.0: @ %entry
1291 ; DISABLE-V5T-NEXT:    push {r4, lr}
1292 ; DISABLE-V5T-NEXT:    .cfi_def_cfa_offset 8
1293 ; DISABLE-V5T-NEXT:    .cfi_offset lr, -4
1294 ; DISABLE-V5T-NEXT:    .cfi_offset r4, -8
1295 ; DISABLE-V5T-NEXT:    cmp r0, #0
1296 ; DISABLE-V5T-NEXT:    bne LBB9_2
1297 ; DISABLE-V5T-NEXT:  @ %bb.1: @ %if.end
1298 ; DISABLE-V5T-NEXT:    movs r0, #42
1299 ; DISABLE-V5T-NEXT:    pop {r4, pc}
1300 ; DISABLE-V5T-NEXT:  LBB9_2: @ %if.abort
1301 ; DISABLE-V5T-NEXT:    @ InlineAsm Start
1302 ; DISABLE-V5T-NEXT:    movs r0, #1
1303 ; DISABLE-V5T-NEXT:    @ InlineAsm End
1304 ; DISABLE-V5T-NEXT:    bl _abort
1375 ; DISABLE-V4T-LABEL: b_to_bx:
1376 ; DISABLE-V4T:       @ %bb.0: @ %entry
1377 ; DISABLE-V4T-NEXT:    push {r7, lr}
1378 ; DISABLE-V4T-NEXT:    .cfi_def_cfa_offset 8
1379 ; DISABLE-V4T-NEXT:    .cfi_offset lr, -4
1380 ; DISABLE-V4T-NEXT:    .cfi_offset r7, -8
1381 ; DISABLE-V4T-NEXT:    movs r1, r0
1382 ; DISABLE-V4T-NEXT:    cmp r0, #49
1383 ; DISABLE-V4T-NEXT:    bgt LBB10_2
1384 ; DISABLE-V4T-NEXT:  @ %bb.1: @ %if.then
1385 ; DISABLE-V4T-NEXT:    ldr r0, LCPI10_0
1386 ; DISABLE-V4T-NEXT:    ldr r2, LCPI10_1
1387 ; DISABLE-V4T-NEXT:  LPC10_0:
1388 ; DISABLE-V4T-NEXT:    add r2, pc
1389 ; DISABLE-V4T-NEXT:    bl Ltmp4
1390 ; DISABLE-V4T-NEXT:    b LBB10_3
1391 ; DISABLE-V4T-NEXT:  LBB10_2: @ %if.else
1392 ; DISABLE-V4T-NEXT:    lsls r0, r1, #1
1393 ; DISABLE-V4T-NEXT:  LBB10_3: @ %if.end
1394 ; DISABLE-V4T-NEXT:    pop {r7}
1395 ; DISABLE-V4T-NEXT:    pop {r1}
1396 ; DISABLE-V4T-NEXT:    bx r1
1397 ; DISABLE-V4T-NEXT:    .p2align 2
1398 ; DISABLE-V4T-NEXT:  @ %bb.4:
1399 ; DISABLE-V4T-NEXT:    .data_region
1400 ; DISABLE-V4T-NEXT:  LCPI10_0:
1401 ; DISABLE-V4T-NEXT:    .long 5000 @ 0x1388
1402 ; DISABLE-V4T-NEXT:  LCPI10_1:
1403 ; DISABLE-V4T-NEXT:    .long ___divsi3-(LPC10_0+4)
1404 ; DISABLE-V4T-NEXT:    .end_data_region
1406 ; DISABLE-V5T-LABEL: b_to_bx:
1407 ; DISABLE-V5T:       @ %bb.0: @ %entry
1408 ; DISABLE-V5T-NEXT:    push {r7, lr}
1409 ; DISABLE-V5T-NEXT:    .cfi_def_cfa_offset 8
1410 ; DISABLE-V5T-NEXT:    .cfi_offset lr, -4
1411 ; DISABLE-V5T-NEXT:    .cfi_offset r7, -8
1412 ; DISABLE-V5T-NEXT:    movs r1, r0
1413 ; DISABLE-V5T-NEXT:    cmp r0, #49
1414 ; DISABLE-V5T-NEXT:    bgt LBB10_2
1415 ; DISABLE-V5T-NEXT:  @ %bb.1: @ %if.then
1416 ; DISABLE-V5T-NEXT:    ldr r0, LCPI10_0
1417 ; DISABLE-V5T-NEXT:    bl ___divsi3
1418 ; DISABLE-V5T-NEXT:    pop {r7, pc}
1419 ; DISABLE-V5T-NEXT:  LBB10_2: @ %if.else
1420 ; DISABLE-V5T-NEXT:    lsls r0, r1, #1
1421 ; DISABLE-V5T-NEXT:    pop {r7, pc}
1422 ; DISABLE-V5T-NEXT:    .p2align 2
1423 ; DISABLE-V5T-NEXT:  @ %bb.3:
1424 ; DISABLE-V5T-NEXT:    .data_region
1425 ; DISABLE-V5T-NEXT:  LCPI10_0:
1426 ; DISABLE-V5T-NEXT:    .long 5000 @ 0x1388
1427 ; DISABLE-V5T-NEXT:    .end_data_region
1490 ; DISABLE-V4T-LABEL: beq_to_bx:
1491 ; DISABLE-V4T:       @ %bb.0: @ %entry
1492 ; DISABLE-V4T-NEXT:    push {r4, lr}
1493 ; DISABLE-V4T-NEXT:    .cfi_def_cfa_offset 8
1494 ; DISABLE-V4T-NEXT:    .cfi_offset lr, -4
1495 ; DISABLE-V4T-NEXT:    .cfi_offset r4, -8
1496 ; DISABLE-V4T-NEXT:    movs r2, r0
1497 ; DISABLE-V4T-NEXT:    movs r0, #1
1498 ; DISABLE-V4T-NEXT:    cmp r2, #0
1499 ; DISABLE-V4T-NEXT:    beq LBB11_3
1500 ; DISABLE-V4T-NEXT:  @ %bb.1: @ %if.end
1501 ; DISABLE-V4T-NEXT:    ldr r3, [r2]
1502 ; DISABLE-V4T-NEXT:    lsls r4, r3, #30
1503 ; DISABLE-V4T-NEXT:    bpl LBB11_3
1504 ; DISABLE-V4T-NEXT:  @ %bb.2: @ %if.end4
1505 ; DISABLE-V4T-NEXT:    str r1, [r2]
1506 ; DISABLE-V4T-NEXT:    str r3, [r2]
1507 ; DISABLE-V4T-NEXT:    movs r0, #0
1508 ; DISABLE-V4T-NEXT:  LBB11_3: @ %cleanup
1509 ; DISABLE-V4T-NEXT:    pop {r4}
1510 ; DISABLE-V4T-NEXT:    pop {r1}
1511 ; DISABLE-V4T-NEXT:    bx r1
1513 ; DISABLE-V5T-LABEL: beq_to_bx:
1514 ; DISABLE-V5T:       @ %bb.0: @ %entry
1515 ; DISABLE-V5T-NEXT:    push {r4, lr}
1516 ; DISABLE-V5T-NEXT:    .cfi_def_cfa_offset 8
1517 ; DISABLE-V5T-NEXT:    .cfi_offset lr, -4
1518 ; DISABLE-V5T-NEXT:    .cfi_offset r4, -8
1519 ; DISABLE-V5T-NEXT:    movs r2, r0
1520 ; DISABLE-V5T-NEXT:    movs r0, #1
1521 ; DISABLE-V5T-NEXT:    cmp r2, #0
1522 ; DISABLE-V5T-NEXT:    beq LBB11_3
1523 ; DISABLE-V5T-NEXT:  @ %bb.1: @ %if.end
1524 ; DISABLE-V5T-NEXT:    ldr r3, [r2]
1525 ; DISABLE-V5T-NEXT:    lsls r4, r3, #30
1526 ; DISABLE-V5T-NEXT:    bpl LBB11_3
1527 ; DISABLE-V5T-NEXT:  @ %bb.2: @ %if.end4
1528 ; DISABLE-V5T-NEXT:    str r1, [r2]
1529 ; DISABLE-V5T-NEXT:    str r3, [r2]
1530 ; DISABLE-V5T-NEXT:    movs r0, #0
1531 ; DISABLE-V5T-NEXT:  LBB11_3: @ %cleanup
1532 ; DISABLE-V5T-NEXT:    pop {r4, pc}