Lines Matching refs:ERRORS
2 @ RUN: | FileCheck --check-prefix=CHECK-ERRORS %s
4 @ RUN: | FileCheck --check-prefix=CHECK-ERRORS-V5 %s
6 @ RUN: | FileCheck --check-prefix=CHECK-ERRORS-V7M %s
8 @ RUN: | FileCheck --check-prefix=CHECK-ERRORS-V8 %s
14 @ CHECK-ERRORS: error: invalid instruction, any one of the following would fix this:
15 @ CHECK-ERRORS: add r1, r2, r3
16 @ CHECK-ERRORS: ^
17 @ CHECK-ERRORS: note: instruction requires: arm-mode
18 @ CHECK-ERRORS: note: instruction requires: thumb2
19 @ CHECK-ERRORS: note: invalid operand for instruction
20 @ CHECK-ERRORS: note: operand must be an immediate in the range [0,7]
21 @ CHECK-ERRORS: note: no flag-preserving variant of this instruction available
26 @ CHECK-ERRORS: error: invalid instruction, any one of the following would fix this:
27 @ CHECK-ERRORS: add r2, r3
28 @ CHECK-ERRORS: ^
29 @ CHECK-ERRORS: note: instruction variant requires Thumb2
30 @ CHECK-ERRORS: note: operand must be a register sp
31 @ CHECK-ERRORS-V5: error: instruction variant requires ARMv6 or later
32 @ CHECK-ERRORS-V5: mov r2, r3
33 @ CHECK-ERRORS-V5: ^
38 @ CHECK-ERRORS: error: operand must be a register in range [r0, r7]
39 @ CHECK-ERRORS: adds #0, r1, r2
40 @ CHECK-ERRORS: error: invalid instruction, any one of the following would fix this:
41 @ CHECK-ERRORS: adds r0, #1, r2
42 @ CHECK-ERRORS: note: operand must be a register in range [r0, r7]
43 @ CHECK-ERRORS: note: too many operands for instruction
47 @ CHECK-ERRORS: error: invalid instruction, any one of the following would fix this:
48 @ CHECK-ERRORS: asrs r2, r3, #33
49 @ CHECK-ERRORS: ^
50 @ CHECK-ERRORS: note: operand must be an immediate in the range [1,32]
51 @ CHECK-ERRORS: note: too many operands for instruction
56 @ CHECK-ERRORS: error: invalid instruction, any one of the following would fix this:
57 @ CHECK-ERRORS: bkpt #256
58 @ CHECK-ERRORS: ^
59 @ CHECK-ERRORS: note: instruction requires: arm-mode
60 @ CHECK-ERRORS: note: operand must be an immediate in the range [0,255]
61 @ CHECK-ERRORS: note: too many operands for instruction
63 @ CHECK-ERRORS: error: invalid instruction, any one of the following would fix this:
64 @ CHECK-ERRORS: bkpt #-1
65 @ CHECK-ERRORS: ^
66 @ CHECK-ERRORS: note: operand must be an immediate in the range [0,255]
67 @ CHECK-ERRORS: note: too many operands for instruction
72 @CHECK-ERRORS: error: invalid instruction
73 @CHECK-ERRORS: hlt #64
74 @CHECK-ERRORS: ^
75 @CHECK-ERRORS-V8: error: invalid instruction, any one of the following would fix this:
76 @CHECK-ERRORS-V8: hlt #64
77 @CHECK-ERRORS-V8: ^
78 @CHECK-ERRORS-V8: note: instruction requires: arm-mode
79 @CHECK-ERRORS-V8: operand must be an immediate in the range [0,63]
80 @CHECK-ERRORS: error: invalid instruction
81 @CHECK-ERRORS: hlt #-1
82 @CHECK-ERRORS: ^
83 @CHECK-ERRORS-V8: error: operand must be an immediate in the range [0,63]
84 @CHECK-ERRORS-V8: hlt #-1
85 @CHECK-ERRORS-V8: ^
100 @ CHECK-ERRORS: error: registers must be in range r0-r7
101 @ CHECK-ERRORS: ldm r2!, {r5, r8}
102 @ CHECK-ERRORS: ^
103 @ CHECK-ERRORS: error: writeback operator '!' expected
104 @ CHECK-ERRORS: ldm r2, {r5, r7}
105 @ CHECK-ERRORS: ^
106 @ CHECK-ERRORS: error: writeback operator '!' not allowed when base register in register list
107 @ CHECK-ERRORS: ldm r2!, {r2, r3, r4}
108 @ CHECK-ERRORS: ^
109 @ CHECK-ERRORS-V8: error: writeback operator '!' not allowed when base register in register list
110 @ CHECK-ERRORS-V8: ldm r2!, {r2, r3, r4, r10}
111 @ CHECK-ERRORS-V8: ^
112 @ CHECK-ERRORS-V8: error: writeback register not allowed in register list
113 @ CHECK-ERRORS-V8: ldmdb r2!, {r2, r3, r4}
114 @ CHECK-ERRORS-V8: ^
115 @ CHECK-ERRORS-V7M: error: SP may not be in the register list
116 @ CHECK-ERRORS-V7M: ldm r0, {r2, sp}
117 @ CHECK-ERRORS-V7M: ^
118 @ CHECK-ERRORS-V7M: error: SP may not be in the register list
119 @ CHECK-ERRORS-V7M: ldmia r0, {r2-r3, sp}
120 @ CHECK-ERRORS-V7M: ^
121 @ CHECK-ERRORS-V7M: error: SP may not be in the register list
122 @ CHECK-ERRORS-V7M: ldmia r0!, {r2-r3, sp}
123 @ CHECK-ERRORS-V7M: ^
124 @ CHECK-ERRORS-V7M: error: SP may not be in the register list
125 @ CHECK-ERRORS-V7M: ldmfd r2, {r1, r3-r6, sp}
126 @ CHECK-ERRORS-V7M: ^
127 @ CHECK-ERRORS-V7M: error: SP may not be in the register list
128 @ CHECK-ERRORS-V7M: ldmfd r2!, {r1, r3-r6, sp}
129 @ CHECK-ERRORS-V7M: ^
130 @ CHECK-ERRORS-V7M: error: SP may not be in the register list
131 @ CHECK-ERRORS-V7M: ldmdb r1, {r2, r3, sp}
132 @ CHECK-ERRORS-V7M: ^
133 @ CHECK-ERRORS-V7M: error: SP may not be in the register list
134 @ CHECK-ERRORS-V7M: ldmdb r1!, {r2, r3, sp}
135 @ CHECK-ERRORS-V7M: ^
140 @ CHECK-ERRORS: error: registers must be in range r0-r7 or pc
141 @ CHECK-ERRORS: pop {r1, r2, r10}
142 @ CHECK-ERRORS: ^
143 @ CHECK-ERRORS: error: registers must be in range r0-r7 or lr
144 @ CHECK-ERRORS: push {r8, r9}
145 @ CHECK-ERRORS: ^
157 @ CHECK-ERRORS: error: invalid instruction, any one of the following would fix this:
158 @ CHECK-ERRORS: stm r1, {r2, r6}
159 @ CHECK-ERRORS: ^
160 @ CHECK-ERRORS: note: instruction requires: thumb2
161 @ CHECK-ERRORS: note: instruction requires: arm-mode
162 @ CHECK-ERRORS: error: registers must be in range r0-r7
163 @ CHECK-ERRORS: stm r1!, {r2, r9}
164 @ CHECK-ERRORS: ^
165 @ CHECK-ERRORS-V8: error: writeback operator '!' not allowed when base register in register list
166 @ CHECK-ERRORS-V8: stm r2!, {r2, r9}
167 @ CHECK-ERRORS-V8: ^
168 @ CHECK-ERRORS-V8: error: writeback register not allowed in register list
169 @ CHECK-ERRORS-V8: stmdb r2!, {r0, r2}
170 @ CHECK-ERRORS-V8: ^
171 @ CHECK-ERRORS-V7M: error: SP may not be in the register list
172 @ CHECK-ERRORS-V7M: stm r1!, {r2, sp}
173 @ CHECK-ERRORS-V7M: ^
174 @ CHECK-ERRORS-V7M: error: SP may not be in the register list
175 @ CHECK-ERRORS-V7M: stmia r4!, {r0-r3, sp}
176 @ CHECK-ERRORS-V7M: ^
177 @ CHECK-ERRORS-V7M: error: SP may not be in the register list
178 @ CHECK-ERRORS-V7M: stmdb r1, {r2, r3, sp}
179 @ CHECK-ERRORS-V7M: ^
180 @ CHECK-ERRORS-V7M: error: SP may not be in the register list
181 @ CHECK-ERRORS-V7M: stmdb r1!, {r2, r3, sp}
182 @ CHECK-ERRORS-V7M: ^
187 @ CHECK-ERRORS: error: invalid instruction, any one of the following would fix this:
188 @ CHECK-ERRORS: lsls r4, r5, #-1
189 @ CHECK-ERRORS: ^
190 @ CHECK-ERRORS: note: operand must be an immediate in the range [0,31]
191 @ CHECK-ERRORS: note: too many operands for instruction
192 @ CHECK-ERRORS: error: invalid instruction, any one of the following would fix this:
193 @ CHECK-ERRORS: lsls r4, r5, #32
194 @ CHECK-ERRORS: ^
195 @ CHECK-ERRORS: note: operand must be an immediate in the range [0,31]
196 @ CHECK-ERRORS: note: too many operands for instruction
200 @ CHECK-ERRORS: error: destination register must match source register
201 @ CHECK-ERRORS: muls r1, r2, r3
202 @ CHECK-ERRORS: ^
209 @ CHECK-ERRORS: error: invalid instruction, any one of the following would fix this:
210 @ CHECK-ERRORS: str r2, [r7, #-1]
211 @ CHECK-ERRORS: ^
212 @ CHECK-ERRORS: note: instruction requires: thumb2
213 @ CHECK-ERRORS: note: instruction requires: arm-mode
214 @ CHECK-ERRORS: note: invalid operand for instruction
215 @ CHECK-ERRORS: error: invalid instruction, any one of the following would fix this:
216 @ CHECK-ERRORS: str r5, [r1, #3]
217 @ CHECK-ERRORS: ^
218 @ CHECK-ERRORS: note: instruction requires: thumb2
219 @ CHECK-ERRORS: note: instruction requires: arm-mode
220 @ CHECK-ERRORS: note: invalid operand for instruction
221 @ CHECK-ERRORS: error: invalid instruction, any one of the following would fix this:
222 @ CHECK-ERRORS: str r3, [r7, #128]
223 @ CHECK-ERRORS: ^
224 @ CHECK-ERRORS: note: instruction requires: thumb2
225 @ CHECK-ERRORS: note: instruction requires: arm-mode
226 @ CHECK-ERRORS: note: invalid operand for instruction
231 @ CHECK-ERRORS: error: operand must be an immediate in the range [0,255]
232 @ CHECK-ERRORS: svc #-1
233 @ CHECK-ERRORS: ^
234 @ CHECK-ERRORS: error: invalid instruction, any one of the following would fix this:
235 @ CHECK-ERRORS: svc #256
236 @ CHECK-ERRORS: ^
237 @ CHECK-ERRORS: note: instruction requires: arm-mode
238 @ CHECK-ERRORS: note: operand must be an immediate in the range [0,255]
246 @ CHECK-ERRORS: error: invalid instruction, any one of the following would fix this:
247 @ CHECK-ERRORS: add sp, #-1
248 @ CHECK-ERRORS: ^
249 @ CHECK-ERRORS: note: operand must be a register in range [r0, r15]
250 @ CHECK-ERRORS: add sp, #-1
251 @ CHECK-ERRORS: ^
252 @ CHECK-ERRORS: note: invalid operand for instruction
253 @ CHECK-ERRORS: add sp, #-1
254 @ CHECK-ERRORS: ^
255 @ CHECK-ERRORS: note: instruction requires: thumb2
256 @ CHECK-ERRORS: add sp, #-1
257 @ CHECK-ERRORS: ^
258 @ CHECK-ERRORS: error: invalid instruction, any one of the following would fix this:
259 @ CHECK-ERRORS: add sp, #3
260 @ CHECK-ERRORS: ^
261 @ CHECK-ERRORS: note: operand must be a register in range [r0, r15]
262 @ CHECK-ERRORS: add sp, #3
263 @ CHECK-ERRORS: ^
264 @ CHECK-ERRORS: note: invalid operand for instruction
265 @ CHECK-ERRORS: add sp, #3
266 @ CHECK-ERRORS: ^
267 @ CHECK-ERRORS: note: instruction requires: thumb2
268 @ CHECK-ERRORS: add sp, #3
269 @ CHECK-ERRORS: ^
270 @ CHECK-ERRORS: error: invalid instruction, any one of the following would fix this:
271 @ CHECK-ERRORS: add sp, sp, #512
272 @ CHECK-ERRORS: ^
273 @ CHECK-ERRORS: note: operand must be a register in range [r0, r15]
274 @ CHECK-ERRORS: add sp, sp, #512
275 @ CHECK-ERRORS: ^
276 @ CHECK-ERRORS: note: invalid operand for instruction
277 @ CHECK-ERRORS: add sp, sp, #512
278 @ CHECK-ERRORS: ^
279 @ CHECK-ERRORS: note: instruction requires: thumb2
280 @ CHECK-ERRORS: add sp, sp, #512
281 @ CHECK-ERRORS: ^
282 @ CHECK-ERRORS: error: instruction requires: thumb2
283 @ CHECK-ERRORS: add r2, sp, #1024
284 @ CHECK-ERRORS: ^
286 @ CHECK-ERRORS: error: source register must be the same as destination
287 @ CHECK-ERRORS: add r2, sp, ip
288 @ CHECK-ERRORS: ^
302 @ CHECK-ERRORS: error: branch target out of range
303 @ CHECK-ERRORS: error: branch target out of range
304 @ CHECK-ERRORS: error: branch target out of range
305 @ CHECK-ERRORS: error: branch target out of range
306 @ CHECK-ERRORS: error: branch target out of range
307 @ CHECK-ERRORS: error: branch target out of range
319 @ CHECK-ERRORS-V7M: error: branch target out of range
320 @ CHECK-ERRORS-V7M: error: invalid operand for instruction
321 @ CHECK-ERRORS-V7M: error: branch target out of range
322 @ CHECK-ERRORS-V8: error: branch target out of range
323 @ CHECK-ERRORS-V8: error: invalid operand for instruction
324 @ CHECK-ERRORS-V8: error: branch target out of range
334 @ CHECK-ERRORS: error: instruction requires: armv6m or armv6t2
335 @ CHECK-ERRORS: sev
336 @ CHECK-ERRORS: ^
337 @ CHECK-ERRORS: error: instruction requires: armv6m or armv6t2
338 @ CHECK-ERRORS: wfe
339 @ CHECK-ERRORS: ^
340 @ CHECK-ERRORS: error: instruction requires: armv6m or armv6t2
341 @ CHECK-ERRORS: wfi
342 @ CHECK-ERRORS: ^
343 @ CHECK-ERRORS: error: instruction requires: armv6m or armv6t2
344 @ CHECK-ERRORS: yield
345 @ CHECK-ERRORS: ^
351 @ CHECK-ERRORS: error: instruction requires: mp-extensions
358 @ CHECK-ERRORS: error: invalid instruction, any one of the following would fix this:
359 @ CHECK-ERRORS: note: instruction requires: thumb2
360 @ CHECK-ERRORS: note: instruction requires: arm-mode
361 @ CHECK-ERRORS: note: invalid operand for instruction
370 @ CHECK-ERRORS: error: invalid instruction
371 @ CHECK-ERRORS: error: invalid instruction
372 @ CHECK-ERRORS: error: invalid instruction
373 @ CHECK-ERRORS: error: invalid instruction
381 @ CHECK-ERRORS: error: too few operands for instruction
382 @ CHECK-ERRORS: error: too few operands for instruction
391 @ CHECK-ERRORS-V8: error: bitfield width must be in range [1,32-lsb]
392 @ CHECK-ERRORS-V8: sbfx r4, r5, #31, #2
393 @ CHECK-ERRORS-V8: ^
394 @ CHECK-ERRORS-V8: error: bitfield width must be in range [1,32-lsb]
395 @ CHECK-ERRORS-V8: ubfx r4, r5, #16, #17
396 @ CHECK-ERRORS-V8: ^
410 @ CHECK-ERRORS-V8: error: source register and base register can't be identical
414 @ CHECK-ERRORS-V8: str r0, [r0], #4
415 @ CHECK-ERRORS-V8: ^
416 @ CHECK-ERRORS-V8: error: source register and base register can't be identical
420 @ CHECK-ERRORS-V8: strh r0, [r0], #2
421 @ CHECK-ERRORS-V8: ^
422 @ CHECK-ERRORS-V8: error: source register and base register can't be identical
426 @ CHECK-ERRORS-V8: strb r0, [r0], #1
427 @ CHECK-ERRORS-V8: ^
428 @ CHECK-ERRORS-V8: error: source register and base register can't be identical
432 @ CHECK-ERRORS-V8: strd r1, r0, [r0], #1
433 @ CHECK-ERRORS-V8: ^