Lines Matching refs:TMP1
18 ; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], 4
19 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ugt i8 [[TMP1]], 7
31 ; CHECK-NEXT: [[TMP1:%.*]] = add i65 [[X:%.*]], 9223372036854775808
32 ; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i65 [[TMP1]], 0
47 ; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i8> [[X:%.*]], <i8 4, i8 4>
48 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ugt <2 x i8> [[TMP1]], <i8 7, i8 7>
60 ; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], <i8 5, i8 6>
61 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <2 x i8> [[TMP1]], [[X]]
73 ; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], <i8 5, i8 5, i8 5>
74 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <3 x i8> [[TMP1]], [[X]]
86 ; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], <i8 5, i8 undef, i8 5>
87 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <3 x i8> [[TMP1]], [[X]]
99 ; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], <i8 5, i8 undef, i8 5>
100 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <3 x i8> [[TMP1]], [[X]]
118 ; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X]], 4
119 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ugt i8 [[TMP1]], 7
139 ; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X]], 4
140 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ugt i8 [[TMP1]], 7
153 ; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5
154 ; CHECK-NEXT: call void @use8(i8 [[TMP1]])
155 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i8 [[TMP1]], [[X]]
169 ; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5
170 ; CHECK-NEXT: call void @use8(i8 [[TMP1]])
171 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i8 [[TMP1]], [[X]]
189 ; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 3
190 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i8 [[TMP1]], [[X]]
201 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[X:%.*]], 7
202 ; CHECK-NEXT: ret i1 [[TMP1]]
213 ; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5
214 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i8 [[TMP1]], [[Y:%.*]]
226 ; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], <i8 5, i8 3>
227 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <2 x i8> [[TMP1]], [[X]]