Lines Matching full:all
3 …6:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128-n8:16:32:64" | FileCheck %s --check-prefixes=ALL,BE
4 …6:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128-n8:16:32:64" | FileCheck %s --check-prefixes=ALL,LE
12 ; ALL-LABEL: @test1(
13 ; ALL-NEXT: ret i32 [[A:%.*]]
21 ; ALL-LABEL: @test2(
22 ; ALL-NEXT: [[RET:%.*]] = zext i8 [[A:%.*]] to i64
23 ; ALL-NEXT: ret i64 [[RET]]
32 ; ALL-LABEL: @test3(
33 ; ALL-NEXT: [[C2:%.*]] = and i64 [[A:%.*]], 255
34 ; ALL-NEXT: ret i64 [[C2]]
42 ; ALL-LABEL: @test4(
43 ; ALL-NEXT: [[COND:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
44 ; ALL-NEXT: [[RESULT:%.*]] = zext i1 [[COND]] to i32
45 ; ALL-NEXT: ret i32 [[RESULT]]
54 ; ALL-LABEL: @test5(
55 ; ALL-NEXT: [[RESULT:%.*]] = zext i1 [[B:%.*]] to i32
56 ; ALL-NEXT: ret i32 [[RESULT]]
64 ; ALL-LABEL: @test6(
65 ; ALL-NEXT: [[C1:%.*]] = trunc i64 [[A:%.*]] to i32
66 ; ALL-NEXT: ret i32 [[C1]]
74 ; ALL-LABEL: @test7(
75 ; ALL-NEXT: [[RES:%.*]] = zext i1 [[A:%.*]] to i64
76 ; ALL-NEXT: ret i64 [[RES]]
84 ; ALL-LABEL: @test8(
85 ; ALL-NEXT: [[C1:%.*]] = sext i8 [[A:%.*]] to i64
86 ; ALL-NEXT: ret i64 [[C1]]
94 ; ALL-LABEL: @test9(
95 ; ALL-NEXT: ret i16 [[A:%.*]]
103 ; ALL-LABEL: @test10(
104 ; ALL-NEXT: ret i16 [[A:%.*]]
114 ; ALL-LABEL: @test11(
115 ; ALL-NEXT: call void (i32, ...) @varargs(i32 5, i32* [[P:%.*]])
116 ; ALL-NEXT: ret void
125 ; ALL-LABEL: @test_invoke_vararg_cast(
126 ; ALL-NEXT: entry:
127 ; ALL-NEXT: invoke void (i32, ...) @varargs(i32 1, i32* [[B:%.*]], i32* [[A:%.*]])
128 ; ALL-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
129 ; ALL: invoke.cont:
130 ; ALL-NEXT: ret void
131 ; ALL: lpad:
132 ; ALL-NEXT: [[TMP0:%.*]] = landingpad { i8*, i32 }
133 ; ALL-NEXT: cleanup
134 ; ALL-NEXT: ret void
152 ; ALL-LABEL: @test13(
153 ; ALL-NEXT: [[C:%.*]] = getelementptr [32832 x i8], [32832 x i8]* @inbuf, i64 0, i64 [[A:%.*]]
154 ; ALL-NEXT: ret i8* [[C]]
161 ; ALL-LABEL: @test14(
162 ; ALL-NEXT: [[X:%.*]] = icmp sgt i8 [[A:%.*]], -1
163 ; ALL-NEXT: ret i1 [[X]]
179 ; ALL-LABEL: @test16(
180 ; ALL-NEXT: [[C:%.*]] = icmp ne i32* [[P:%.*]], null
181 ; ALL-NEXT: ret i1 [[C]]
188 ; ALL-LABEL: @test17(
189 ; ALL-NEXT: [[T86:%.*]] = zext i1 [[X:%.*]] to i16
190 ; ALL-NEXT: ret i16 [[T86]]
198 ; ALL-LABEL: @test18(
199 ; ALL-NEXT: [[T86:%.*]] = sext i8 [[X:%.*]] to i16
200 ; ALL-NEXT: ret i16 [[T86]]
208 ; ALL-LABEL: @test19(
209 ; ALL-NEXT: [[Z:%.*]] = icmp slt i32 [[X:%.*]], 12345
210 ; ALL-NEXT: ret i1 [[Z]]
218 ; ALL-LABEL: @test19vec(
219 ; ALL-NEXT: [[Z:%.*]] = icmp slt <2 x i32> [[X:%.*]], <i32 12345, i32 2147483647>
220 ; ALL-NEXT: ret <2 x i1> [[Z]]
228 ; ALL-LABEL: @test19vec2(
229 ; ALL-NEXT: [[CMPEQ:%.*]] = xor <3 x i1> [[X:%.*]], <i1 true, i1 true, i1 true>
230 ; ALL-NEXT: ret <3 x i1> [[CMPEQ]]
238 ; ALL-LABEL: @test20(
239 ; ALL-NEXT: ret i1 false
247 ; ALL-LABEL: @test21(
248 ; ALL-NEXT: [[SEXT:%.*]] = and i32 [[X:%.*]], 255
249 ; ALL-NEXT: ret i32 [[SEXT]]
258 ; ALL-LABEL: @test22(
259 ; ALL-NEXT: [[SEXT:%.*]] = shl i32 [[X:%.*]], 24
260 ; ALL-NEXT: ret i32 [[SEXT]]
269 ; ALL-LABEL: @test23(
270 ; ALL-NEXT: [[C2:%.*]] = and i32 [[X:%.*]], 65535
271 ; ALL-NEXT: ret i32 [[C2]]
279 ; ALL-LABEL: @test24(
280 ; ALL-NEXT: ret i1 true
288 ; ALL-LABEL: @test26(
289 ; ALL-NEXT: [[D:%.*]] = fptosi float [[F:%.*]] to i32
290 ; ALL-NEXT: ret i32 [[D]]
298 ; ALL-LABEL: @test27(
299 ; ALL-NEXT: [[C:%.*]] = getelementptr [9 x [4 x float]], [9 x [4 x float]]* [[A:%.*]], i64 0, i6…
300 ; ALL-NEXT: ret [4 x float]* [[C]]
307 ; ALL-LABEL: @test28(
308 ; ALL-NEXT: [[C:%.*]] = getelementptr [4 x float], [4 x float]* [[A:%.*]], i64 0, i64 0
309 ; ALL-NEXT: ret float* [[C]]
316 ; ALL-LABEL: @test29(
317 ; ALL-NEXT: [[T21:%.*]] = or i32 [[C2:%.*]], [[C1:%.*]]
318 ; ALL-NEXT: [[T10:%.*]] = and i32 [[T21]], 255
319 ; ALL-NEXT: ret i32 [[T10]]
329 ; ALL-LABEL: @test30(
330 ; ALL-NEXT: [[C3:%.*]] = and i32 [[C1:%.*]], 255
331 ; ALL-NEXT: [[C4:%.*]] = xor i32 [[C3]], 1
332 ; ALL-NEXT: ret i32 [[C4]]
341 ; ALL-LABEL: @test31(
342 ; ALL-NEXT: [[C1:%.*]] = and i64 [[A:%.*]], 42
343 ; ALL-NEXT: [[D:%.*]] = icmp eq i64 [[C1]], 10
344 ; ALL-NEXT: ret i1 [[D]]
355 ; ALL-LABEL: @test31vec(
356 ; ALL-NEXT: [[B:%.*]] = trunc <2 x i64> [[A:%.*]] to <2 x i32>
357 ; ALL-NEXT: [[C:%.*]] = and <2 x i32> [[B]], <i32 42, i32 42>
358 ; ALL-NEXT: [[D:%.*]] = icmp eq <2 x i32> [[C]], <i32 10, i32 10>
359 ; ALL-NEXT: ret <2 x i1> [[D]]
371 ; ALL-LABEL: @test32vec(
372 ; ALL-NEXT: [[TMP1:%.*]] = and <2 x i8> [[A:%.*]], <i8 42, i8 42>
373 ; ALL-NEXT: [[D:%.*]] = icmp eq <2 x i8> [[TMP1]], <i8 10, i8 10>
374 ; ALL-NEXT: ret <2 x i1> [[D]]
383 ; ALL-LABEL: @test33(
384 ; ALL-NEXT: ret i32 [[C1:%.*]]
392 ; ALL-LABEL: @test34(
393 ; ALL-NEXT: [[TMP1:%.*]] = lshr i16 [[A:%.*]], 8
394 ; ALL-NEXT: ret i16 [[TMP1]]
403 ; ALL-LABEL: @test35(
404 ; ALL-NEXT: [[T2:%.*]] = lshr i16 [[A:%.*]], 8
405 ; ALL-NEXT: ret i16 [[T2]]
415 ; ALL-LABEL: @test36(
416 ; ALL-NEXT: [[D:%.*]] = icmp sgt i32 [[A:%.*]], -1
417 ; ALL-NEXT: ret i1 [[D]]
426 ; ALL-LABEL: @test36vec(
427 ; ALL-NEXT: [[D:%.*]] = icmp sgt <2 x i32> [[A:%.*]], <i32 -1, i32 -1>
428 ; ALL-NEXT: ret <2 x i1> [[D]]
437 ; ALL-LABEL: @test37(
438 ; ALL-NEXT: ret i1 false
448 ; ALL-LABEL: @test38(
449 ; ALL-NEXT: [[TMP1:%.*]] = icmp ne i32 [[A:%.*]], -2
450 ; ALL-NEXT: [[TMP2:%.*]] = zext i1 [[TMP1]] to i64
451 ; ALL-NEXT: ret i64 [[TMP2]]
461 ; ALL-LABEL: @test39(
462 ; ALL-NEXT: [[T32:%.*]] = call i16 @llvm.bswap.i16(i16 [[A:%.*]])
463 ; ALL-NEXT: ret i16 [[T32]]
474 ; ALL-LABEL: @test40(
475 ; ALL-NEXT: [[T21:%.*]] = lshr i16 [[A:%.*]], 9
476 ; ALL-NEXT: [[T5:%.*]] = shl i16 [[A]], 8
477 ; ALL-NEXT: [[T32:%.*]] = or i16 [[T21]], [[T5]]
478 ; ALL-NEXT: ret i16 [[T32]]
489 ; ALL-LABEL: @test40vec(
490 ; ALL-NEXT: [[T21:%.*]] = lshr <2 x i16> [[A:%.*]], <i16 9, i16 9>
491 ; ALL-NEXT: [[T5:%.*]] = shl <2 x i16> [[A]], <i16 8, i16 8>
492 ; ALL-NEXT: [[T32:%.*]] = or <2 x i16> [[T21]], [[T5]]
493 ; ALL-NEXT: ret <2 x i16> [[T32]]
504 ; ALL-LABEL: @test40vec_nonuniform(
505 ; ALL-NEXT: [[T21:%.*]] = lshr <2 x i16> [[A:%.*]], <i16 9, i16 10>
506 ; ALL-NEXT: [[T5:%.*]] = shl <2 x i16> [[A]], <i16 8, i16 9>
507 ; ALL-NEXT: [[T32:%.*]] = or <2 x i16> [[T21]], [[T5]]
508 ; ALL-NEXT: ret <2 x i16> [[T32]]
519 ; ALL-LABEL: @test40vec_undef(
520 ; ALL-NEXT: [[T:%.*]] = zext <2 x i16> [[A:%.*]] to <2 x i32>
521 ; ALL-NEXT: [[T21:%.*]] = lshr <2 x i32> [[T]], <i32 9, i32 undef>
522 ; ALL-NEXT: [[T5:%.*]] = shl <2 x i32> [[T]], <i32 8, i32 undef>
523 ; ALL-NEXT: [[T32:%.*]] = or <2 x i32> [[T21]], [[T5]]
524 ; ALL-NEXT: [[R:%.*]] = trunc <2 x i32> [[T32]] to <2 x i16>
525 ; ALL-NEXT: ret <2 x i16> [[R]]
537 ; ALL-LABEL: @test41(
538 ; ALL-NEXT: ret i32* [[T1:%.*]]
546 ; ALL-LABEL: @test41_addrspacecast_smaller(
547 ; ALL-NEXT: [[T65:%.*]] = addrspacecast i32* [[T1:%.*]] to i32 addrspace(1)*
548 ; ALL-NEXT: ret i32 addrspace(1)* [[T65]]
556 ; ALL-LABEL: @test41_addrspacecast_larger(
557 ; ALL-NEXT: [[T65:%.*]] = addrspacecast i32 addrspace(1)* [[T1:%.*]] to i32*
558 ; ALL-NEXT: ret i32* [[T65]]
566 ; ALL-LABEL: @test42(
567 ; ALL-NEXT: [[Z:%.*]] = and i32 [[X:%.*]], 255
568 ; ALL-NEXT: ret i32 [[Z]]
577 ; ALL-LABEL: @test43(
578 ; ALL-NEXT: [[A:%.*]] = zext i8 [[ON_OFF:%.*]] to i64
579 ; ALL-NEXT: [[B:%.*]] = add nsw i64 [[A]], -1
580 ; ALL-NEXT: ret i64 [[B]]
589 ; ALL-LABEL: @test44(
590 ; ALL-NEXT: [[A:%.*]] = zext i8 [[T:%.*]] to i64
591 ; ALL-NEXT: [[B:%.*]] = or i64 [[A]], 1234
592 ; ALL-NEXT: ret i64 [[B]]
601 ; ALL-LABEL: @test45(
602 ; ALL-NEXT: [[B:%.*]] = sext i8 [[A:%.*]] to i64
603 ; ALL-NEXT: [[C:%.*]] = or i64 [[B]], [[Q:%.*]]
604 ; ALL-NEXT: [[E:%.*]] = and i64 [[C]], 4294967295
605 ; ALL-NEXT: ret i64 [[E]]
616 ; ALL-LABEL: @test46(
617 ; ALL-NEXT: [[C:%.*]] = shl i64 [[A:%.*]], 8
618 ; ALL-NEXT: [[D:%.*]] = and i64 [[C]], 10752
619 ; ALL-NEXT: ret i64 [[D]]
629 ; ALL-LABEL: @test46vec(
630 ; ALL-NEXT: [[B:%.*]] = trunc <2 x i64> [[A:%.*]] to <2 x i32>
631 ; ALL-NEXT: [[C:%.*]] = shl <2 x i32> [[B]], <i32 8, i32 8>
632 ; ALL-NEXT: [[D:%.*]] = and <2 x i32> [[C]], <i32 10752, i32 10752>
633 ; ALL-NEXT: [[E:%.*]] = zext <2 x i32> [[D]] to <2 x i64>
634 ; ALL-NEXT: ret <2 x i64> [[E]]
644 ; ALL-LABEL: @test47(
645 ; ALL-NEXT: [[TMP1:%.*]] = or i8 [[A:%.*]], 42
646 ; ALL-NEXT: [[C:%.*]] = sext i8 [[TMP1]] to i64
647 ; ALL-NEXT: [[E:%.*]] = and i64 [[C]], 4294967295
648 ; ALL-NEXT: ret i64 [[E]]
657 ; ALL-LABEL: @test48(
658 ; ALL-NEXT: [[Z2:%.*]] = zext i8 [[A1:%.*]] to i32
659 ; ALL-NEXT: [[C:%.*]] = shl nuw nsw i32 [[Z2]], 8
660 ; ALL-NEXT: [[D:%.*]] = or i32 [[C]], [[Z2]]
661 ; ALL-NEXT: [[E:%.*]] = zext i32 [[D]] to i64
662 ; ALL-NEXT: ret i64 [[E]]
673 ; ALL-LABEL: @test49(
674 ; ALL-NEXT: [[C:%.*]] = shl i64 [[A:%.*]], 32
675 ; ALL-NEXT: [[SEXT:%.*]] = ashr exact i64 [[C]], 32
676 ; ALL-NEXT: [[D:%.*]] = or i64 [[SEXT]], 1
677 ; ALL-NEXT: ret i64 [[D]]
686 ; ALL-LABEL: @test50(
687 ; ALL-NEXT: [[TMP1:%.*]] = shl i64 [[X:%.*]], 30
688 ; ALL-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], -4294967296
689 ; ALL-NEXT: [[E:%.*]] = ashr i64 [[TMP2]], 32
690 ; ALL-NEXT: ret i64 [[E]]
700 ; ALL-LABEL: @test51(
701 ; ALL-NEXT: [[C:%.*]] = and i64 [[A:%.*]], 4294967294
702 ; ALL-NEXT: [[NOT_COND:%.*]] = xor i1 [[COND:%.*]], true
703 ; ALL-NEXT: [[MASKSEL:%.*]] = zext i1 [[NOT_COND]] to i64
704 ; ALL-NEXT: [[E:%.*]] = or i64 [[C]], [[MASKSEL]]
705 ; ALL-NEXT: [[SEXT:%.*]] = shl nuw i64 [[E]], 32
706 ; ALL-NEXT: [[F:%.*]] = ashr exact i64 [[SEXT]], 32
707 ; ALL-NEXT: ret i64 [[F]]
718 ; ALL-LABEL: @test52(
719 ; ALL-NEXT: [[B:%.*]] = trunc i64 [[A:%.*]] to i32
720 ; ALL-NEXT: [[C:%.*]] = and i32 [[B]], 7224
721 ; ALL-NEXT: [[D:%.*]] = or i32 [[C]], 32962
722 ; ALL-NEXT: ret i32 [[D]]
732 ; ALL-LABEL: @test53(
733 ; ALL-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 7224
734 ; ALL-NEXT: [[TMP2:%.*]] = or i32 [[TMP1]], 32962
735 ; ALL-NEXT: [[D:%.*]] = zext i32 [[TMP2]] to i64
736 ; ALL-NEXT: ret i64 [[D]]
746 ; ALL-LABEL: @test54(
747 ; ALL-NEXT: [[B:%.*]] = trunc i64 [[A:%.*]] to i32
748 ; ALL-NEXT: [[C:%.*]] = and i32 [[B]], 7224
749 ; ALL-NEXT: [[D:%.*]] = or i32 [[C]], -32574
750 ; ALL-NEXT: ret i32 [[D]]
760 ; ALL-LABEL: @test55(
761 ; ALL-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 7224
762 ; ALL-NEXT: [[C:%.*]] = zext i32 [[TMP1]] to i64
763 ; ALL-NEXT: [[D:%.*]] = or i64 [[C]], -32574
764 ; ALL-NEXT: ret i64 [[D]]
774 ; ALL-LABEL: @test56(
775 ; ALL-NEXT: [[P353:%.*]] = sext i16 [[A:%.*]] to i64
776 ; ALL-NEXT: [[P354:%.*]] = lshr i64 [[P353]], 5
777 ; ALL-NEXT: [[P355:%.*]] = and i64 [[P354]], 134217727
778 ; ALL-NEXT: ret i64 [[P355]]
787 ; ALL-LABEL: @test56vec(
788 ; ALL-NEXT: [[P353:%.*]] = sext <2 x i16> [[A:%.*]] to <2 x i32>
789 ; ALL-NEXT: [[P354:%.*]] = lshr <2 x i32> [[P353]], <i32 5, i32 5>
790 ; ALL-NEXT: [[P355:%.*]] = zext <2 x i32> [[P354]] to <2 x i64>
791 ; ALL-NEXT: ret <2 x i64> [[P355]]
800 ; ALL-LABEL: @test57(
801 ; ALL-NEXT: [[C:%.*]] = lshr i64 [[A:%.*]], 8
802 ; ALL-NEXT: [[E:%.*]] = and i64 [[C]], 16777215
803 ; ALL-NEXT: ret i64 [[E]]
812 ; ALL-LABEL: @test57vec(
813 ; ALL-NEXT: [[B:%.*]] = trunc <2 x i64> [[A:%.*]] to <2 x i32>
814 ; ALL-NEXT: [[C:%.*]] = lshr <2 x i32> [[B]], <i32 8, i32 8>
815 ; ALL-NEXT: [[E:%.*]] = zext <2 x i32> [[C]] to <2 x i64>
816 ; ALL-NEXT: ret <2 x i64> [[E]]
825 ; ALL-LABEL: @test58(
826 ; ALL-NEXT: [[C:%.*]] = lshr i64 [[A:%.*]], 8
827 ; ALL-NEXT: [[D:%.*]] = and i64 [[C]], 16777087
828 ; ALL-NEXT: [[E:%.*]] = or i64 [[D]], 128
829 ; ALL-NEXT: ret i64 [[E]]
840 ; ALL-LABEL: @test59(
841 ; ALL-NEXT: [[C:%.*]] = zext i8 [[A:%.*]] to i64
842 ; ALL-NEXT: [[D:%.*]] = shl nuw nsw i64 [[C]], 4
843 ; ALL-NEXT: [[E:%.*]] = and i64 [[D]], 48
844 ; ALL-NEXT: [[TMP1:%.*]] = lshr i8 [[B:%.*]], 4
845 ; ALL-NEXT: [[G:%.*]] = zext i8 [[TMP1]] to i64
846 ; ALL-NEXT: [[H:%.*]] = or i64 [[E]], [[G]]
847 ; ALL-NEXT: ret i64 [[H]]
909 ; ALL-LABEL: @test63(
910 ; ALL-NEXT: [[A:%.*]] = bitcast i64 [[T8:%.*]] to <2 x i32>
911 ; ALL-NEXT: [[VCVT_I:%.*]] = uitofp <2 x i32> [[A]] to <2 x float>
912 ; ALL-NEXT: ret <2 x float> [[VCVT_I]]
920 ; ALL-LABEL: @test64(
921 ; ALL-NEXT: ret <4 x float> [[C:%.*]]
929 ; ALL-LABEL: @test65(
930 ; ALL-NEXT: ret <4 x float> [[C:%.*]]
938 ; ALL-LABEL: @test66(
939 ; ALL-NEXT: ret <2 x float> [[C:%.*]]
947 ; ALL-LABEL: @test2c(
948 ; ALL-NEXT: ret float -1.000000e+00
954 ; ALL-LABEL: @test_mmx(
955 ; ALL-NEXT: [[C:%.*]] = bitcast <2 x i32> [[X:%.*]] to i64
956 ; ALL-NEXT: ret i64 [[C]]
965 ; ALL-LABEL: @test_mmx_const(
966 ; ALL-NEXT: ret i64 0
976 ; ALL-LABEL: @test67(
977 ; ALL-NEXT: ret i1 false
993 ; ALL-LABEL: @test68(
994 ; ALL-NEXT: [[PP1:%.*]] = getelementptr [[S:%.*]], %s* [[P:%.*]], i64 [[I:%.*]]
995 ; ALL-NEXT: [[L:%.*]] = load [[S]], %s* [[PP1]], align 4
996 ; ALL-NEXT: ret [[S]] [[L]]
1008 ; ALL-LABEL: @test68_addrspacecast(
1009 ; ALL-NEXT: [[PP1:%.*]] = getelementptr [[S:%.*]], %s* [[P:%.*]], i64 [[I:%.*]]
1010 ; ALL-NEXT: [[L:%.*]] = load [[S]], %s* [[PP1]], align 4
1011 ; ALL-NEXT: ret [[S]] [[L]]
1022 ; ALL-LABEL: @test68_addrspacecast_2(
1023 ; ALL-NEXT: [[PP1:%.*]] = getelementptr [[S:%.*]], %s* [[P:%.*]], i64 [[I:%.*]]
1024 ; ALL-NEXT: [[R:%.*]] = addrspacecast %s* [[PP1]] to [[S]] addrspace(1)*
1025 ; ALL-NEXT: [[L:%.*]] = load [[S]], [[S]] addrspace(1)* [[R]], align 4
1026 ; ALL-NEXT: ret [[S]] [[L]]
1037 ; ALL-LABEL: @test68_as1(
1038 ; ALL-NEXT: [[PP1:%.*]] = getelementptr [[S:%.*]], [[S]] addrspace(1)* [[P:%.*]], i32 [[I:%.*]]
1039 ; ALL-NEXT: [[L:%.*]] = load [[S]], [[S]] addrspace(1)* [[PP1]], align 4
1040 ; ALL-NEXT: ret [[S]] [[L]]
1051 ; ALL-LABEL: @test69(
1052 ; ALL-NEXT: [[PP1:%.*]] = getelementptr inbounds double, double* [[P:%.*]], i64 [[I:%.*]]
1053 ; ALL-NEXT: [[L:%.*]] = load double, double* [[PP1]], align 8
1054 ; ALL-NEXT: ret double [[L]]
1065 ; ALL-LABEL: @test70(
1066 ; ALL-NEXT: [[O:%.*]] = mul nsw i64 [[I:%.*]], 3
1067 ; ALL-NEXT: [[PP1:%.*]] = getelementptr inbounds [[S:%.*]], %s* [[P:%.*]], i64 [[O]]
1068 ; ALL-NEXT: [[L:%.*]] = load [[S]], %s* [[PP1]], align 4
1069 ; ALL-NEXT: ret [[S]] [[L]]
1080 ; ALL-LABEL: @test71(
1081 ; ALL-NEXT: [[O:%.*]] = shl i64 [[I:%.*]], 2
1082 ; ALL-NEXT: [[PP1:%.*]] = getelementptr double, double* [[P:%.*]], i64 [[O]]
1083 ; ALL-NEXT: [[L:%.*]] = load double, double* [[PP1]], align 8
1084 ; ALL-NEXT: ret double [[L]]
1095 ; ALL-LABEL: @test72(
1096 ; ALL-NEXT: [[O:%.*]] = sext i32 [[I:%.*]] to i64
1097 ; ALL-NEXT: [[PP1:%.*]] = getelementptr inbounds double, double* [[P:%.*]], i64 [[O]]
1098 ; ALL-NEXT: [[L:%.*]] = load double, double* [[PP1]], align 8
1099 ; ALL-NEXT: ret double [[L]]
1111 ; ALL-LABEL: @test73(
1112 ; ALL-NEXT: [[I_TR:%.*]] = trunc i128 [[I:%.*]] to i64
1113 ; ALL-NEXT: [[PP1:%.*]] = getelementptr double, double* [[P:%.*]], i64 [[I_TR]]
1114 ; ALL-NEXT: [[L:%.*]] = load double, double* [[PP1]], align 8
1115 ; ALL-NEXT: ret double [[L]]
1127 ; ALL-LABEL: @test74(
1128 ; ALL-NEXT: [[PP1:%.*]] = getelementptr inbounds double, double* [[P:%.*]], i64 [[I:%.*]]
1129 ; ALL-NEXT: [[L:%.*]] = load double, double* [[PP1]], align 8
1130 ; ALL-NEXT: ret double [[L]]
1140 ; ALL-LABEL: @test75(
1141 ; ALL-NEXT: [[Y:%.*]] = shl i32 [[X:%.*]], 3
1142 ; ALL-NEXT: [[Z:%.*]] = sext i32 [[Y]] to i64
1143 ; ALL-NEXT: [[Q:%.*]] = bitcast i32* [[P:%.*]] to i8*
1144 ; ALL-NEXT: [[R:%.*]] = getelementptr i8, i8* [[Q]], i64 [[Z]]
1145 ; ALL-NEXT: [[S:%.*]] = bitcast i8* [[R]] to i32*
1146 ; ALL-NEXT: ret i32* [[S]]
1157 ; ALL-LABEL: @test76(
1158 ; ALL-NEXT: [[O2:%.*]] = mul i64 [[I:%.*]], [[J:%.*]]
1159 ; ALL-NEXT: [[PP1:%.*]] = getelementptr [[S:%.*]], %s* [[P:%.*]], i64 [[O2]]
1160 ; ALL-NEXT: [[L:%.*]] = load [[S]], %s* [[PP1]], align 4
1161 ; ALL-NEXT: ret [[S]] [[L]]
1173 ; ALL-LABEL: @test77(
1174 ; ALL-NEXT: [[O:%.*]] = mul nsw i64 [[I:%.*]], 3
1175 ; ALL-NEXT: [[O2:%.*]] = mul nsw i64 [[O]], [[J:%.*]]
1176 ; ALL-NEXT: [[PP1:%.*]] = getelementptr inbounds [[S:%.*]], %s* [[P:%.*]], i64 [[O2]]
1177 ; ALL-NEXT: [[L:%.*]] = load [[S]], %s* [[PP1]], align 4
1178 ; ALL-NEXT: ret [[S]] [[L]]
1190 ; ALL-LABEL: @test78(
1191 ; ALL-NEXT: [[A:%.*]] = mul nsw i32 [[K:%.*]], 3
1192 ; ALL-NEXT: [[B:%.*]] = mul nsw i32 [[A]], [[L:%.*]]
1193 ; ALL-NEXT: [[C:%.*]] = sext i32 [[B]] to i128
1194 ; ALL-NEXT: [[D:%.*]] = mul nsw i128 [[C]], [[M:%.*]]
1195 ; ALL-NEXT: [[E:%.*]] = mul i128 [[D]], [[N:%.*]]
1196 ; ALL-NEXT: [[F:%.*]] = trunc i128 [[E]] to i64
1197 ; ALL-NEXT: [[G:%.*]] = mul i64 [[F]], [[I:%.*]]
1198 ; ALL-NEXT: [[H:%.*]] = mul i64 [[G]], [[J:%.*]]
1199 ; ALL-NEXT: [[PP1:%.*]] = getelementptr [[S:%.*]], %s* [[P:%.*]], i64 [[H]]
1200 ; ALL-NEXT: [[LOAD:%.*]] = load [[S]], %s* [[PP1]], align 4
1201 ; ALL-NEXT: ret [[S]] [[LOAD]]
1219 ; ALL-LABEL: @test79(
1220 ; ALL-NEXT: [[TMP1:%.*]] = trunc i64 [[I:%.*]] to i32
1221 ; ALL-NEXT: [[B:%.*]] = mul i32 [[TMP1]], 36
1222 ; ALL-NEXT: [[C:%.*]] = mul i32 [[B]], [[J:%.*]]
1223 ; ALL-NEXT: [[Q:%.*]] = bitcast %s* [[P:%.*]] to i8*
1224 ; ALL-NEXT: [[TMP2:%.*]] = sext i32 [[C]] to i64
1225 ; ALL-NEXT: [[PP:%.*]] = getelementptr inbounds i8, i8* [[Q]], i64 [[TMP2]]
1226 ; ALL-NEXT: [[R:%.*]] = bitcast i8* [[PP]] to %s*
1227 ; ALL-NEXT: [[L:%.*]] = load [[S:%.*]], %s* [[R]], align 4
1228 ; ALL-NEXT: ret [[S]] [[L]]
1241 ; ALL-LABEL: @test80(
1242 ; ALL-NEXT: [[TMP1:%.*]] = sext i32 [[I:%.*]] to i64
1243 ; ALL-NEXT: [[PP1:%.*]] = getelementptr [100 x double], [100 x double]* [[P:%.*]], i64 0, i64 [[…
1244 ; ALL-NEXT: [[L:%.*]] = load double, double* [[PP1]], align 8
1245 ; ALL-NEXT: ret double [[L]]
1256 ; ALL-LABEL: @test80_addrspacecast(
1257 ; ALL-NEXT: [[PP1:%.*]] = getelementptr [100 x double], [100 x double] addrspace(1)* [[P:%.*]], …
1258 ; ALL-NEXT: [[L:%.*]] = load double, double addrspace(1)* [[PP1]], align 8
1259 ; ALL-NEXT: ret double [[L]]
1270 ; ALL-LABEL: @test80_addrspacecast_2(
1271 ; ALL-NEXT: [[PP1:%.*]] = getelementptr [100 x double], [100 x double] addrspace(1)* [[P:%.*]], …
1272 ; ALL-NEXT: [[R:%.*]] = addrspacecast double addrspace(1)* [[PP1]] to double addrspace(3)*
1273 ; ALL-NEXT: [[L:%.*]] = load double, double addrspace(3)* [[R]], align 8
1274 ; ALL-NEXT: ret double [[L]]
1285 ; ALL-LABEL: @test80_as1(
1286 ; ALL-NEXT: [[TMP1:%.*]] = sext i16 [[I:%.*]] to i32
1287 ; ALL-NEXT: [[PP1:%.*]] = getelementptr [100 x double], [100 x double] addrspace(1)* [[P:%.*]], …
1288 ; ALL-NEXT: [[L:%.*]] = load double, double addrspace(1)* [[PP1]], align 8
1289 ; ALL-NEXT: ret double [[L]]
1300 ; ALL-LABEL: @test81(
1301 ; ALL-NEXT: [[I:%.*]] = fptosi float [[F:%.*]] to i64
1302 ; ALL-NEXT: [[Q:%.*]] = bitcast double* [[P:%.*]] to i8*
1303 ; ALL-NEXT: [[PP:%.*]] = getelementptr i8, i8* [[Q]], i64 [[I]]
1304 ; ALL-NEXT: [[R:%.*]] = bitcast i8* [[PP]] to double*
1305 ; ALL-NEXT: [[L:%.*]] = load double, double* [[R]], align 8
1306 ; ALL-NEXT: ret double [[L]]
1317 ; ALL-LABEL: @test82(
1318 ; ALL-NEXT: [[TMP1:%.*]] = shl i64 [[A:%.*]], 1
1319 ; ALL-NEXT: [[D:%.*]] = and i64 [[TMP1]], 4294966784
1320 ; ALL-NEXT: ret i64 [[D]]
1331 ; ALL-LABEL: @test83(
1332 ; ALL-NEXT: [[CONV:%.*]] = sext i16 [[A:%.*]] to i32
1333 ; ALL-NEXT: [[TMP1:%.*]] = trunc i64 [[K:%.*]] to i32
1334 ; ALL-NEXT: [[SH_PROM:%.*]] = add i32 [[TMP1]], -1
1335 ; ALL-NEXT: [[SHL:%.*]] = shl i32 [[CONV]], [[SH_PROM]]
1336 ; ALL-NEXT: [[SH_PROM1:%.*]] = zext i32 [[SHL]] to i64
1337 ; ALL-NEXT: ret i64 [[SH_PROM1]]
1348 ; ALL-LABEL: @test84(
1349 ; ALL-NEXT: [[ADD:%.*]] = add i32 [[A:%.*]], 2130706432
1350 ; ALL-NEXT: [[SHR:%.*]] = lshr exact i32 [[ADD]], 23
1351 ; ALL-NEXT: [[TRUNC:%.*]] = trunc i32 [[SHR]] to i8
1352 ; ALL-NEXT: ret i8 [[TRUNC]]
1361 ; ALL-LABEL: @test85(
1362 ; ALL-NEXT: [[ADD:%.*]] = add i32 [[A:%.*]], 2130706432
1363 ; ALL-NEXT: [[SHR:%.*]] = lshr exact i32 [[ADD]], 23
1364 ; ALL-NEXT: [[TRUNC:%.*]] = trunc i32 [[SHR]] to i8
1365 ; ALL-NEXT: ret i8 [[TRUNC]]
1374 ; ALL-LABEL: @test86(
1375 ; ALL-NEXT: [[TMP1:%.*]] = ashr i16 [[V:%.*]], 4
1376 ; ALL-NEXT: ret i16 [[TMP1]]
1385 ; ALL-LABEL: @test87(
1386 ; ALL-NEXT: [[TMP1:%.*]] = ashr i16 [[V:%.*]], 12
1387 ; ALL-NEXT: ret i16 [[TMP1]]
1397 ; ALL-LABEL: @test88(
1398 ; ALL-NEXT: [[TMP1:%.*]] = ashr i16 [[V:%.*]], 15
1399 ; ALL-NEXT: ret i16 [[TMP1]]
1408 ; ALL-LABEL: @PR21388(
1409 ; ALL-NEXT: [[ICMP:%.*]] = icmp slt i32* [[V:%.*]], null
1410 ; ALL-NEXT: [[SEXT:%.*]] = sext i1 [[ICMP]] to i32
1411 ; ALL-NEXT: ret i32 [[SEXT]]
1419 ; ALL-LABEL: @sitofp_zext(
1420 ; ALL-NEXT: [[SITOFP:%.*]] = uitofp i16 [[A:%.*]] to float
1421 ; ALL-NEXT: ret float [[SITOFP]]
1429 ; ALL-LABEL: @PR23309(
1430 ; ALL-NEXT: [[SUB:%.*]] = sub i32 [[A:%.*]], [[B:%.*]]
1431 ; ALL-NEXT: [[TMP1:%.*]] = and i32 [[SUB]], 1
1432 ; ALL-NEXT: [[TRUNC:%.*]] = icmp ne i32 [[TMP1]], 0
1433 ; ALL-NEXT: ret i1 [[TRUNC]]
1442 ; ALL-LABEL: @PR23309v2(
1443 ; ALL-NEXT: [[SUB:%.*]] = add i32 [[A:%.*]], [[B:%.*]]
1444 ; ALL-NEXT: [[TMP1:%.*]] = and i32 [[SUB]], 1
1445 ; ALL-NEXT: [[TRUNC:%.*]] = icmp ne i32 [[TMP1]], 0
1446 ; ALL-NEXT: ret i1 [[TRUNC]]
1455 ; ALL-LABEL: @PR24763(
1456 ; ALL-NEXT: [[TMP1:%.*]] = ashr i8 [[V:%.*]], 1
1457 ; ALL-NEXT: [[T:%.*]] = sext i8 [[TMP1]] to i16
1458 ; ALL-NEXT: ret i16 [[T]]
1500 ; ALL-LABEL: @test91(
1501 ; ALL-NEXT: [[B:%.*]] = sext i64 [[A:%.*]] to i96
1502 ; ALL-NEXT: [[C:%.*]] = lshr i96 [[B]], 48
1503 ; ALL-NEXT: [[D:%.*]] = trunc i96 [[C]] to i64
1504 ; ALL-NEXT: ret i64 [[D]]
1514 ; ALL-LABEL: @test92(
1515 ; ALL-NEXT: [[TMP1:%.*]] = ashr i64 [[A:%.*]], 32
1516 ; ALL-NEXT: ret i64 [[TMP1]]
1526 ; ALL-LABEL: @test93(
1527 ; ALL-NEXT: [[TMP1:%.*]] = ashr i32 [[A:%.*]], 31
1528 ; ALL-NEXT: ret i32 [[TMP1]]
1537 ; ALL-LABEL: @trunc_lshr_sext(
1538 ; ALL-NEXT: [[D:%.*]] = ashr i8 [[A:%.*]], 6
1539 ; ALL-NEXT: ret i8 [[D]]
1548 ; ALL-LABEL: @trunc_lshr_sext_exact(
1549 ; ALL-NEXT: [[D:%.*]] = ashr exact i8 [[A:%.*]], 6
1550 ; ALL-NEXT: ret i8 [[D]]
1559 ; ALL-LABEL: @trunc_lshr_sext_uniform(
1560 ; ALL-NEXT: [[D:%.*]] = ashr <2 x i8> [[A:%.*]], <i8 6, i8 6>
1561 ; ALL-NEXT: ret <2 x i8> [[D]]
1570 ; ALL-LABEL: @trunc_lshr_sext_uniform_undef(
1571 ; ALL-NEXT: [[D:%.*]] = ashr <2 x i8> [[A:%.*]], <i8 6, i8 undef>
1572 ; ALL-NEXT: ret <2 x i8> [[D]]
1581 ; ALL-LABEL: @trunc_lshr_sext_nonuniform(
1582 ; ALL-NEXT: [[D:%.*]] = ashr <2 x i8> [[A:%.*]], <i8 6, i8 2>
1583 ; ALL-NEXT: ret <2 x i8> [[D]]
1592 ; ALL-LABEL: @trunc_lshr_sext_nonuniform_undef(
1593 ; ALL-NEXT: [[D:%.*]] = ashr <3 x i8> [[A:%.*]], <i8 6, i8 2, i8 undef>
1594 ; ALL-NEXT: ret <3 x i8> [[D]]
1603 ; ALL-LABEL: @trunc_lshr_sext_uses1(
1604 ; ALL-NEXT: [[B:%.*]] = sext <2 x i8> [[A:%.*]] to <2 x i32>
1605 ; ALL-NEXT: call void @use_v2i32(<2 x i32> [[B]])
1606 ; ALL-NEXT: [[D:%.*]] = ashr <2 x i8> [[A]], <i8 6, i8 6>
1607 ; ALL-NEXT: ret <2 x i8> [[D]]
1617 ; ALL-LABEL: @trunc_lshr_sext_uses2(
1618 ; ALL-NEXT: [[B:%.*]] = sext i8 [[A:%.*]] to i32
1619 ; ALL-NEXT: [[C:%.*]] = lshr i32 [[B]], 6
1620 ; ALL-NEXT: call void @use_i32(i32 [[C]])
1621 ; ALL-NEXT: [[D:%.*]] = ashr i8 [[A]], 6
1622 ; ALL-NEXT: ret i8 [[D]]
1632 ; ALL-LABEL: @trunc_lshr_sext_uses3(
1633 ; ALL-NEXT: [[B:%.*]] = sext <2 x i8> [[A:%.*]] to <2 x i32>
1634 ; ALL-NEXT: call void @use_v2i32(<2 x i32> [[B]])
1635 ; ALL-NEXT: [[C:%.*]] = lshr <2 x i32> [[B]], <i32 6, i32 6>
1636 ; ALL-NEXT: call void @use_v2i32(<2 x i32> [[C]])
1637 ; ALL-NEXT: [[D:%.*]] = ashr <2 x i8> [[A]], <i8 6, i8 6>
1638 ; ALL-NEXT: ret <2 x i8> [[D]]
1649 ; ALL-LABEL: @trunc_lshr_overshift_sext(
1650 ; ALL-NEXT: [[D:%.*]] = ashr <2 x i8> [[A:%.*]], <i8 7, i8 7>
1651 ; ALL-NEXT: ret <2 x i8> [[D]]
1660 ; ALL-LABEL: @trunc_lshr_overshift_sext_uses1(
1661 ; ALL-NEXT: [[B:%.*]] = sext i8 [[A:%.*]] to i32
1662 ; ALL-NEXT: call void @use_i32(i32 [[B]])
1663 ; ALL-NEXT: [[D:%.*]] = ashr i8 [[A]], 7
1664 ; ALL-NEXT: ret i8 [[D]]
1674 ; ALL-LABEL: @trunc_lshr_overshift_sext_uses2(
1675 ; ALL-NEXT: [[B:%.*]] = sext <2 x i8> [[A:%.*]] to <2 x i32>
1676 ; ALL-NEXT: [[C:%.*]] = lshr <2 x i32> [[B]], <i32 8, i32 8>
1677 ; ALL-NEXT: call void @use_v2i32(<2 x i32> [[C]])
1678 ; ALL-NEXT: [[D:%.*]] = ashr <2 x i8> [[A]], <i8 7, i8 7>
1679 ; ALL-NEXT: ret <2 x i8> [[D]]
1689 ; ALL-LABEL: @trunc_lshr_overshift_sext_uses3(
1690 ; ALL-NEXT: [[B:%.*]] = sext i8 [[A:%.*]] to i32
1691 ; ALL-NEXT: call void @use_i32(i32 [[B]])
1692 ; ALL-NEXT: [[C:%.*]] = lshr i32 [[B]], 8
1693 ; ALL-NEXT: call void @use_i32(i32 [[C]])
1694 ; ALL-NEXT: [[D:%.*]] = ashr i8 [[A]], 7
1695 ; ALL-NEXT: ret i8 [[D]]
1706 ; ALL-LABEL: @trunc_lshr_sext_wide_input(
1707 ; ALL-NEXT: [[TMP1:%.*]] = ashr i16 [[A:%.*]], 9
1708 ; ALL-NEXT: [[D:%.*]] = trunc i16 [[TMP1]] to i8
1709 ; ALL-NEXT: ret i8 [[D]]
1718 ; ALL-LABEL: @trunc_lshr_sext_wide_input_exact(
1719 ; ALL-NEXT: [[TMP1:%.*]] = ashr exact i16 [[A:%.*]], 9
1720 ; ALL-NEXT: [[D:%.*]] = trunc i16 [[TMP1]] to i8
1721 ; ALL-NEXT: ret i8 [[D]]
1730 ; ALL-LABEL: @trunc_lshr_sext_wide_input_uses1(
1731 ; ALL-NEXT: [[B:%.*]] = sext <2 x i16> [[A:%.*]] to <2 x i32>
1732 ; ALL-NEXT: call void @use_v2i32(<2 x i32> [[B]])
1733 ; ALL-NEXT: [[TMP1:%.*]] = ashr <2 x i16> [[A]], <i16 9, i16 9>
1734 ; ALL-NEXT: [[D:%.*]] = trunc <2 x i16> [[TMP1]] to <2 x i8>
1735 ; ALL-NEXT: ret <2 x i8> [[D]]
1745 ; ALL-LABEL: @trunc_lshr_sext_wide_input_uses2(
1746 ; ALL-NEXT: [[B:%.*]] = sext i16 [[A:%.*]] to i32
1747 ; ALL-NEXT: [[C:%.*]] = lshr i32 [[B]], 9
1748 ; ALL-NEXT: call void @use_i32(i32 [[C]])
1749 ; ALL-NEXT: [[D:%.*]] = trunc i32 [[C]] to i8
1750 ; ALL-NEXT: ret i8 [[D]]
1760 ; ALL-LABEL: @trunc_lshr_sext_wide_input_uses3(
1761 ; ALL-NEXT: [[B:%.*]] = sext <2 x i16> [[A:%.*]] to <2 x i32>
1762 ; ALL-NEXT: call void @use_v2i32(<2 x i32> [[B]])
1763 ; ALL-NEXT: [[C:%.*]] = lshr <2 x i32> [[B]], <i32 9, i32 9>
1764 ; ALL-NEXT: call void @use_v2i32(<2 x i32> [[C]])
1765 ; ALL-NEXT: [[D:%.*]] = trunc <2 x i32> [[C]] to <2 x i8>
1766 ; ALL-NEXT: ret <2 x i8> [[D]]
1777 ; ALL-LABEL: @trunc_lshr_overshift_wide_input_sext(
1778 ; ALL-NEXT: [[TMP1:%.*]] = ashr <2 x i16> [[A:%.*]], <i16 15, i16 15>
1779 ; ALL-NEXT: [[D:%.*]] = trunc <2 x i16> [[TMP1]] to <2 x i8>
1780 ; ALL-NEXT: ret <2 x i8> [[D]]
1789 ; ALL-LABEL: @trunc_lshr_overshift_sext_wide_input_uses1(
1790 ; ALL-NEXT: [[B:%.*]] = sext i16 [[A:%.*]] to i32
1791 ; ALL-NEXT: call void @use_i32(i32 [[B]])
1792 ; ALL-NEXT: [[TMP1:%.*]] = ashr i16 [[A]], 15
1793 ; ALL-NEXT: [[D:%.*]] = trunc i16 [[TMP1]] to i8
1794 ; ALL-NEXT: ret i8 [[D]]
1804 ; ALL-LABEL: @trunc_lshr_overshift_sext_wide_input_uses2(
1805 ; ALL-NEXT: [[TMP1:%.*]] = ashr <2 x i16> [[A:%.*]], <i16 15, i16 15>
1806 ; ALL-NEXT: [[C:%.*]] = zext <2 x i16> [[TMP1]] to <2 x i32>
1807 ; ALL-NEXT: call void @use_v2i32(<2 x i32> [[C]])
1808 ; ALL-NEXT: [[D:%.*]] = trunc <2 x i16> [[TMP1]] to <2 x i8>
1809 ; ALL-NEXT: ret <2 x i8> [[D]]
1819 ; ALL-LABEL: @trunc_lshr_overshift_sext_wide_input_uses3(
1820 ; ALL-NEXT: [[B:%.*]] = sext i16 [[A:%.*]] to i32
1821 ; ALL-NEXT: call void @use_i32(i32 [[B]])
1822 ; ALL-NEXT: [[C:%.*]] = lshr i32 [[B]], 16
1823 ; ALL-NEXT: call void @use_i32(i32 [[C]])
1824 ; ALL-NEXT: [[D:%.*]] = trunc i32 [[C]] to i8
1825 ; ALL-NEXT: ret i8 [[D]]
1836 ; ALL-LABEL: @trunc_lshr_sext_narrow_input(
1837 ; ALL-NEXT: [[TMP1:%.*]] = ashr i8 [[A:%.*]], 6
1838 ; ALL-NEXT: [[D:%.*]] = sext i8 [[TMP1]] to i16
1839 ; ALL-NEXT: ret i16 [[D]]
1848 ; ALL-LABEL: @trunc_lshr_sext_narrow_input_uses1(
1849 ; ALL-NEXT: [[B:%.*]] = sext <2 x i8> [[A:%.*]] to <2 x i32>
1850 ; ALL-NEXT: call void @use_v2i32(<2 x i32> [[B]])
1851 ; ALL-NEXT: [[TMP1:%.*]] = ashr <2 x i8> [[A]], <i8 6, i8 6>
1852 ; ALL-NEXT: [[D:%.*]] = sext <2 x i8> [[TMP1]] to <2 x i16>
1853 ; ALL-NEXT: ret <2 x i16> [[D]]
1863 ; ALL-LABEL: @trunc_lshr_sext_narrow_input_uses2(
1864 ; ALL-NEXT: [[B:%.*]] = sext i8 [[A:%.*]] to i32
1865 ; ALL-NEXT: [[C:%.*]] = lshr i32 [[B]], 6
1866 ; ALL-NEXT: call void @use_i32(i32 [[C]])
1867 ; ALL-NEXT: [[D:%.*]] = trunc i32 [[C]] to i16
1868 ; ALL-NEXT: ret i16 [[D]]
1878 ; ALL-LABEL: @trunc_lshr_sext_narrow_input_uses3(
1879 ; ALL-NEXT: [[B:%.*]] = sext <2 x i8> [[A:%.*]] to <2 x i32>
1880 ; ALL-NEXT: call void @use_v2i32(<2 x i32> [[B]])
1881 ; ALL-NEXT: [[C:%.*]] = lshr <2 x i32> [[B]], <i32 6, i32 6>
1882 ; ALL-NEXT: call void @use_v2i32(<2 x i32> [[C]])
1883 ; ALL-NEXT: [[D:%.*]] = trunc <2 x i32> [[C]] to <2 x i16>
1884 ; ALL-NEXT: ret <2 x i16> [[D]]
1895 ; ALL-LABEL: @trunc_lshr_overshift_narrow_input_sext(
1896 ; ALL-NEXT: [[TMP1:%.*]] = ashr <2 x i8> [[A:%.*]], <i8 7, i8 7>
1897 ; ALL-NEXT: [[D:%.*]] = sext <2 x i8> [[TMP1]] to <2 x i16>
1898 ; ALL-NEXT: ret <2 x i16> [[D]]
1907 ; ALL-LABEL: @trunc_lshr_overshift_sext_narrow_input_uses1(
1908 ; ALL-NEXT: [[B:%.*]] = sext i8 [[A:%.*]] to i32
1909 ; ALL-NEXT: call void @use_i32(i32 [[B]])
1910 ; ALL-NEXT: [[TMP1:%.*]] = ashr i8 [[A]], 7
1911 ; ALL-NEXT: [[D:%.*]] = sext i8 [[TMP1]] to i16
1912 ; ALL-NEXT: ret i16 [[D]]
1922 ; ALL-LABEL: @trunc_lshr_overshift_sext_narrow_input_uses2(
1923 ; ALL-NEXT: [[B:%.*]] = sext <2 x i8> [[A:%.*]] to <2 x i32>
1924 ; ALL-NEXT: [[C:%.*]] = lshr <2 x i32> [[B]], <i32 8, i32 8>
1925 ; ALL-NEXT: call void @use_v2i32(<2 x i32> [[C]])
1926 ; ALL-NEXT: [[D:%.*]] = trunc <2 x i32> [[C]] to <2 x i16>
1927 ; ALL-NEXT: ret <2 x i16> [[D]]
1937 ; ALL-LABEL: @trunc_lshr_overshift_sext_narrow_input_uses3(
1938 ; ALL-NEXT: [[B:%.*]] = sext i8 [[A:%.*]] to i32
1939 ; ALL-NEXT: call void @use_i32(i32 [[B]])
1940 ; ALL-NEXT: [[C:%.*]] = lshr i32 [[B]], 8
1941 ; ALL-NEXT: call void @use_i32(i32 [[C]])
1942 ; ALL-NEXT: [[D:%.*]] = trunc i32 [[C]] to i16
1943 ; ALL-NEXT: ret i16 [[D]]
1954 ; ALL-LABEL: @trunc_lshr_overshift2_sext(
1955 ; ALL-NEXT: [[B:%.*]] = sext <2 x i8> [[A:%.*]] to <2 x i32>
1956 ; ALL-NEXT: [[C:%.*]] = lshr <2 x i32> [[B]], <i32 25, i32 25>
1957 ; ALL-NEXT: [[D:%.*]] = trunc <2 x i32> [[C]] to <2 x i8>
1958 ; ALL-NEXT: ret <2 x i8> [[D]]
1967 ; ALL-LABEL: @trunc_lshr_overshift2_sext_uses1(
1968 ; ALL-NEXT: [[B:%.*]] = sext i8 [[A:%.*]] to i32
1969 ; ALL-NEXT: call void @use_i32(i32 [[B]])
1970 ; ALL-NEXT: [[C:%.*]] = lshr i32 [[B]], 25
1971 ; ALL-NEXT: [[D:%.*]] = trunc i32 [[C]] to i8
1972 ; ALL-NEXT: ret i8 [[D]]
1982 ; ALL-LABEL: @trunc_lshr_overshift2_sext_uses2(
1983 ; ALL-NEXT: [[B:%.*]] = sext <2 x i8> [[A:%.*]] to <2 x i32>
1984 ; ALL-NEXT: [[C:%.*]] = lshr <2 x i32> [[B]], <i32 25, i32 25>
1985 ; ALL-NEXT: call void @use_v2i32(<2 x i32> [[C]])
1986 ; ALL-NEXT: [[D:%.*]] = trunc <2 x i32> [[C]] to <2 x i8>
1987 ; ALL-NEXT: ret <2 x i8> [[D]]
1997 ; ALL-LABEL: @trunc_lshr_overshift2_sext_uses3(
1998 ; ALL-NEXT: [[B:%.*]] = sext i8 [[A:%.*]] to i32
1999 ; ALL-NEXT: call void @use_i32(i32 [[B]])
2000 ; ALL-NEXT: [[C:%.*]] = lshr i32 [[B]], 25
2001 ; ALL-NEXT: call void @use_i32(i32 [[C]])
2002 ; ALL-NEXT: [[D:%.*]] = trunc i32 [[C]] to i8
2003 ; ALL-NEXT: ret i8 [[D]]
2014 ; ALL-LABEL: @trunc_lshr_zext(
2015 ; ALL-NEXT: [[TMP1:%.*]] = lshr i8 [[A:%.*]], 6
2016 ; ALL-NEXT: ret i8 [[TMP1]]
2025 ; ALL-LABEL: @trunc_lshr_zext_exact(
2026 ; ALL-NEXT: [[TMP1:%.*]] = lshr i8 [[A:%.*]], 6
2027 ; ALL-NEXT: ret i8 [[TMP1]]
2036 ; ALL-LABEL: @trunc_lshr_zext_uniform(
2037 ; ALL-NEXT: [[TMP1:%.*]] = lshr <2 x i8> [[A:%.*]], <i8 6, i8 6>
2038 ; ALL-NEXT: ret <2 x i8> [[TMP1]]
2047 ; ALL-LABEL: @trunc_lshr_zext_uniform_undef(
2048 ; ALL-NEXT: [[B:%.*]] = zext <2 x i8> [[A:%.*]] to <2 x i32>
2049 ; ALL-NEXT: [[C:%.*]] = lshr <2 x i32> [[B]], <i32 6, i32 undef>
2050 ; ALL-NEXT: [[D:%.*]] = trunc <2 x i32> [[C]] to <2 x i8>
2051 ; ALL-NEXT: ret <2 x i8> [[D]]
2060 ; ALL-LABEL: @trunc_lshr_zext_nonuniform(
2061 ; ALL-NEXT: [[C:%.*]] = lshr <2 x i8> [[A:%.*]], <i8 6, i8 2>
2062 ; ALL-NEXT: ret <2 x i8> [[C]]
2071 ; ALL-LABEL: @trunc_lshr_zext_nonuniform_undef(
2072 ; ALL-NEXT: [[B:%.*]] = zext <3 x i8> [[A:%.*]] to <3 x i32>
2073 ; ALL-NEXT: [[C:%.*]] = lshr <3 x i32> [[B]], <i32 6, i32 2, i32 undef>
2074 ; ALL-NEXT: [[D:%.*]] = trunc <3 x i32> [[C]] to <3 x i8>
2075 ; ALL-NEXT: ret <3 x i8> [[D]]
2084 ; ALL-LABEL: @trunc_lshr_zext_uses1(
2085 ; ALL-NEXT: [[B:%.*]] = zext <2 x i8> [[A:%.*]] to <2 x i32>
2086 ; ALL-NEXT: call void @use_v2i32(<2 x i32> [[B]])
2087 ; ALL-NEXT: [[C:%.*]] = lshr <2 x i8> [[A]], <i8 6, i8 6>
2088 ; ALL-NEXT: ret <2 x i8> [[C]]
2101 ; ALL-LABEL: @pr33078_1(
2102 ; ALL-NEXT: [[TMP1:%.*]] = ashr i8 [[A:%.*]], 7
2103 ; ALL-NEXT: ret i8 [[TMP1]]
2112 ; ALL-LABEL: @pr33078_2(
2113 ; ALL-NEXT: [[TMP1:%.*]] = ashr i8 [[A:%.*]], 4
2114 ; ALL-NEXT: [[D:%.*]] = sext i8 [[TMP1]] to i12
2115 ; ALL-NEXT: ret i12 [[D]]
2124 ; ALL-LABEL: @pr33078_3(
2125 ; ALL-NEXT: [[B:%.*]] = sext i8 [[A:%.*]] to i16
2126 ; ALL-NEXT: [[C:%.*]] = lshr i16 [[B]], 12
2127 ; ALL-NEXT: [[D:%.*]] = trunc i16 [[C]] to i4
2128 ; ALL-NEXT: ret i4 [[D]]
2138 ; ALL-LABEL: @pr33078_4(
2139 ; ALL-NEXT: [[B:%.*]] = sext i3 [[X:%.*]] to i16
2140 ; ALL-NEXT: [[C:%.*]] = lshr i16 [[B]], 13
2141 ; ALL-NEXT: [[D:%.*]] = trunc i16 [[C]] to i8
2142 ; ALL-NEXT: ret i8 [[D]]
2152 ; ALL-LABEL: @test94(
2153 ; ALL-NEXT: [[TMP1:%.*]] = icmp ne i32 [[A:%.*]], -2
2154 ; ALL-NEXT: [[TMP2:%.*]] = sext i1 [[TMP1]] to i64
2155 ; ALL-NEXT: ret i64 [[TMP2]]
2166 ; ALL-LABEL: @test95(
2167 ; ALL-NEXT: [[TMP1:%.*]] = lshr i32 [[X:%.*]], 6
2168 ; ALL-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 2
2169 ; ALL-NEXT: [[TMP3:%.*]] = or i32 [[TMP2]], 40
2170 ; ALL-NEXT: ret i32 [[TMP3]]