Lines Matching refs:RET

24 ; CHECK-NEXT:    [[RET:%.*]] = or i32 [[AND]], [[AND1]]
25 ; CHECK-NEXT:    ret i32 [[RET]]
39 ; CHECK-NEXT:    [[RET:%.*]] = or <2 x i32> [[AND]], [[AND1]]
40 ; CHECK-NEXT:    ret <2 x i32> [[RET]]
54 ; CHECK-NEXT:    [[RET:%.*]] = or <3 x i32> [[AND]], [[AND1]]
55 ; CHECK-NEXT:    ret <3 x i32> [[RET]]
72 ; CHECK-NEXT:    [[RET:%.*]] = or i32 [[AND]], [[AND1]]
73 ; CHECK-NEXT:    ret i32 [[RET]]
85 ; CHECK-NEXT:    [[RET:%.*]] = or <2 x i32> [[AND]], [[AND1]]
86 ; CHECK-NEXT:    ret <2 x i32> [[RET]]
98 ; CHECK-NEXT:    [[RET:%.*]] = add <2 x i32> [[AND]], [[AND1]]
99 ; CHECK-NEXT:    ret <2 x i32> [[RET]]
111 ; CHECK-NEXT:    [[RET:%.*]] = add <3 x i32> [[AND]], [[AND1]]
112 ; CHECK-NEXT:    ret <3 x i32> [[RET]]
128 ; CHECK-NEXT:    [[RET:%.*]] = or i32 [[AND]], [[AND1]]
129 ; CHECK-NEXT:    ret i32 [[RET]]
141 ; CHECK-NEXT:    [[RET:%.*]] = or <2 x i32> [[AND]], [[AND1]]
142 ; CHECK-NEXT:    ret <2 x i32> [[RET]]
154 ; CHECK-NEXT:    [[RET:%.*]] = add <2 x i32> [[AND]], [[AND1]]
155 ; CHECK-NEXT:    ret <2 x i32> [[RET]]
167 ; CHECK-NEXT:    [[RET:%.*]] = add <3 x i32> [[AND]], [[AND1]]
168 ; CHECK-NEXT:    ret <3 x i32> [[RET]]
188 ; CHECK-NEXT:    [[RET:%.*]] = or i32 [[AND]], [[AND1]]
189 ; CHECK-NEXT:    ret i32 [[RET]]
204 ; CHECK-NEXT:    [[RET:%.*]] = or i32 [[AND]], [[AND1]]
205 ; CHECK-NEXT:    ret i32 [[RET]]
220 ; CHECK-NEXT:    [[RET:%.*]] = or i32 [[AND1]], [[AND]]
221 ; CHECK-NEXT:    ret i32 [[RET]]
236 ; CHECK-NEXT:    [[RET:%.*]] = or i32 [[AND]], [[AND1]]
237 ; CHECK-NEXT:    ret i32 [[RET]]
252 ; CHECK-NEXT:    [[RET:%.*]] = or i32 [[AND1]], [[AND]]
253 ; CHECK-NEXT:    ret i32 [[RET]]
268 ; CHECK-NEXT:    [[RET:%.*]] = or i32 [[AND1]], [[AND]]
269 ; CHECK-NEXT:    ret i32 [[RET]]
285 ; CHECK-NEXT:    [[RET:%.*]] = or i32 [[AND1]], [[AND]]
286 ; CHECK-NEXT:    ret i32 [[RET]]
300 ; CHECK-NEXT:    [[RET:%.*]] = or i32 [[AND1]], [[AND]]
301 ; CHECK-NEXT:    ret i32 [[RET]]
322 ; CHECK-NEXT:    [[RET:%.*]] = or i32 [[AND]], [[AND1]]
326 ; CHECK-NEXT:    ret i32 [[RET]]
342 ; CHECK-NEXT:    [[RET:%.*]] = or i32 [[AND]], [[AND1]]
345 ; CHECK-NEXT:    ret i32 [[RET]]
362 ; CHECK-NEXT:    [[RET:%.*]] = add i32 [[AND]], [[AND1]]
363 ; CHECK-NEXT:    ret i32 [[RET]]
379 ; CHECK-NEXT:    [[RET:%.*]] = add i32 [[AND]], [[AND1]]
380 ; CHECK-NEXT:    ret i32 [[RET]]
395 ; CHECK-NEXT:    [[RET:%.*]] = add i32 [[AND]], [[AND1]]
396 ; CHECK-NEXT:    ret i32 [[RET]]
408 ; CHECK-NEXT:    [[RET:%.*]] = add nuw nsw i32 [[AND]], [[AND1]]
409 ; CHECK-NEXT:    ret i32 [[RET]]