Lines Matching refs:ashr

10 ; CHECK-NEXT:    [[B:%.*]] = ashr i32 [[A:%.*]], 7
11 ; CHECK-NEXT:    [[C:%.*]] = ashr i32 [[A]], 9
16   %B = ashr i32 %A, 7
17   %C = ashr i32 %A, 9
28 ; CHECK-NEXT:    [[B:%.*]] = ashr i32 [[A:%.*]], 7
35   %B = ashr i32 %A, 7
47 ; CHECK-NEXT:    [[B:%.*]] = ashr i16 [[A:%.*]], 7
48 ; CHECK-NEXT:    [[C:%.*]] = ashr i32 [[X:%.*]], 9
54   %B = ashr i16 %A, 7
55   %C = ashr i32 %x, 9
64 ; CHECK-NEXT:    [[B:%.*]] = ashr i32 [[A:%.*]], 7
65 ; CHECK-NEXT:    [[C:%.*]] = ashr i32 [[A]], 9
72   %B = ashr i32 %A, 7
73   %C = ashr i32 %A, 9
83 ; CHECK-NEXT:    [[B:%.*]] = ashr i32 [[A:%.*]], 7
84 ; CHECK-NEXT:    [[C:%.*]] = ashr i32 [[A]], 9
91   %B = ashr i32 %A, 7
92   %C = ashr i32 %A, 9
104 ; CHECK-NEXT:    [[B:%.*]] = ashr i32 [[A:%.*]], 7
105 ; CHECK-NEXT:    [[C:%.*]] = ashr i32 [[A]], 9
113   %B = ashr i32 %A, 7
114   %C = ashr i32 %A, 9
187 ; CHECK-NEXT:    [[ASHR:%.*]] = ashr i32 [[V:%.*]], 1
192   %ashr = ashr i32 %V, 1
193   %sext = sext i32 %ashr to i64
202 ; CHECK-NEXT:    [[ASHR:%.*]] = ashr i32 [[V:%.*]], 1
208   %ashr = ashr i32 %V, 1
209   %sext = sext i32 %ashr to i64
217 ; CHECK-NEXT:    [[ASHR:%.*]] = ashr <2 x i32> [[V:%.*]], <i32 1, i32 1>
222   %ashr = ashr <2 x i32> %V, <i32 1, i32 1>
223   %sext = sext <2 x i32> %ashr to <2 x i64>
230 ; CHECK-NEXT:    [[ASHR:%.*]] = ashr <2 x i32> [[V:%.*]], <i32 1, i32 1>
235   %ashr = ashr <2 x i32> %V, <i32 1, i32 1>
236   %sext = sext <2 x i32> %ashr to <2 x i64>
243 ; CHECK-NEXT:    [[ASHR:%.*]] = ashr i32 [[V:%.*]], 1
248   %ashr = ashr i32 %V, 1
249   %sext = sext i32 %ashr to i64
256 ; CHECK-NEXT:    [[ASHR:%.*]] = ashr <2 x i32> [[V:%.*]], <i32 1, i32 1>
261   %ashr = ashr <2 x i32> %V, <i32 1, i32 1>
262   %sext = sext <2 x i32> %ashr to <2 x i64>
269 ; CHECK-NEXT:    [[ASHR:%.*]] = ashr <2 x i32> [[V:%.*]], <i32 1, i32 1>
274   %ashr = ashr <2 x i32> %V, <i32 1, i32 1>
275   %sext = sext <2 x i32> %ashr to <2 x i64>
282 ; CHECK-NEXT:    [[ASHR:%.*]] = ashr <2 x i32> [[V:%.*]], <i32 1, i32 1>
287   %ashr = ashr <2 x i32> %V, <i32 1, i32 1>
288   %sext = sext <2 x i32> %ashr to <2 x i64>
334 ; CHECK-NEXT:    [[ASHR:%.*]] = ashr i32 [[V:%.*]], 16
339   %ashr = ashr i32 %V, 16
340   %sext = sext i32 %ashr to i64
347 ; CHECK-NEXT:    [[ASHR:%.*]] = ashr <2 x i32> [[V:%.*]], <i32 16, i32 16>
352   %ashr = ashr <2 x i32> %V, <i32 16, i32 16>
353   %sext = sext <2 x i32> %ashr to <2 x i64>
360 ; CHECK-NEXT:    [[ASHR:%.*]] = ashr <2 x i32> [[V:%.*]], <i32 16, i32 16>
365   %ashr = ashr <2 x i32> %V, <i32 16, i32 16>
366   %sext = sext <2 x i32> %ashr to <2 x i64>
373 ; CHECK-NEXT:    [[ASHR:%.*]] = ashr <2 x i32> [[V:%.*]], <i32 16, i32 16>
378   %ashr = ashr <2 x i32> %V, <i32 16, i32 16>
379   %sext = sext <2 x i32> %ashr to <2 x i64>
386 ; CHECK-NEXT:    [[ASHR:%.*]] = ashr i32 [[V:%.*]], 16
391   %ashr = ashr i32 %V, 16
392   %sext = sext i32 %ashr to i64
399 ; CHECK-NEXT:    [[ASHR:%.*]] = ashr <2 x i32> [[V:%.*]], <i32 16, i32 16>
404   %ashr = ashr <2 x i32> %V, <i32 16, i32 16>
405   %sext = sext <2 x i32> %ashr to <2 x i64>
412 ; CHECK-NEXT:    [[ASHR:%.*]] = ashr <2 x i32> [[V:%.*]], <i32 16, i32 16>
417   %ashr = ashr <2 x i32> %V, <i32 16, i32 16>
418   %sext = sext <2 x i32> %ashr to <2 x i64>
528 ; CHECK-NEXT:    [[ASHR:%.*]] = ashr i32 [[V:%.*]], 1
533   %ashr = ashr i32 %V, 1
534   %sext = sext i32 %ashr to i64
541 ; CHECK-NEXT:    [[ASHR:%.*]] = ashr <2 x i32> [[V:%.*]], <i32 1, i32 1>
546   %ashr = ashr <2 x i32> %V, <i32 1, i32 1>
547   %sext = sext <2 x i32> %ashr to <2 x i64>