Lines Matching refs:NBITS

15 ; CHECK-NEXT:    [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]]
17 ; CHECK-NEXT:    [[T2:%.*]] = lshr exact i32 [[T1]], [[NBITS]]
27 ; CHECK-NEXT:    [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]]
29 ; CHECK-NEXT:    [[T2:%.*]] = ashr exact i32 [[T1]], [[NBITS]]
42 ; CHECK-NEXT:    [[T0:%.*]] = shl <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, [[NBITS:%.*]]
44 ; CHECK-NEXT:    [[T2:%.*]] = lshr <4 x i32> [[T1]], [[NBITS]]
55 ; CHECK-NEXT:    [[T0:%.*]] = shl <4 x i32> <i32 -1, i32 -1, i32 undef, i32 -1>, [[NBITS:%.*]]
57 ; CHECK-NEXT:    [[T2:%.*]] = lshr <4 x i32> [[T1]], [[NBITS]]
72 ; CHECK-NEXT:    [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]]
75 ; CHECK-NEXT:    [[T2:%.*]] = lshr i32 [[T1]], [[NBITS]]
87 ; CHECK-NEXT:    [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]]
90 ; CHECK-NEXT:    [[T2:%.*]] = lshr i32 [[T1]], [[NBITS]]
102 ; CHECK-NEXT:    [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]]
106 ; CHECK-NEXT:    [[T2:%.*]] = lshr i32 [[T1]], [[NBITS]]
121 ; CHECK-NEXT:    [[T0:%.*]] = lshr i32 [[DATA:%.*]], [[NBITS:%.*]]
123 ; CHECK-NEXT:    [[T1:%.*]] = shl i32 [[T0]], [[NBITS]]
125 ; CHECK-NEXT:    [[T2:%.*]] = lshr i32 [[T1]], [[NBITS]]
138 ; CHECK-NEXT:    [[T0:%.*]] = lshr i32 [[DATA:%.*]], [[NBITS:%.*]]
140 ; CHECK-NEXT:    [[T1:%.*]] = shl i32 [[T0]], [[NBITS]]
142 ; CHECK-NEXT:    [[T2:%.*]] = ashr i32 [[T1]], [[NBITS]]
155 ; CHECK-NEXT:    [[T0:%.*]] = ashr i32 [[DATA:%.*]], [[NBITS:%.*]]
157 ; CHECK-NEXT:    [[T1:%.*]] = shl i32 [[T0]], [[NBITS]]
159 ; CHECK-NEXT:    [[T2:%.*]] = lshr i32 [[T1]], [[NBITS]]
172 ; CHECK-NEXT:    [[T0:%.*]] = ashr i32 [[DATA:%.*]], [[NBITS:%.*]]
174 ; CHECK-NEXT:    [[T1:%.*]] = shl i32 [[T0]], [[NBITS]]
176 ; CHECK-NEXT:    [[T2:%.*]] = ashr i32 [[T1]], [[NBITS]]
194 ; CHECK-NEXT:    [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]]
196 ; CHECK-NEXT:    [[T2:%.*]] = lshr i32 [[T1]], [[NBITS]]
210 ; CHECK-NEXT:    [[T0:%.*]] = shl i32 2147483647, [[NBITS:%.*]]
212 ; CHECK-NEXT:    [[T2:%.*]] = lshr i32 [[T1]], [[NBITS]]