Lines Matching refs:TMP3
8 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
9 ; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[Y:%.*]], [[TMP3]]
25 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
26 ; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[Y:%.*]], [[TMP3]]
42 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
43 ; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[Y:%.*]], [[TMP3]]
59 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
60 ; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[Y:%.*]], [[TMP3]]
76 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
77 ; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[Y:%.*]], [[TMP3]]
93 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
94 ; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[Y:%.*]], [[TMP3]]
110 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
111 ; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[Y:%.*]], [[TMP3]]
127 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
128 ; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[Y:%.*]], [[TMP3]]
144 ; CHECK-NEXT: [[TMP3:%.*]] = mul i32 [[TMP2]], [[TMP1]]
145 ; CHECK-NEXT: [[TMP4:%.*]] = mul i32 [[TMP3]], [[TMP2]]
161 ; CHECK-NEXT: [[TMP3:%.*]] = mul i32 [[TMP2]], [[TMP1]]
162 ; CHECK-NEXT: [[TMP4:%.*]] = mul i32 [[TMP3]], [[TMP2]]
178 ; CHECK-NEXT: [[TMP3:%.*]] = mul i32 [[TMP2]], [[TMP1]]
179 ; CHECK-NEXT: [[TMP4:%.*]] = mul i32 [[TMP3]], [[TMP2]]
195 ; CHECK-NEXT: [[TMP3:%.*]] = mul i32 [[TMP2]], [[TMP1]]
196 ; CHECK-NEXT: [[TMP4:%.*]] = mul i32 [[TMP3]], [[TMP2]]
213 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
214 ; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[Y:%.*]], [[TMP3]]
230 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
231 ; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[Y:%.*]], [[TMP3]]
247 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
248 ; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[Y:%.*]], [[TMP3]]
264 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
265 ; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[Y:%.*]], [[TMP3]]
281 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
282 ; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[Y:%.*]], [[TMP3]]
298 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
299 ; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[Y:%.*]], [[TMP3]]
315 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
316 ; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[Y:%.*]], [[TMP3]]
332 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
333 ; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[Y:%.*]], [[TMP3]]
349 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
350 ; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[Y:%.*]], [[TMP3]]
366 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
367 ; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[Y:%.*]], [[TMP3]]
383 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
384 ; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[Y:%.*]], [[TMP3]]
400 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
401 ; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[Y:%.*]], [[TMP3]]