Lines Matching refs:TMP1

5 ; CHECK-NEXT:    [[TMP1:%.*]] = trunc i32 %y32 to i16
6 ; CHECK-NEXT: [[R:%.*]] = and i16 [[TMP1]], %x16
17 ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16
18 ; CHECK-NEXT: [[R:%.*]] = and i16 [[TMP1]], %x16
29 ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16
30 ; CHECK-NEXT: [[R:%.*]] = or i16 [[TMP1]], %x16
41 ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16
42 ; CHECK-NEXT: [[R:%.*]] = or i16 [[TMP1]], %x16
53 ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16
54 ; CHECK-NEXT: [[R:%.*]] = xor i16 [[TMP1]], %x16
65 ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16
66 ; CHECK-NEXT: [[R:%.*]] = xor i16 [[TMP1]], %x16
77 ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16
78 ; CHECK-NEXT: [[R:%.*]] = add i16 [[TMP1]], %x16
89 ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16
90 ; CHECK-NEXT: [[R:%.*]] = add i16 [[TMP1]], %x16
101 ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16
102 ; CHECK-NEXT: [[R:%.*]] = sub i16 %x16, [[TMP1]]
113 ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16
114 ; CHECK-NEXT: [[R:%.*]] = sub i16 %x16, [[TMP1]]
125 ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16
126 ; CHECK-NEXT: [[R:%.*]] = mul i16 [[TMP1]], %x16
137 ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16
138 ; CHECK-NEXT: [[R:%.*]] = mul i16 [[TMP1]], %x16
153 ; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>
154 ; CHECK-NEXT: [[R:%.*]] = and <2 x i16> [[TMP1]], %x16
167 ; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>
168 ; CHECK-NEXT: [[R:%.*]] = and <2 x i16> [[TMP1]], %x16
181 ; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>
182 ; CHECK-NEXT: [[R:%.*]] = or <2 x i16> [[TMP1]], %x16
195 ; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>
196 ; CHECK-NEXT: [[R:%.*]] = or <2 x i16> [[TMP1]], %x16
209 ; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>
210 ; CHECK-NEXT: [[R:%.*]] = xor <2 x i16> [[TMP1]], %x16
223 ; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>
224 ; CHECK-NEXT: [[R:%.*]] = xor <2 x i16> [[TMP1]], %x16
237 ; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>
238 ; CHECK-NEXT: [[R:%.*]] = add <2 x i16> [[TMP1]], %x16
251 ; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>
252 ; CHECK-NEXT: [[R:%.*]] = add <2 x i16> [[TMP1]], %x16
265 ; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>
266 ; CHECK-NEXT: [[R:%.*]] = sub <2 x i16> [[TMP1]], %x16
279 ; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>
280 ; CHECK-NEXT: [[R:%.*]] = sub <2 x i16> [[TMP1]], %x16
293 ; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>
294 ; CHECK-NEXT: [[R:%.*]] = mul <2 x i16> [[TMP1]], %x16
307 ; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>
308 ; CHECK-NEXT: [[R:%.*]] = mul <2 x i16> [[TMP1]], %x16
324 ; CHECK-NEXT: [[TMP1:%.*]] = lshr i16 [[SUB]], 1
325 ; CHECK-NEXT: [[T:%.*]] = trunc i16 [[TMP1]] to i8
341 ; CHECK-NEXT: [[TMP1:%.*]] = lshr i16 [[SUB]], 1
342 ; CHECK-NEXT: [[T:%.*]] = trunc i16 [[TMP1]] to i8
358 ; CHECK-NEXT: [[TMP1:%.*]] = lshr i14 [[SUB]], 1
359 ; CHECK-NEXT: [[T:%.*]] = trunc i14 [[TMP1]] to i7
375 ; CHECK-NEXT: [[TMP1:%.*]] = lshr <8 x i32> [[SUB]], <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, …
376 ; CHECK-NEXT: [[T:%.*]] = trunc <8 x i32> [[TMP1]] to <8 x i8>
392 ; CHECK-NEXT: [[TMP1:%.*]] = lshr i16 [[SUB]], 1
393 ; CHECK-NEXT: [[T:%.*]] = trunc i16 [[TMP1]] to i8