Lines Matching refs:CONV

14 ; CHECK-NEXT:    [[CONV:%.*]] = sext i8 %x to i32
15 ; CHECK-NEXT:    [[DIV:%.*]] = sdiv i32 [[CONV]], 128
34 ; CHECK-NEXT:    [[CONV:%.*]] = sext i8 %x to i32
35 ; CHECK-NEXT:    [[DIV:%.*]] = sdiv i32 [[CONV]], -128
54 ; CHECK-NEXT:    [[CONV:%.*]] = zext i8 %x to i32
55 ; CHECK-NEXT:    [[DIV:%.*]] = sdiv i32 [[CONV]], 255
74 ; CHECK-NEXT:    [[CONV:%.*]] = zext i8 %x to i32
75 ; CHECK-NEXT:    [[DIV:%.*]] = sdiv i32 [[CONV]], -255
165 ; CHECK-NEXT:    [[CONV:%.*]] = sext i8 %x to i32
166 ; CHECK-NEXT:    ret i32 [[CONV]]
175 ; CHECK-NEXT:    [[CONV:%.*]] = sext i8 %x to i32
176 ; CHECK-NEXT:    [[REM:%.*]] = srem i32 [[CONV]], 128
186 ; CHECK-NEXT:    [[CONV:%.*]] = sext i8 %x to i32
187 ; CHECK-NEXT:    ret i32 [[CONV]]
196 ; CHECK-NEXT:    [[CONV:%.*]] = sext i8 %x to i32
197 ; CHECK-NEXT:    [[REM:%.*]] = srem i32 [[CONV]], -128
207 ; CHECK-NEXT:    [[CONV:%.*]] = zext i8 %x to i32
208 ; CHECK-NEXT:    ret i32 [[CONV]]
217 ; CHECK-NEXT:    [[CONV:%.*]] = zext i8 %x to i32
218 ; CHECK-NEXT:    [[REM:%.*]] = srem i32 [[CONV]], 255
228 ; CHECK-NEXT:    [[CONV:%.*]] = zext i8 %x to i32
229 ; CHECK-NEXT:    ret i32 [[CONV]]
238 ; CHECK-NEXT:    [[CONV:%.*]] = zext i8 %x to i32
239 ; CHECK-NEXT:    [[REM:%.*]] = srem i32 [[CONV]], -255