Lines Matching +refs:llvm +refs:mode +refs:syntax +refs:table
40 These interfaces are defined in ``include/llvm/Target/``.
45 ``include/llvm/CodeGen/``. At this level, concepts like "constant pool
194 The LLVM target description classes (located in the ``include/llvm/Target``
330 ``include/llvm/CodeGen``). This representation is completely target agnostic,
369 .. code-block:: llvm
382 the ``include/llvm/CodeGen/MachineInstrBuilder.h`` file. The ``BuildMI``
429 .. code-block:: llvm
439 .. code-block:: llvm
456 .. code-block:: llvm
515 a ``MachineRegisterInfo``. See ``include/llvm/CodeGen/MachineFunction.h`` for
603 llvm-mc tool to implement standalone machine code assemblers and disassemblers.
622 This API is most important for two clients: the llvm-mc stand-alone assembler is
641 To make llvm use these classes, the target initialization must call
747 ``include/llvm/CodeGen/ISDOpcodes.h`` file.
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968 .. code-block:: llvm
1001 are defined in the ``include/llvm/Target/TargetSelectionDAG.td`` file.
1055 or more complex operands (like e.g. `X86 addressing mode`_), the pattern may
1086 values (e.g. the four operands of the `X86 addressing mode`_, which are
1429 stand-alone mode for triaging bugs and as a performance baseline.
1484 ``RBP-1020``). The offset (divided by 4 in 32-bit mode and 8 in 64-bit mode)
1487 following table:
1505 32-bit mode and 8 in 64-bit mode) is encoded in bits 16-23 (mask:
1506 ``0x00FF0000``). There is a maximum stack size of 1024 bytes in 32-bit mode
1507 and 2048 in 64-bit mode. The number of registers saved is encoded in bits 9-12
1569 often target specific, and is responsible for turning jump table entries,
1624 ``llvm/CodeGen/DFAPacketizer.h`` for more information.
1632 (in particular the instruction syntax and encodings), which means that a large
1762 table that summarizes what features are supported by each target.
1769 Note that this table does not list features that are not supported fully by any
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1792 Here is the table:
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1950 by implementing the MCAsmParser interface. This is required for llvm-mc to be
1980 The ARM backend has basic support for integer code in ARM codegen mode, but
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2103 .. code-block:: llvm
2156 .. _X86 addressing mode:
2262 or shrink. A base pointer is also used if llvm-gcc is not passed the
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2300 GPR, thus the linkage area is 24 bytes long in 32 bit mode and 48 bytes in 64
2301 bit mode.
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2371 bit mode.) Also note that since the parameter area is a fixed offset from the
2376 stack frame is minimally 64 bytes in 32 bit mode and 128 bytes in 64 bit mode.
2386 The *locals area* is where the llvm compiler reserves space for local variables.
2388 The *saved registers area* is where the llvm compiler spills callee saved
2394 The llvm prolog and epilog are the same as described in the PowerPC ABI, with
2396 created. This allows the llvm epilog/prolog support to be common with other
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2550 | mode | size | instruction class |
2674 * **G** --- Represents the offset into the global offset table at which the
2676 * **GOT** --- Represents the address of the global offset table.