Lines Matching refs:bits
14 class DSe_vi <bits<8> op> : Enc64 {
15 bits<8> vdst;
16 bits<1> gds;
17 bits<8> addr;
18 bits<8> data0;
19 bits<8> data1;
20 bits<8> offset0;
21 bits<8> offset1;
34 class MUBUFe_vi <bits<7> op> : Enc64 {
35 bits<12> offset;
36 bits<1> offen;
37 bits<1> idxen;
38 bits<1> glc;
39 bits<1> lds;
40 bits<8> vaddr;
41 bits<8> vdata;
42 bits<7> srsrc;
43 bits<1> slc;
44 bits<1> tfe;
45 bits<8> soffset;
62 class MTBUFe_vi <bits<4> op> : Enc64 {
63 bits<12> offset;
64 bits<1> offen;
65 bits<1> idxen;
66 bits<1> glc;
67 bits<4> dfmt;
68 bits<3> nfmt;
69 bits<8> vaddr;
70 bits<8> vdata;
71 bits<7> srsrc;
72 bits<1> slc;
73 bits<1> tfe;
74 bits<8> soffset;
92 class SMEMe_vi <bits<8> op, bit imm> : Enc64 {
93 bits<7> sbase;
94 bits<7> sdst;
95 bits<1> glc;
105 class SMEM_IMMe_vi <bits<8> op> : SMEMe_vi<op, 1> {
106 bits<20> offset;
110 class SMEM_SOFFe_vi <bits<8> op> : SMEMe_vi<op, 0> {
111 bits<20> soff;
115 class VOP3a_vi <bits<10> op> : Enc64 {
116 bits<2> src0_modifiers;
117 bits<9> src0;
118 bits<2> src1_modifiers;
119 bits<9> src1;
120 bits<2> src2_modifiers;
121 bits<9> src2;
122 bits<1> clamp;
123 bits<2> omod;
140 class VOP3e_vi <bits<10> op> : VOP3a_vi <op> {
141 bits<8> vdst;
148 class VOP3ce_vi <bits<10> op> : VOP3a_vi <op> {
149 bits<8> sdst;
154 class VOP3be_vi <bits<10> op> : Enc64 {
155 bits<8> vdst;
156 bits<2> src0_modifiers;
157 bits<9> src0;
158 bits<2> src1_modifiers;
159 bits<9> src1;
160 bits<2> src2_modifiers;
161 bits<9> src2;
162 bits<7> sdst;
163 bits<2> omod;
164 bits<1> clamp;
189 bits<2> src0_modifiers;
190 bits<8> src0;
191 bits<2> src1_modifiers;
192 bits<9> dpp_ctrl;
193 bits<1> bound_ctrl;
194 bits<4> bank_mask;
195 bits<4> row_mask;
208 class VOP1_DPPe <bits<8> op> : VOP_DPPe {
209 bits<8> vdst;
217 class VOP2_DPPe <bits<6> op> : VOP_DPPe {
218 bits<8> vdst;
219 bits<8> src1;
235 bits<8> src0;
236 bits<3> src0_sel;
237 bits<2> src0_fmodifiers; // {abs,neg}
238 bits<1> src0_imodifiers; // sext
239 bits<3> src1_sel;
240 bits<2> src1_fmodifiers;
241 bits<1> src1_imodifiers;
242 bits<3> dst_sel;
243 bits<2> dst_unused;
244 bits<1> clamp;
258 class VOP1_SDWAe <bits<8> op> : VOP_SDWAe {
259 bits<8> vdst;
267 class VOP2_SDWAe <bits<6> op> : VOP_SDWAe {
268 bits<8> vdst;
269 bits<8> src1;
278 class VOPC_SDWAe <bits<8> op> : VOP_SDWAe {
279 bits<8> src1;
295 class VINTRPe_vi <bits<2> op> : VINTRPe <op> {