851   auto &RegClasses = RegBank.getRegClasses();  in computeSubClasses()  local
854   for (auto I = RegClasses.rbegin(), E = RegClasses.rend(); I != E; ++I) {  in computeSubClasses()
856     RC.SubClasses.resize(RegClasses.size());  in computeSubClasses()
860     for (auto I2 = I.base(), E2 = RegClasses.end(); I2 != E2; ++I2) {  in computeSubClasses()
877   for (auto &RC : RegClasses) {  in computeSubClasses()
879     auto I = RegClasses.begin();  in computeSubClasses()
893   for (auto &RC : RegClasses)  in computeSubClasses()
996     RegClasses.emplace_back(*this, RC);  in CodeGenRegBank()
997     addToMaps(&RegClasses.back());  in CodeGenRegBank()
1004   RegClasses.sort(TopoOrderRC);  in CodeGenRegBank()
1006   for (auto &RC : RegClasses)  in CodeGenRegBank()
1058   RegClasses.emplace_back(*this, Name, K);  in getOrCreateSubClass()
1059   addToMaps(&RegClasses.back());  in getOrCreateSubClass()
1060   return &RegClasses.back();  in getOrCreateSubClass()
1274   for (auto &RegClass : RegClasses) {  in computeSubRegLaneMasks()
1614   auto &RegClasses = getRegClasses();  in computeRegUnitSets()  local
1615   for (auto &RC : RegClasses) {  in computeRegUnitSets()
1718   RegClassUnitSets.resize(RegClasses.size());  in computeRegUnitSets()
1720   for (auto &RC : RegClasses) {  in computeRegUnitSets()
1833   for (CodeGenRegisterClass &RC : RegClasses) {  in computeDerivedInfo()
1868   assert(!RegClasses.empty());  in inferCommonSubClass()
1871   for (auto I = RegClasses.begin(), E = std::prev(RegClasses.end());  in inferCommonSubClass()
1980     assert(!RegClasses.empty());  in inferMatchingSuperRegClass()
1981     for (auto I = FirstSubRegRC, E = std::prev(RegClasses.end());  in inferMatchingSuperRegClass()
2017   assert(!RegClasses.empty());  in computeInferredRegisterClasses()
2024   auto FirstNewRC = std::prev(RegClasses.end());  in computeInferredRegisterClasses()
2028   for (auto I = RegClasses.begin(), E = RegClasses.end(); I != E; ++I) {  in computeInferredRegisterClasses()
2047       auto NextNewRC = std::prev(RegClasses.end());  in computeInferredRegisterClasses()
2048       for (auto I2 = RegClasses.begin(), E2 = std::next(FirstNewRC); I2 != E2;  in computeInferredRegisterClasses()