221     unsigned lane1_sz = nir_alu_type_get_type_size(ins->src_types[1]);  in pan_pack_add_fatan_table_f16()  local
223     if (lane1_sz == 16 && ins->swizzle[1][0] == 0) lane1_temp = 0;  in pan_pack_add_fatan_table_f16()
224     else if (lane1_sz == 16 && ins->swizzle[1][0] == 1) lane1_temp = 1;  in pan_pack_add_fatan_table_f16()
1034     unsigned lane1_sz = nir_alu_type_get_type_size(ins->src_types[1]);  in pan_pack_add_mkvec_v2i16()  local
1036     if (lane1_sz == 16 && ins->swizzle[1][0] == 0) lane1_temp = 0;  in pan_pack_add_mkvec_v2i16()
1037     else if (lane1_sz == 16 && ins->swizzle[1][0] == 1) lane1_temp = 1;  in pan_pack_add_mkvec_v2i16()
1067     unsigned lane1_sz = nir_alu_type_get_type_size(ins->src_types[1]);  in pan_pack_fma_shaddxl_u32()  local
1069     if (lane1_sz == 16 && ins->swizzle[1][0] == 0) lane1_temp = 0;  in pan_pack_fma_shaddxl_u32()
1070     else if (lane1_sz == 16 && ins->swizzle[1][0] == 1) lane1_temp = 1;  in pan_pack_fma_shaddxl_u32()
1071     else if (lane1_sz == 32) lane1_temp = 2;  in pan_pack_fma_shaddxl_u32()
2261     unsigned lane1_sz = nir_alu_type_get_type_size(ins->src_types[1]);  in pan_pack_fma_shaddxl_s32()  local
2263     if (lane1_sz == 16 && ins->swizzle[1][0] == 0) lane1_temp = 0;  in pan_pack_fma_shaddxl_s32()
2264     else if (lane1_sz == 16 && ins->swizzle[1][0] == 1) lane1_temp = 1;  in pan_pack_fma_shaddxl_s32()
2265     else if (lane1_sz == 32) lane1_temp = 2;  in pan_pack_fma_shaddxl_s32()
5619     unsigned lane1_sz = nir_alu_type_get_type_size(ins->src_types[1]);  in pan_pack_fma_mkvec_v4i8()  local
5621     if (lane1_sz == 8 && ins->swizzle[1][0] == 0) lane1_temp = 0;  in pan_pack_fma_mkvec_v4i8()
5622     else if (lane1_sz == 8 && ins->swizzle[1][0] == 2) lane1_temp = 1;  in pan_pack_fma_mkvec_v4i8()
5825     unsigned lane1_sz = nir_alu_type_get_type_size(ins->src_types[1]);  in pan_pack_add_fpow_sc_det_f16()  local
5827     if (lane1_sz == 16 && ins->swizzle[1][0] == 0) lane1_temp = 0;  in pan_pack_add_fpow_sc_det_f16()
5828     else if (lane1_sz == 16 && ins->swizzle[1][0] == 1) lane1_temp = 1;  in pan_pack_add_fpow_sc_det_f16()
5829     else if (lane1_sz == 32) lane1_temp = 2;  in pan_pack_add_fpow_sc_det_f16()
6060     unsigned lane1_sz = nir_alu_type_get_type_size(ins->src_types[1]);  in pan_pack_fma_mkvec_v2i16()  local
6062     if (lane1_sz == 16 && ins->swizzle[1][0] == 0) lane1_temp = 0;  in pan_pack_fma_mkvec_v2i16()
6063     else if (lane1_sz == 16 && ins->swizzle[1][0] == 1) lane1_temp = 1;  in pan_pack_fma_mkvec_v2i16()
7597     unsigned lane1_sz = nir_alu_type_get_type_size(ins->src_types[1]);  in pan_pack_add_fatan_assist_f16()  local
7599     if (lane1_sz == 16 && ins->swizzle[1][0] == 0) lane1_temp = 0;  in pan_pack_add_fatan_assist_f16()
7600     else if (lane1_sz == 16 && ins->swizzle[1][0] == 1) lane1_temp = 1;  in pan_pack_add_fatan_assist_f16()