Lines Matching refs:lanes1
78 unsigned lanes1 = lanes1_temp; in pan_pack_add_iadd_u32() local
79 assert(lanes1 < 8); in pan_pack_add_iadd_u32()
81 if (lanes1 == 0) { in pan_pack_add_iadd_u32()
83 if ((saturate == 0) && (lanes1 == 0)) derived_7 = 0; in pan_pack_add_iadd_u32()
84 else if ((saturate == 1) || (lanes1 != 0)) derived_7 = 1; in pan_pack_add_iadd_u32()
88 } else if ((lanes1 == 1) || (lanes1 == 2)) { in pan_pack_add_iadd_u32()
90 if ((saturate == 0) && (lanes1 == 0)) derived_7 = 0; in pan_pack_add_iadd_u32()
91 else if ((saturate == 1) || (lanes1 != 0)) derived_7 = 1; in pan_pack_add_iadd_u32()
95 if (lanes1 == 1) derived_9 = 0; in pan_pack_add_iadd_u32()
96 else if (lanes1 == 2) derived_9 = 1; in pan_pack_add_iadd_u32()
100 } else if ((lanes1 == 3) || (lanes1 == 4) || (lanes1 == 5) || (lanes1 == 6)) { in pan_pack_add_iadd_u32()
102 if ((saturate == 0) && (lanes1 == 0)) derived_7 = 0; in pan_pack_add_iadd_u32()
103 else if ((saturate == 1) || (lanes1 != 0)) derived_7 = 1; in pan_pack_add_iadd_u32()
107 if (lanes1 == 3) derived_9 = 0; in pan_pack_add_iadd_u32()
108 else if (lanes1 == 4) derived_9 = 1; in pan_pack_add_iadd_u32()
109 else if (lanes1 == 5) derived_9 = 2; in pan_pack_add_iadd_u32()
110 else if (lanes1 == 6) derived_9 = 3; in pan_pack_add_iadd_u32()
506 unsigned lanes1 = lanes1_temp; in pan_pack_add_isub_v2u16() local
507 assert(lanes1 < 8); in pan_pack_add_isub_v2u16()
509 if (((lanes0 == 0) || (lanes0 == 1)) && ((lanes1 == 0) || (lanes1 == 1))) { in pan_pack_add_isub_v2u16()
511 if ((saturate == 0) && (lanes1 != 4) && (lanes1 != 5)) derived_7 = 0; in pan_pack_add_isub_v2u16()
512 else if ((saturate == 1) || (lanes1 == 4) || (lanes1 == 5)) derived_7 = 1; in pan_pack_add_isub_v2u16()
516 if (lanes1 == 0) derived_9 = 0; in pan_pack_add_isub_v2u16()
517 else if (lanes1 == 1) derived_9 = 1; in pan_pack_add_isub_v2u16()
526 } else if ((lanes0 == 0) && ((lanes1 == 2) || (lanes1 == 3))) { in pan_pack_add_isub_v2u16()
528 if ((saturate == 0) && (lanes1 != 4) && (lanes1 != 5)) derived_7 = 0; in pan_pack_add_isub_v2u16()
529 else if ((saturate == 1) || (lanes1 == 4) || (lanes1 == 5)) derived_7 = 1; in pan_pack_add_isub_v2u16()
533 if (lanes1 == 2) derived_9 = 0; in pan_pack_add_isub_v2u16()
534 else if (lanes1 == 3) derived_9 = 1; in pan_pack_add_isub_v2u16()
538 } else if ((lanes0 == 0) && ((lanes1 == 4) || (lanes1 == 5))) { in pan_pack_add_isub_v2u16()
540 if ((saturate == 0) && (lanes1 != 4) && (lanes1 != 5)) derived_7 = 0; in pan_pack_add_isub_v2u16()
541 else if ((saturate == 1) || (lanes1 == 4) || (lanes1 == 5)) derived_7 = 1; in pan_pack_add_isub_v2u16()
545 if (lanes1 == 4) derived_9 = 0; in pan_pack_add_isub_v2u16()
546 else if (lanes1 == 5) derived_9 = 1; in pan_pack_add_isub_v2u16()
1944 unsigned lanes1 = lanes1_temp; in pan_pack_add_iadd_s32() local
1945 assert(lanes1 < 8); in pan_pack_add_iadd_s32()
1947 if (lanes1 == 0) { in pan_pack_add_iadd_s32()
1949 } else if ((lanes1 == 1) || (lanes1 == 2)) { in pan_pack_add_iadd_s32()
1951 if (lanes1 == 1) derived_9 = 0; in pan_pack_add_iadd_s32()
1952 else if (lanes1 == 2) derived_9 = 1; in pan_pack_add_iadd_s32()
1956 } else if ((lanes1 == 3) || (lanes1 == 4) || (lanes1 == 5) || (lanes1 == 6)) { in pan_pack_add_iadd_s32()
1958 if (lanes1 == 3) derived_9 = 0; in pan_pack_add_iadd_s32()
1959 else if (lanes1 == 4) derived_9 = 1; in pan_pack_add_iadd_s32()
1960 else if (lanes1 == 5) derived_9 = 2; in pan_pack_add_iadd_s32()
1961 else if (lanes1 == 6) derived_9 = 3; in pan_pack_add_iadd_s32()
2081 unsigned lanes1 = lanes1_temp; in pan_pack_add_isub_v4u8() local
2082 assert(lanes1 < 8); in pan_pack_add_isub_v4u8()
2084 if ((lanes0 == 0) && (lanes1 == 0)) { in pan_pack_add_isub_v4u8()
2091 … } else if ((lanes0 == 0) && ((lanes1 == 1) || (lanes1 == 2) || (lanes1 == 3) || (lanes1 == 4))) { in pan_pack_add_isub_v4u8()
2098 if (lanes1 == 1) derived_9 = 0; in pan_pack_add_isub_v4u8()
2099 else if (lanes1 == 2) derived_9 = 1; in pan_pack_add_isub_v4u8()
2100 else if (lanes1 == 3) derived_9 = 2; in pan_pack_add_isub_v4u8()
2101 else if (lanes1 == 4) derived_9 = 3; in pan_pack_add_isub_v4u8()
2105 } else if ((lanes0 == 0) && ((lanes1 == 5) || (lanes1 == 6))) { in pan_pack_add_isub_v4u8()
2112 if (lanes1 == 5) derived_9 = 0; in pan_pack_add_isub_v4u8()
2113 else if (lanes1 == 6) derived_9 = 1; in pan_pack_add_isub_v4u8()
2794 unsigned lanes1 = lanes1_temp; in pan_pack_add_iadd_v4s8() local
2795 assert(lanes1 < 8); in pan_pack_add_iadd_v4s8()
2797 if ((lanes0 == 0) && (lanes1 == 0)) { in pan_pack_add_iadd_v4s8()
2799 … } else if ((lanes0 == 0) && ((lanes1 == 1) || (lanes1 == 2) || (lanes1 == 3) || (lanes1 == 4))) { in pan_pack_add_iadd_v4s8()
2801 if (lanes1 == 1) derived_9 = 0; in pan_pack_add_iadd_v4s8()
2802 else if (lanes1 == 2) derived_9 = 1; in pan_pack_add_iadd_v4s8()
2803 else if (lanes1 == 3) derived_9 = 2; in pan_pack_add_iadd_v4s8()
2804 else if (lanes1 == 4) derived_9 = 3; in pan_pack_add_iadd_v4s8()
2808 } else if ((lanes0 == 0) && ((lanes1 == 5) || (lanes1 == 6))) { in pan_pack_add_iadd_v4s8()
2810 if (lanes1 == 5) derived_9 = 0; in pan_pack_add_iadd_v4s8()
2811 else if (lanes1 == 6) derived_9 = 1; in pan_pack_add_iadd_v4s8()
3109 unsigned lanes1 = lanes1_temp; in pan_pack_add_iadd_v2u16() local
3110 assert(lanes1 < 8); in pan_pack_add_iadd_v2u16()
3112 if (((lanes0 == 0) || (lanes0 == 1)) && ((lanes1 == 0) || (lanes1 == 1))) { in pan_pack_add_iadd_v2u16()
3114 if ((saturate == 0) && (lanes1 != 4) && (lanes1 != 5)) derived_7 = 0; in pan_pack_add_iadd_v2u16()
3115 else if ((saturate == 1) || (lanes1 == 4) || (lanes1 == 5)) derived_7 = 1; in pan_pack_add_iadd_v2u16()
3119 if (lanes1 == 0) derived_9 = 0; in pan_pack_add_iadd_v2u16()
3120 else if (lanes1 == 1) derived_9 = 1; in pan_pack_add_iadd_v2u16()
3129 } else if ((lanes0 == 0) && ((lanes1 == 2) || (lanes1 == 3))) { in pan_pack_add_iadd_v2u16()
3131 if ((saturate == 0) && (lanes1 != 4) && (lanes1 != 5)) derived_7 = 0; in pan_pack_add_iadd_v2u16()
3132 else if ((saturate == 1) || (lanes1 == 4) || (lanes1 == 5)) derived_7 = 1; in pan_pack_add_iadd_v2u16()
3136 if (lanes1 == 2) derived_9 = 0; in pan_pack_add_iadd_v2u16()
3137 else if (lanes1 == 3) derived_9 = 1; in pan_pack_add_iadd_v2u16()
3141 } else if ((lanes0 == 0) && ((lanes1 == 4) || (lanes1 == 5))) { in pan_pack_add_iadd_v2u16()
3143 if ((saturate == 0) && (lanes1 != 4) && (lanes1 != 5)) derived_7 = 0; in pan_pack_add_iadd_v2u16()
3144 else if ((saturate == 1) || (lanes1 == 4) || (lanes1 == 5)) derived_7 = 1; in pan_pack_add_iadd_v2u16()
3148 if (lanes1 == 4) derived_9 = 0; in pan_pack_add_iadd_v2u16()
3149 else if (lanes1 == 5) derived_9 = 1; in pan_pack_add_iadd_v2u16()
3254 unsigned lanes1 = lanes1_temp; in pan_pack_add_isub_v2s16() local
3255 assert(lanes1 < 8); in pan_pack_add_isub_v2s16()
3257 if (((lanes0 == 0) || (lanes0 == 1)) && ((lanes1 == 0) || (lanes1 == 1))) { in pan_pack_add_isub_v2s16()
3259 if (lanes1 == 0) derived_9 = 0; in pan_pack_add_isub_v2s16()
3260 else if (lanes1 == 1) derived_9 = 1; in pan_pack_add_isub_v2s16()
3269 } else if ((lanes0 == 0) && ((lanes1 == 2) || (lanes1 == 3))) { in pan_pack_add_isub_v2s16()
3271 if (lanes1 == 2) derived_9 = 0; in pan_pack_add_isub_v2s16()
3272 else if (lanes1 == 3) derived_9 = 1; in pan_pack_add_isub_v2s16()
3276 } else if ((lanes0 == 0) && ((lanes1 == 4) || (lanes1 == 5))) { in pan_pack_add_isub_v2s16()
3278 if (lanes1 == 4) derived_9 = 0; in pan_pack_add_isub_v2s16()
3279 else if (lanes1 == 5) derived_9 = 1; in pan_pack_add_isub_v2s16()
3319 unsigned lanes1 = lanes1_temp; in pan_pack_add_isub_s32() local
3320 assert(lanes1 < 8); in pan_pack_add_isub_s32()
3322 if (lanes1 == 0) { in pan_pack_add_isub_s32()
3324 } else if ((lanes1 == 1) || (lanes1 == 2)) { in pan_pack_add_isub_s32()
3326 if (lanes1 == 1) derived_9 = 0; in pan_pack_add_isub_s32()
3327 else if (lanes1 == 2) derived_9 = 1; in pan_pack_add_isub_s32()
3331 } else if ((lanes1 == 3) || (lanes1 == 4) || (lanes1 == 5) || (lanes1 == 6)) { in pan_pack_add_isub_s32()
3333 if (lanes1 == 3) derived_9 = 0; in pan_pack_add_isub_s32()
3334 else if (lanes1 == 4) derived_9 = 1; in pan_pack_add_isub_s32()
3335 else if (lanes1 == 5) derived_9 = 2; in pan_pack_add_isub_s32()
3336 else if (lanes1 == 6) derived_9 = 3; in pan_pack_add_isub_s32()
5891 unsigned lanes1 = lanes1_temp; in pan_pack_add_iadd_v2s16() local
5892 assert(lanes1 < 8); in pan_pack_add_iadd_v2s16()
5894 if (((lanes0 == 0) || (lanes0 == 1)) && ((lanes1 == 0) || (lanes1 == 1))) { in pan_pack_add_iadd_v2s16()
5896 if (lanes1 == 0) derived_9 = 0; in pan_pack_add_iadd_v2s16()
5897 else if (lanes1 == 1) derived_9 = 1; in pan_pack_add_iadd_v2s16()
5906 } else if ((lanes0 == 0) && ((lanes1 == 2) || (lanes1 == 3))) { in pan_pack_add_iadd_v2s16()
5908 if (lanes1 == 2) derived_9 = 0; in pan_pack_add_iadd_v2s16()
5909 else if (lanes1 == 3) derived_9 = 1; in pan_pack_add_iadd_v2s16()
5913 } else if ((lanes0 == 0) && ((lanes1 == 4) || (lanes1 == 5))) { in pan_pack_add_iadd_v2s16()
5915 if (lanes1 == 4) derived_9 = 0; in pan_pack_add_iadd_v2s16()
5916 else if (lanes1 == 5) derived_9 = 1; in pan_pack_add_iadd_v2s16()
6481 unsigned lanes1 = lanes1_temp; in pan_pack_add_isub_u32() local
6482 assert(lanes1 < 8); in pan_pack_add_isub_u32()
6484 if (lanes1 == 0) { in pan_pack_add_isub_u32()
6486 if ((saturate == 0) && (lanes1 == 0)) derived_7 = 0; in pan_pack_add_isub_u32()
6487 else if ((saturate == 1) || (lanes1 != 0)) derived_7 = 1; in pan_pack_add_isub_u32()
6491 } else if ((lanes1 == 1) || (lanes1 == 2)) { in pan_pack_add_isub_u32()
6493 if ((saturate == 0) && (lanes1 == 0)) derived_7 = 0; in pan_pack_add_isub_u32()
6494 else if ((saturate == 1) || (lanes1 != 0)) derived_7 = 1; in pan_pack_add_isub_u32()
6498 if (lanes1 == 1) derived_9 = 0; in pan_pack_add_isub_u32()
6499 else if (lanes1 == 2) derived_9 = 1; in pan_pack_add_isub_u32()
6503 } else if ((lanes1 == 3) || (lanes1 == 4) || (lanes1 == 5) || (lanes1 == 6)) { in pan_pack_add_isub_u32()
6505 if ((saturate == 0) && (lanes1 == 0)) derived_7 = 0; in pan_pack_add_isub_u32()
6506 else if ((saturate == 1) || (lanes1 != 0)) derived_7 = 1; in pan_pack_add_isub_u32()
6510 if (lanes1 == 3) derived_9 = 0; in pan_pack_add_isub_u32()
6511 else if (lanes1 == 4) derived_9 = 1; in pan_pack_add_isub_u32()
6512 else if (lanes1 == 5) derived_9 = 2; in pan_pack_add_isub_u32()
6513 else if (lanes1 == 6) derived_9 = 3; in pan_pack_add_isub_u32()
7271 unsigned lanes1 = lanes1_temp; in pan_pack_add_isub_v4s8() local
7272 assert(lanes1 < 8); in pan_pack_add_isub_v4s8()
7274 if ((lanes0 == 0) && (lanes1 == 0)) { in pan_pack_add_isub_v4s8()
7276 … } else if ((lanes0 == 0) && ((lanes1 == 1) || (lanes1 == 2) || (lanes1 == 3) || (lanes1 == 4))) { in pan_pack_add_isub_v4s8()
7278 if (lanes1 == 1) derived_9 = 0; in pan_pack_add_isub_v4s8()
7279 else if (lanes1 == 2) derived_9 = 1; in pan_pack_add_isub_v4s8()
7280 else if (lanes1 == 3) derived_9 = 2; in pan_pack_add_isub_v4s8()
7281 else if (lanes1 == 4) derived_9 = 3; in pan_pack_add_isub_v4s8()
7285 } else if ((lanes0 == 0) && ((lanes1 == 5) || (lanes1 == 6))) { in pan_pack_add_isub_v4s8()
7287 if (lanes1 == 5) derived_9 = 0; in pan_pack_add_isub_v4s8()
7288 else if (lanes1 == 6) derived_9 = 1; in pan_pack_add_isub_v4s8()
7675 unsigned lanes1 = lanes1_temp; in pan_pack_add_iadd_v4u8() local
7676 assert(lanes1 < 8); in pan_pack_add_iadd_v4u8()
7678 if ((lanes0 == 0) && (lanes1 == 0)) { in pan_pack_add_iadd_v4u8()
7685 … } else if ((lanes0 == 0) && ((lanes1 == 1) || (lanes1 == 2) || (lanes1 == 3) || (lanes1 == 4))) { in pan_pack_add_iadd_v4u8()
7692 if (lanes1 == 1) derived_9 = 0; in pan_pack_add_iadd_v4u8()
7693 else if (lanes1 == 2) derived_9 = 1; in pan_pack_add_iadd_v4u8()
7694 else if (lanes1 == 3) derived_9 = 2; in pan_pack_add_iadd_v4u8()
7695 else if (lanes1 == 4) derived_9 = 3; in pan_pack_add_iadd_v4u8()
7699 } else if ((lanes0 == 0) && ((lanes1 == 5) || (lanes1 == 6))) { in pan_pack_add_iadd_v4u8()
7706 if (lanes1 == 5) derived_9 = 0; in pan_pack_add_iadd_v4u8()
7707 else if (lanes1 == 6) derived_9 = 1; in pan_pack_add_iadd_v4u8()