295     unsigned lanes2_temp = 0;  in pan_pack_fma_lshift_xor_v4i8()  local
296 … && ins->swizzle[2][1] == 1 && ins->swizzle[2][2] == 2 && ins->swizzle[2][3] == 3) lanes2_temp = 0;  in pan_pack_fma_lshift_xor_v4i8()
297 … && ins->swizzle[2][1] == 0 && ins->swizzle[2][2] == 0 && ins->swizzle[2][3] == 0) lanes2_temp = 1;  in pan_pack_fma_lshift_xor_v4i8()
298 … && ins->swizzle[2][1] == 1 && ins->swizzle[2][2] == 1 && ins->swizzle[2][3] == 1) lanes2_temp = 2;  in pan_pack_fma_lshift_xor_v4i8()
299 … && ins->swizzle[2][1] == 2 && ins->swizzle[2][2] == 2 && ins->swizzle[2][3] == 2) lanes2_temp = 3;  in pan_pack_fma_lshift_xor_v4i8()
300 … && ins->swizzle[2][1] == 3 && ins->swizzle[2][2] == 3 && ins->swizzle[2][3] == 3) lanes2_temp = 4;  in pan_pack_fma_lshift_xor_v4i8()
302     unsigned lanes2 = lanes2_temp;  in pan_pack_fma_lshift_xor_v4i8()
427     unsigned lanes2_temp = 0;  in pan_pack_fma_arshift_v4i8()  local
428 … && ins->swizzle[2][1] == 1 && ins->swizzle[2][2] == 2 && ins->swizzle[2][3] == 3) lanes2_temp = 0;  in pan_pack_fma_arshift_v4i8()
429 … && ins->swizzle[2][1] == 0 && ins->swizzle[2][2] == 0 && ins->swizzle[2][3] == 0) lanes2_temp = 1;  in pan_pack_fma_arshift_v4i8()
430 … && ins->swizzle[2][1] == 1 && ins->swizzle[2][2] == 1 && ins->swizzle[2][3] == 1) lanes2_temp = 2;  in pan_pack_fma_arshift_v4i8()
431 … && ins->swizzle[2][1] == 2 && ins->swizzle[2][2] == 2 && ins->swizzle[2][3] == 2) lanes2_temp = 3;  in pan_pack_fma_arshift_v4i8()
432 … && ins->swizzle[2][1] == 3 && ins->swizzle[2][2] == 3 && ins->swizzle[2][3] == 3) lanes2_temp = 4;  in pan_pack_fma_arshift_v4i8()
434     unsigned lanes2 = lanes2_temp;  in pan_pack_fma_arshift_v4i8()
958     unsigned lanes2_temp = 0;  in pan_pack_fma_rshift_or_v4i8()  local
959 … && ins->swizzle[2][1] == 1 && ins->swizzle[2][2] == 2 && ins->swizzle[2][3] == 3) lanes2_temp = 0;  in pan_pack_fma_rshift_or_v4i8()
960 … && ins->swizzle[2][1] == 0 && ins->swizzle[2][2] == 0 && ins->swizzle[2][3] == 0) lanes2_temp = 1;  in pan_pack_fma_rshift_or_v4i8()
961 … && ins->swizzle[2][1] == 1 && ins->swizzle[2][2] == 1 && ins->swizzle[2][3] == 1) lanes2_temp = 2;  in pan_pack_fma_rshift_or_v4i8()
962 … && ins->swizzle[2][1] == 2 && ins->swizzle[2][2] == 2 && ins->swizzle[2][3] == 2) lanes2_temp = 3;  in pan_pack_fma_rshift_or_v4i8()
963 … && ins->swizzle[2][1] == 3 && ins->swizzle[2][2] == 3 && ins->swizzle[2][3] == 3) lanes2_temp = 4;  in pan_pack_fma_rshift_or_v4i8()
965     unsigned lanes2 = lanes2_temp;  in pan_pack_fma_rshift_or_v4i8()
1158     unsigned lanes2_temp = 0;  in pan_pack_fma_lshift_or_v4i8()  local
1159 … && ins->swizzle[2][1] == 1 && ins->swizzle[2][2] == 2 && ins->swizzle[2][3] == 3) lanes2_temp = 0;  in pan_pack_fma_lshift_or_v4i8()
1160 … && ins->swizzle[2][1] == 0 && ins->swizzle[2][2] == 0 && ins->swizzle[2][3] == 0) lanes2_temp = 1;  in pan_pack_fma_lshift_or_v4i8()
1161 … && ins->swizzle[2][1] == 1 && ins->swizzle[2][2] == 1 && ins->swizzle[2][3] == 1) lanes2_temp = 2;  in pan_pack_fma_lshift_or_v4i8()
1162 … && ins->swizzle[2][1] == 2 && ins->swizzle[2][2] == 2 && ins->swizzle[2][3] == 2) lanes2_temp = 3;  in pan_pack_fma_lshift_or_v4i8()
1163 … && ins->swizzle[2][1] == 3 && ins->swizzle[2][2] == 3 && ins->swizzle[2][3] == 3) lanes2_temp = 4;  in pan_pack_fma_lshift_or_v4i8()
1165     unsigned lanes2 = lanes2_temp;  in pan_pack_fma_lshift_or_v4i8()
1562     unsigned lanes2_temp = 0;  in pan_pack_fma_lshift_and_v4i8()  local
1563 … && ins->swizzle[2][1] == 1 && ins->swizzle[2][2] == 2 && ins->swizzle[2][3] == 3) lanes2_temp = 0;  in pan_pack_fma_lshift_and_v4i8()
1564 … && ins->swizzle[2][1] == 0 && ins->swizzle[2][2] == 0 && ins->swizzle[2][3] == 0) lanes2_temp = 1;  in pan_pack_fma_lshift_and_v4i8()
1565 … && ins->swizzle[2][1] == 1 && ins->swizzle[2][2] == 1 && ins->swizzle[2][3] == 1) lanes2_temp = 2;  in pan_pack_fma_lshift_and_v4i8()
1566 … && ins->swizzle[2][1] == 2 && ins->swizzle[2][2] == 2 && ins->swizzle[2][3] == 2) lanes2_temp = 3;  in pan_pack_fma_lshift_and_v4i8()
1567 … && ins->swizzle[2][1] == 3 && ins->swizzle[2][2] == 3 && ins->swizzle[2][3] == 3) lanes2_temp = 4;  in pan_pack_fma_lshift_and_v4i8()
1569     unsigned lanes2 = lanes2_temp;  in pan_pack_fma_lshift_and_v4i8()
1980     unsigned lanes2_temp = 0;  in pan_pack_fma_rshift_xor_v2i16()  local
1981     if (lanes2_sz == 8 && ins->swizzle[2][0] == 0 && ins->swizzle[2][1] == 0) lanes2_temp = 0;  in pan_pack_fma_rshift_xor_v2i16()
1982     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 1 && ins->swizzle[2][1] == 1) lanes2_temp = 1;  in pan_pack_fma_rshift_xor_v2i16()
1983     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 2 && ins->swizzle[2][1] == 2) lanes2_temp = 2;  in pan_pack_fma_rshift_xor_v2i16()
1984     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 3 && ins->swizzle[2][1] == 3) lanes2_temp = 3;  in pan_pack_fma_rshift_xor_v2i16()
1985     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 0 && ins->swizzle[2][1] == 1) lanes2_temp = 4;  in pan_pack_fma_rshift_xor_v2i16()
1986     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 2 && ins->swizzle[2][1] == 3) lanes2_temp = 5;  in pan_pack_fma_rshift_xor_v2i16()
1987     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 0 && ins->swizzle[2][1] == 2) lanes2_temp = 6;  in pan_pack_fma_rshift_xor_v2i16()
1989     unsigned lanes2 = lanes2_temp;  in pan_pack_fma_rshift_xor_v2i16()
2213     unsigned lanes2_temp = 0;  in pan_pack_fma_rshift_or_v2i16()  local
2214     if (lanes2_sz == 8 && ins->swizzle[2][0] == 0 && ins->swizzle[2][1] == 0) lanes2_temp = 0;  in pan_pack_fma_rshift_or_v2i16()
2215     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 1 && ins->swizzle[2][1] == 1) lanes2_temp = 1;  in pan_pack_fma_rshift_or_v2i16()
2216     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 2 && ins->swizzle[2][1] == 2) lanes2_temp = 2;  in pan_pack_fma_rshift_or_v2i16()
2217     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 3 && ins->swizzle[2][1] == 3) lanes2_temp = 3;  in pan_pack_fma_rshift_or_v2i16()
2218     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 0 && ins->swizzle[2][1] == 1) lanes2_temp = 4;  in pan_pack_fma_rshift_or_v2i16()
2219     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 2 && ins->swizzle[2][1] == 3) lanes2_temp = 5;  in pan_pack_fma_rshift_or_v2i16()
2220     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 0 && ins->swizzle[2][1] == 2) lanes2_temp = 6;  in pan_pack_fma_rshift_or_v2i16()
2222     unsigned lanes2 = lanes2_temp;  in pan_pack_fma_rshift_or_v2i16()
3399     unsigned lanes2_temp = 0;  in pan_pack_fma_rshift_xor_v4i8()  local
3400 … && ins->swizzle[2][1] == 1 && ins->swizzle[2][2] == 2 && ins->swizzle[2][3] == 3) lanes2_temp = 0;  in pan_pack_fma_rshift_xor_v4i8()
3401 … && ins->swizzle[2][1] == 0 && ins->swizzle[2][2] == 0 && ins->swizzle[2][3] == 0) lanes2_temp = 1;  in pan_pack_fma_rshift_xor_v4i8()
3402 … && ins->swizzle[2][1] == 1 && ins->swizzle[2][2] == 1 && ins->swizzle[2][3] == 1) lanes2_temp = 2;  in pan_pack_fma_rshift_xor_v4i8()
3403 … && ins->swizzle[2][1] == 2 && ins->swizzle[2][2] == 2 && ins->swizzle[2][3] == 2) lanes2_temp = 3;  in pan_pack_fma_rshift_xor_v4i8()
3404 … && ins->swizzle[2][1] == 3 && ins->swizzle[2][2] == 3 && ins->swizzle[2][3] == 3) lanes2_temp = 4;  in pan_pack_fma_rshift_xor_v4i8()
3406     unsigned lanes2 = lanes2_temp;  in pan_pack_fma_rshift_xor_v4i8()
3846     unsigned lanes2_temp = 0;  in pan_pack_fma_arshift_v2i16()  local
3847     if (lanes2_sz == 8 && ins->swizzle[2][0] == 0 && ins->swizzle[2][1] == 0) lanes2_temp = 0;  in pan_pack_fma_arshift_v2i16()
3848     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 1 && ins->swizzle[2][1] == 1) lanes2_temp = 1;  in pan_pack_fma_arshift_v2i16()
3849     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 2 && ins->swizzle[2][1] == 2) lanes2_temp = 2;  in pan_pack_fma_arshift_v2i16()
3850     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 3 && ins->swizzle[2][1] == 3) lanes2_temp = 3;  in pan_pack_fma_arshift_v2i16()
3851     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 0 && ins->swizzle[2][1] == 1) lanes2_temp = 4;  in pan_pack_fma_arshift_v2i16()
3852     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 2 && ins->swizzle[2][1] == 3) lanes2_temp = 5;  in pan_pack_fma_arshift_v2i16()
3853     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 0 && ins->swizzle[2][1] == 2) lanes2_temp = 6;  in pan_pack_fma_arshift_v2i16()
3855     unsigned lanes2 = lanes2_temp;  in pan_pack_fma_arshift_v2i16()
5204     unsigned lanes2_temp = 0;  in pan_pack_fma_lshift_and_v2i16()  local
5205     if (lanes2_sz == 8 && ins->swizzle[2][0] == 0 && ins->swizzle[2][1] == 0) lanes2_temp = 0;  in pan_pack_fma_lshift_and_v2i16()
5206     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 1 && ins->swizzle[2][1] == 1) lanes2_temp = 1;  in pan_pack_fma_lshift_and_v2i16()
5207     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 2 && ins->swizzle[2][1] == 2) lanes2_temp = 2;  in pan_pack_fma_lshift_and_v2i16()
5208     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 3 && ins->swizzle[2][1] == 3) lanes2_temp = 3;  in pan_pack_fma_lshift_and_v2i16()
5209     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 0 && ins->swizzle[2][1] == 1) lanes2_temp = 4;  in pan_pack_fma_lshift_and_v2i16()
5210     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 2 && ins->swizzle[2][1] == 3) lanes2_temp = 5;  in pan_pack_fma_lshift_and_v2i16()
5211     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 0 && ins->swizzle[2][1] == 2) lanes2_temp = 6;  in pan_pack_fma_lshift_and_v2i16()
5213     unsigned lanes2 = lanes2_temp;  in pan_pack_fma_lshift_and_v2i16()
5775     unsigned lanes2_temp = 0;  in pan_pack_fma_rshift_and_v2i16()  local
5776     if (lanes2_sz == 8 && ins->swizzle[2][0] == 0 && ins->swizzle[2][1] == 0) lanes2_temp = 0;  in pan_pack_fma_rshift_and_v2i16()
5777     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 1 && ins->swizzle[2][1] == 1) lanes2_temp = 1;  in pan_pack_fma_rshift_and_v2i16()
5778     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 2 && ins->swizzle[2][1] == 2) lanes2_temp = 2;  in pan_pack_fma_rshift_and_v2i16()
5779     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 3 && ins->swizzle[2][1] == 3) lanes2_temp = 3;  in pan_pack_fma_rshift_and_v2i16()
5780     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 0 && ins->swizzle[2][1] == 1) lanes2_temp = 4;  in pan_pack_fma_rshift_and_v2i16()
5781     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 2 && ins->swizzle[2][1] == 3) lanes2_temp = 5;  in pan_pack_fma_rshift_and_v2i16()
5782     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 0 && ins->swizzle[2][1] == 2) lanes2_temp = 6;  in pan_pack_fma_rshift_and_v2i16()
5784     unsigned lanes2 = lanes2_temp;  in pan_pack_fma_rshift_and_v2i16()
6350     unsigned lanes2_temp = 0;  in pan_pack_fma_rshift_and_v4i8()  local
6351 … && ins->swizzle[2][1] == 1 && ins->swizzle[2][2] == 2 && ins->swizzle[2][3] == 3) lanes2_temp = 0;  in pan_pack_fma_rshift_and_v4i8()
6352 … && ins->swizzle[2][1] == 0 && ins->swizzle[2][2] == 0 && ins->swizzle[2][3] == 0) lanes2_temp = 1;  in pan_pack_fma_rshift_and_v4i8()
6353 … && ins->swizzle[2][1] == 1 && ins->swizzle[2][2] == 1 && ins->swizzle[2][3] == 1) lanes2_temp = 2;  in pan_pack_fma_rshift_and_v4i8()
6354 … && ins->swizzle[2][1] == 2 && ins->swizzle[2][2] == 2 && ins->swizzle[2][3] == 2) lanes2_temp = 3;  in pan_pack_fma_rshift_and_v4i8()
6355 … && ins->swizzle[2][1] == 3 && ins->swizzle[2][2] == 3 && ins->swizzle[2][3] == 3) lanes2_temp = 4;  in pan_pack_fma_rshift_and_v4i8()
6357     unsigned lanes2 = lanes2_temp;  in pan_pack_fma_rshift_and_v4i8()
7078     unsigned lanes2_temp = 0;  in pan_pack_fma_lshift_xor_v2i16()  local
7079     if (lanes2_sz == 8 && ins->swizzle[2][0] == 0 && ins->swizzle[2][1] == 0) lanes2_temp = 0;  in pan_pack_fma_lshift_xor_v2i16()
7080     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 1 && ins->swizzle[2][1] == 1) lanes2_temp = 1;  in pan_pack_fma_lshift_xor_v2i16()
7081     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 2 && ins->swizzle[2][1] == 2) lanes2_temp = 2;  in pan_pack_fma_lshift_xor_v2i16()
7082     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 3 && ins->swizzle[2][1] == 3) lanes2_temp = 3;  in pan_pack_fma_lshift_xor_v2i16()
7083     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 0 && ins->swizzle[2][1] == 1) lanes2_temp = 4;  in pan_pack_fma_lshift_xor_v2i16()
7084     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 2 && ins->swizzle[2][1] == 3) lanes2_temp = 5;  in pan_pack_fma_lshift_xor_v2i16()
7085     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 0 && ins->swizzle[2][1] == 2) lanes2_temp = 6;  in pan_pack_fma_lshift_xor_v2i16()
7087     unsigned lanes2 = lanes2_temp;  in pan_pack_fma_lshift_xor_v2i16()
7167     unsigned lanes2_temp = 0;  in pan_pack_fma_lshift_or_v2i16()  local
7168     if (lanes2_sz == 8 && ins->swizzle[2][0] == 0 && ins->swizzle[2][1] == 0) lanes2_temp = 0;  in pan_pack_fma_lshift_or_v2i16()
7169     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 1 && ins->swizzle[2][1] == 1) lanes2_temp = 1;  in pan_pack_fma_lshift_or_v2i16()
7170     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 2 && ins->swizzle[2][1] == 2) lanes2_temp = 2;  in pan_pack_fma_lshift_or_v2i16()
7171     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 3 && ins->swizzle[2][1] == 3) lanes2_temp = 3;  in pan_pack_fma_lshift_or_v2i16()
7172     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 0 && ins->swizzle[2][1] == 1) lanes2_temp = 4;  in pan_pack_fma_lshift_or_v2i16()
7173     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 2 && ins->swizzle[2][1] == 3) lanes2_temp = 5;  in pan_pack_fma_lshift_or_v2i16()
7174     else if (lanes2_sz == 8 && ins->swizzle[2][0] == 0 && ins->swizzle[2][1] == 2) lanes2_temp = 6;  in pan_pack_fma_lshift_or_v2i16()
7176     unsigned lanes2 = lanes2_temp;  in pan_pack_fma_lshift_or_v2i16()