Lines Matching refs:rad_info
248 4 * device->physical_device->rad_info.num_good_compute_units * in radv_pipeline_init_scratch()
795 if (pipeline->device->physical_device->rad_info.has_rbplus) { in radv_pipeline_init_blend_state()
1092 unsigned num_tile_pipes = pipeline->device->physical_device->rad_info.num_tile_pipes; in radv_pipeline_init_multisample_state()
1168 …_0 = S_028A48_ALTERNATE_RBS_PER_TILE(pipeline->device->physical_device->rad_info.chip_class >= GFX… in radv_pipeline_init_multisample_state()
1203 …S_028BE0_COVERED_CENTROID_IS_CENTER(pipeline->device->physical_device->rad_info.chip_class >= GFX1… in radv_pipeline_init_multisample_state()
1400 if (radv_pipeline_has_gs(pipeline) && device->physical_device->rad_info.chip_class <= GFX8) in radv_compute_ia_multi_vgt_param_helpers()
1420 if ((device->physical_device->rad_info.family == CHIP_TAHITI || in radv_compute_ia_multi_vgt_param_helpers()
1421 device->physical_device->rad_info.family == CHIP_PITCAIRN || in radv_compute_ia_multi_vgt_param_helpers()
1422 device->physical_device->rad_info.family == CHIP_BONAIRE) && in radv_compute_ia_multi_vgt_param_helpers()
1426 if (device->physical_device->rad_info.has_distributed_tess) { in radv_compute_ia_multi_vgt_param_helpers()
1428 if (device->physical_device->rad_info.chip_class <= GFX8) in radv_compute_ia_multi_vgt_param_helpers()
1446 if (device->physical_device->rad_info.family == CHIP_TONGA || in radv_compute_ia_multi_vgt_param_helpers()
1447 device->physical_device->rad_info.family == CHIP_FIJI || in radv_compute_ia_multi_vgt_param_helpers()
1448 device->physical_device->rad_info.family == CHIP_POLARIS10 || in radv_compute_ia_multi_vgt_param_helpers()
1449 device->physical_device->rad_info.family == CHIP_POLARIS11 || in radv_compute_ia_multi_vgt_param_helpers()
1450 device->physical_device->rad_info.family == CHIP_POLARIS12 || in radv_compute_ia_multi_vgt_param_helpers()
1451 device->physical_device->rad_info.family == CHIP_VEGAM) { in radv_compute_ia_multi_vgt_param_helpers()
1459 S_028AA8_MAX_PRIMGRP_IN_WAVE(device->physical_device->rad_info.chip_class == GFX8 ? 2 : 0) | in radv_compute_ia_multi_vgt_param_helpers()
1460 S_030960_EN_INST_OPT_BASIC(device->physical_device->rad_info.chip_class >= GFX9) | in radv_compute_ia_multi_vgt_param_helpers()
1461 S_030960_EN_INST_OPT_ADV(device->physical_device->rad_info.chip_class >= GFX9); in radv_compute_ia_multi_vgt_param_helpers()
1737 if (pipeline->device->physical_device->rad_info.chip_class >= GFX10) { in radv_pipeline_init_raster_state()
1788 if (pipeline->device->physical_device->rad_info.chip_class >= GFX9) in gfx9_get_gs_info()
1974 …const unsigned min_esverts = pipeline->device->physical_device->rad_info.chip_class >= GFX10_3 ? 2… in gfx10_get_ngg_info()
2160 unsigned num_se = device->physical_device->rad_info.max_se; in radv_pipeline_init_gs_ring_state()
2167 (device->physical_device->rad_info.chip_class >= GFX8 ? 32 : 16) * num_se; in radv_pipeline_init_gs_ring_state()
2186 if (pipeline->device->physical_device->rad_info.chip_class <= GFX8) in radv_pipeline_init_gs_ring_state()
2328 pipeline->device->physical_device->rad_info.chip_class); in radv_link_shaders()
2336 pipeline->device->physical_device->rad_info.chip_class); in radv_link_shaders()
2362 if (pipeline->device->physical_device->rad_info.chip_class >= GFX9) { in radv_set_driver_locations()
2516 if (pipeline->device->physical_device->rad_info.chip_class <= GFX8 && in radv_generate_graphics_pipeline_key()
2517 pipeline->device->physical_device->rad_info.family != CHIP_STONEY) { in radv_generate_graphics_pipeline_key()
2575 if (pipeline->device->physical_device->rad_info.chip_class < GFX8) { in radv_generate_graphics_pipeline_key()
2580 if (pipeline->device->physical_device->rad_info.chip_class >= GFX10) in radv_generate_graphics_pipeline_key()
2788 if (pipeline->device->physical_device->rad_info.chip_class >= GFX9 && in radv_fill_shader_info()
2809 if (pipeline->device->physical_device->rad_info.chip_class >= GFX9 && in radv_fill_shader_info()
2979 enum chip_class chip = device->physical_device->rad_info.chip_class; in lower_bit_size_callback()
3243 if (device->physical_device->rad_info.chip_class >= GFX8) { in radv_create_shaders()
3254 if (device->physical_device->rad_info.chip_class >= GFX8) in radv_create_shaders()
3354 if (device->physical_device->rad_info.chip_class >= GFX9 && modules[MESA_SHADER_TESS_CTRL]) { in radv_create_shaders()
3375 if (device->physical_device->rad_info.chip_class >= GFX9 && modules[MESA_SHADER_GEOMETRY]) { in radv_create_shaders()
3716 util_logbase2_ceil(pipeline->device->physical_device->rad_info.num_render_backends / in radv_gfx9_compute_bin_size()
3717 pipeline->device->physical_device->rad_info.max_se); in radv_gfx9_compute_bin_size()
3718 unsigned log_num_se = util_logbase2_ceil(pipeline->device->physical_device->rad_info.max_se); in radv_gfx9_compute_bin_size()
3784 const unsigned rb_count = pipeline->device->physical_device->rad_info.num_render_backends; in radv_gfx10_compute_bin_size()
3785 …const unsigned pipe_count = MAX2(rb_count, pipeline->device->physical_device->rad_info.num_sdp_int… in radv_gfx10_compute_bin_size()
3871 if (pipeline->device->physical_device->rad_info.chip_class >= GFX10) { in radv_pipeline_init_disabled_binning_state()
3910 if (pdev->rad_info.has_dedicated_vram) { in radv_get_binning_settings()
3911 if (pdev->rad_info.num_render_backends > 4) { in radv_get_binning_settings()
3927 if (pdev->rad_info.has_gfx9_scissor_bug) in radv_get_binning_settings()
3938 if (pipeline->device->physical_device->rad_info.chip_class < GFX9) in radv_pipeline_init_binning_state()
3942 if (pipeline->device->physical_device->rad_info.chip_class >= GFX10) { in radv_pipeline_init_binning_state()
3944 } else if (pipeline->device->physical_device->rad_info.chip_class == GFX9) { in radv_pipeline_init_binning_state()
4008 if (pipeline->device->physical_device->rad_info.chip_class >= GFX10_3) in radv_pipeline_generate_depth_stencil_state()
4057 if (pipeline->device->physical_device->rad_info.has_rbplus) { in radv_pipeline_generate_blend_state()
4144 bool exclusion = pipeline->device->physical_device->rad_info.chip_class >= GFX7; in radv_pipeline_generate_multisample_state()
4176 pipeline->device->physical_device->rad_info.chip_class); in radv_pipeline_generate_vgt_gs_mode()
4214 if (pipeline->device->physical_device->rad_info.chip_class >= GFX10) { in radv_pipeline_generate_hw_vs()
4240 …S_02881C_BYPASS_PRIM_RATE_COMBINER(pipeline->device->physical_device->rad_info.chip_class >= GFX10… in radv_pipeline_generate_hw_vs()
4241 …S_02881C_BYPASS_VTX_RATE_COMBINER(pipeline->device->physical_device->rad_info.chip_class >= GFX10_… in radv_pipeline_generate_hw_vs()
4245 if (pipeline->device->physical_device->rad_info.chip_class <= GFX8) in radv_pipeline_generate_hw_vs()
4278 if (pipeline->device->physical_device->rad_info.chip_class == GFX7 && in radv_pipeline_generate_hw_ls()
4279 pipeline->device->physical_device->rad_info.family != CHIP_HAWAII) in radv_pipeline_generate_hw_ls()
4356 …S_02881C_BYPASS_PRIM_RATE_COMBINER(pipeline->device->physical_device->rad_info.chip_class >= GFX10… in radv_pipeline_generate_hw_ngg()
4357 …S_02881C_BYPASS_VTX_RATE_COMBINER(pipeline->device->physical_device->rad_info.chip_class >= GFX10_… in radv_pipeline_generate_hw_ngg()
4398 …S_028838_VERTEX_REUSE_DEPTH(pipeline->device->physical_device->rad_info.chip_class >= GFX10_3 ? 30… in radv_pipeline_generate_hw_ngg()
4409 if (pipeline->device->physical_device->rad_info.chip_class == GFX10 && in radv_pipeline_generate_hw_ngg()
4429 if (pipeline->device->physical_device->rad_info.chip_class >= GFX9) { in radv_pipeline_generate_hw_hs()
4430 if (pipeline->device->physical_device->rad_info.chip_class >= GFX10) { in radv_pipeline_generate_hw_hs()
4495 if (pipeline->device->physical_device->rad_info.chip_class >= GFX10 && in radv_pipeline_generate_tess_shaders()
4522 if (pipeline->device->physical_device->rad_info.chip_class >= GFX7) { in radv_pipeline_generate_tess_state()
4573 if (pipeline->device->physical_device->rad_info.has_distributed_tess) { in radv_pipeline_generate_tess_state()
4574 if (pipeline->device->physical_device->rad_info.family == CHIP_FIJI || in radv_pipeline_generate_tess_state()
4575 pipeline->device->physical_device->rad_info.family >= CHIP_POLARIS10) in radv_pipeline_generate_tess_state()
4636 if (pipeline->device->physical_device->rad_info.chip_class >= GFX9) { in radv_pipeline_generate_hw_gs()
4637 if (pipeline->device->physical_device->rad_info.chip_class >= GFX10) { in radv_pipeline_generate_hw_gs()
4822 bool disable_rbplus = device->physical_device->rad_info.has_rbplus && in radv_compute_db_shader_control()
4823 !device->physical_device->rad_info.rbplus_allowed; in radv_compute_db_shader_control()
4894 if (pipeline->device->physical_device->rad_info.family < CHIP_POLARIS10 || in radv_pipeline_generate_vgt_vertex_reuse()
4895 pipeline->device->physical_device->rad_info.chip_class >= GFX10) in radv_pipeline_generate_vgt_vertex_reuse()
4940 if (pipeline->device->physical_device->rad_info.chip_class >= GFX9) in radv_pipeline_generate_vgt_shader_config()
4943 if (pipeline->device->physical_device->rad_info.chip_class >= GFX10) { in radv_pipeline_generate_vgt_shader_config()
5099 …if (pipeline->device->physical_device->rad_info.chip_class >= GFX10 && !radv_pipeline_has_ngg(pipe… in radv_pipeline_generate_pm4()
5149 device->physical_device->rad_info.chip_class); in radv_pipeline_init_shader_stages_state()
5229 if ((pipeline->device->physical_device->rad_info.chip_class <= GFX9 || in radv_pipeline_init()
5360 if (device->physical_device->rad_info.chip_class >= GFX10) { in radv_pipeline_generate_hw_cs()
5383 if (device->physical_device->rad_info.chip_class >= GFX10 && in radv_pipeline_generate_compute_state()
5388 ac_get_compute_resource_limits(&device->physical_device->rad_info, in radv_pipeline_generate_compute_state()
5405 cs->max_dw = device->physical_device->rad_info.chip_class >= GFX10 ? 19 : 16; in radv_compute_generate_pm4()
5485 …_stage_to_user_data_0(pipeline, MESA_SHADER_COMPUTE, device->physical_device->rad_info.chip_class); in radv_compute_pipeline_create()
5684 enum chip_class chip_class = device->physical_device->rad_info.chip_class; in radv_GetPipelineExecutableStatisticsKHR()