53 #define V3D_WRITE(reg, val) v3d_hw_write_reg(v3d.hw, reg, val)  macro
65         V3D_WRITE(V3D_GCA_CACHE_CTRL, gca_ctrl | V3D_GCA_CACHE_CTRL_FLUSH_SET);  in v3d_flush_l3()
66         V3D_WRITE(V3D_GCA_CACHE_CTRL, gca_ctrl & ~V3D_GCA_CACHE_CTRL_FLUSH_SET);  in v3d_flush_l3()
74         V3D_WRITE(V3D_CTL_0_L2CACTL,  in v3d_flush_l2()
83         V3D_WRITE(V3D_CTL_0_L2TFLSTA, 0);  in v3d_flush_l2t()
84         V3D_WRITE(V3D_CTL_0_L2TFLEND, ~0);  in v3d_flush_l2t()
85         V3D_WRITE(V3D_CTL_0_L2TCACTL,  in v3d_flush_l2t()
94         V3D_WRITE(V3D_CTL_0_SLCACTL, ~0);  in v3d_flush_slices()
141                 V3D_WRITE(V3D_CLE_0_CT0QMA, submit->qma);  in v3dX()
142                 V3D_WRITE(V3D_CLE_0_CT0QMS, submit->qms);  in v3dX()
146                 V3D_WRITE(V3D_CLE_0_CT0QTS,  in v3dX()
154         V3D_WRITE(V3D_CLE_0_CT0QBA, submit->bcl_start);  in v3dX()
155         V3D_WRITE(V3D_CLE_0_CT0QEA, submit->bcl_end);  in v3dX()
169         V3D_WRITE(V3D_CLE_0_CT1QBA, submit->rcl_start);  in v3dX()
170         V3D_WRITE(V3D_CLE_0_CT1QEA, submit->rcl_end);  in v3dX()
196         V3D_WRITE(V3D_TFU_IIA, submit->iia);  in v3dX()
197         V3D_WRITE(V3D_TFU_IIS, submit->iis);  in v3dX()
198         V3D_WRITE(V3D_TFU_ICA, submit->ica);  in v3dX()
199         V3D_WRITE(V3D_TFU_IUA, submit->iua);  in v3dX()
200         V3D_WRITE(V3D_TFU_IOA, submit->ioa);  in v3dX()
201         V3D_WRITE(V3D_TFU_IOS, submit->ios);  in v3dX()
202         V3D_WRITE(V3D_TFU_COEF0, submit->coef[0]);  in v3dX()
203         V3D_WRITE(V3D_TFU_COEF1, submit->coef[1]);  in v3dX()
204         V3D_WRITE(V3D_TFU_COEF2, submit->coef[2]);  in v3dX()
205         V3D_WRITE(V3D_TFU_COEF3, submit->coef[3]);  in v3dX()
207         V3D_WRITE(V3D_TFU_ICFG, submit->icfg);  in v3dX()
333         V3D_WRITE(V3D_CTL_0_MISCCFG, V3D_CTL_1_MISCCFG_OVRTMUOUT_SET);  in v3dX()
337         V3D_WRITE(V3D_CTL_0_INT_MSK_SET, ~core_interrupts);  in v3dX()
338         V3D_WRITE(V3D_CTL_0_INT_MSK_CLR, core_interrupts);  in v3dX()