Lines Matching refs:instr
60 const struct v3d_qpu_instr *instr, uint8_t mux) in v3d_qpu_disasm_raddr() argument
63 append(disasm, "rf%d", instr->raddr_a); in v3d_qpu_disasm_raddr()
65 if (instr->sig.small_imm) { in v3d_qpu_disasm_raddr()
69 instr->raddr_b, in v3d_qpu_disasm_raddr()
78 append(disasm, "rf%d", instr->raddr_b); in v3d_qpu_disasm_raddr()
102 const struct v3d_qpu_instr *instr) in v3d_qpu_disasm_add() argument
104 bool has_dst = v3d_qpu_add_op_has_dst(instr->alu.add.op); in v3d_qpu_disasm_add()
105 int num_src = v3d_qpu_add_op_num_src(instr->alu.add.op); in v3d_qpu_disasm_add()
107 append(disasm, "%s", v3d_qpu_add_op_name(instr->alu.add.op)); in v3d_qpu_disasm_add()
108 if (!v3d_qpu_sig_writes_address(disasm->devinfo, &instr->sig)) in v3d_qpu_disasm_add()
109 append(disasm, "%s", v3d_qpu_cond_name(instr->flags.ac)); in v3d_qpu_disasm_add()
110 append(disasm, "%s", v3d_qpu_pf_name(instr->flags.apf)); in v3d_qpu_disasm_add()
111 append(disasm, "%s", v3d_qpu_uf_name(instr->flags.auf)); in v3d_qpu_disasm_add()
116 v3d_qpu_disasm_waddr(disasm, instr->alu.add.waddr, in v3d_qpu_disasm_add()
117 instr->alu.add.magic_write); in v3d_qpu_disasm_add()
118 append(disasm, v3d_qpu_pack_name(instr->alu.add.output_pack)); in v3d_qpu_disasm_add()
124 v3d_qpu_disasm_raddr(disasm, instr, instr->alu.add.a); in v3d_qpu_disasm_add()
126 v3d_qpu_unpack_name(instr->alu.add.a_unpack)); in v3d_qpu_disasm_add()
131 v3d_qpu_disasm_raddr(disasm, instr, instr->alu.add.b); in v3d_qpu_disasm_add()
133 v3d_qpu_unpack_name(instr->alu.add.b_unpack)); in v3d_qpu_disasm_add()
139 const struct v3d_qpu_instr *instr) in v3d_qpu_disasm_mul() argument
141 bool has_dst = v3d_qpu_mul_op_has_dst(instr->alu.mul.op); in v3d_qpu_disasm_mul()
142 int num_src = v3d_qpu_mul_op_num_src(instr->alu.mul.op); in v3d_qpu_disasm_mul()
147 append(disasm, "%s", v3d_qpu_mul_op_name(instr->alu.mul.op)); in v3d_qpu_disasm_mul()
148 if (!v3d_qpu_sig_writes_address(disasm->devinfo, &instr->sig)) in v3d_qpu_disasm_mul()
149 append(disasm, "%s", v3d_qpu_cond_name(instr->flags.mc)); in v3d_qpu_disasm_mul()
150 append(disasm, "%s", v3d_qpu_pf_name(instr->flags.mpf)); in v3d_qpu_disasm_mul()
151 append(disasm, "%s", v3d_qpu_uf_name(instr->flags.muf)); in v3d_qpu_disasm_mul()
153 if (instr->alu.mul.op == V3D_QPU_M_NOP) in v3d_qpu_disasm_mul()
159 v3d_qpu_disasm_waddr(disasm, instr->alu.mul.waddr, in v3d_qpu_disasm_mul()
160 instr->alu.mul.magic_write); in v3d_qpu_disasm_mul()
161 append(disasm, v3d_qpu_pack_name(instr->alu.mul.output_pack)); in v3d_qpu_disasm_mul()
167 v3d_qpu_disasm_raddr(disasm, instr, instr->alu.mul.a); in v3d_qpu_disasm_mul()
169 v3d_qpu_unpack_name(instr->alu.mul.a_unpack)); in v3d_qpu_disasm_mul()
174 v3d_qpu_disasm_raddr(disasm, instr, instr->alu.mul.b); in v3d_qpu_disasm_mul()
176 v3d_qpu_unpack_name(instr->alu.mul.b_unpack)); in v3d_qpu_disasm_mul()
182 const struct v3d_qpu_instr *instr) in v3d_qpu_disasm_sig_addr() argument
187 if (!instr->sig_magic) in v3d_qpu_disasm_sig_addr()
188 append(disasm, ".rf%d", instr->sig_addr); in v3d_qpu_disasm_sig_addr()
190 const char *name = v3d_qpu_magic_waddr_name(instr->sig_addr); in v3d_qpu_disasm_sig_addr()
194 append(disasm, ".UNKNOWN%d", instr->sig_addr); in v3d_qpu_disasm_sig_addr()
200 const struct v3d_qpu_instr *instr) in v3d_qpu_disasm_sig() argument
202 const struct v3d_qpu_sig *sig = &instr->sig; in v3d_qpu_disasm_sig()
224 v3d_qpu_disasm_sig_addr(disasm, instr); in v3d_qpu_disasm_sig()
230 v3d_qpu_disasm_sig_addr(disasm, instr); in v3d_qpu_disasm_sig()
234 v3d_qpu_disasm_sig_addr(disasm, instr); in v3d_qpu_disasm_sig()
238 v3d_qpu_disasm_sig_addr(disasm, instr); in v3d_qpu_disasm_sig()
244 v3d_qpu_disasm_sig_addr(disasm, instr); in v3d_qpu_disasm_sig()
250 v3d_qpu_disasm_sig_addr(disasm, instr); in v3d_qpu_disasm_sig()
258 const struct v3d_qpu_instr *instr) in v3d_qpu_disasm_alu() argument
260 v3d_qpu_disasm_add(disasm, instr); in v3d_qpu_disasm_alu()
261 v3d_qpu_disasm_mul(disasm, instr); in v3d_qpu_disasm_alu()
262 v3d_qpu_disasm_sig(disasm, instr); in v3d_qpu_disasm_alu()
267 const struct v3d_qpu_instr *instr) in v3d_qpu_disasm_branch() argument
270 if (instr->branch.ub) in v3d_qpu_disasm_branch()
272 append(disasm, "%s", v3d_qpu_branch_cond_name(instr->branch.cond)); in v3d_qpu_disasm_branch()
273 append(disasm, "%s", v3d_qpu_msfign_name(instr->branch.msfign)); in v3d_qpu_disasm_branch()
275 switch (instr->branch.bdi) { in v3d_qpu_disasm_branch()
277 append(disasm, " zero_addr+0x%08x", instr->branch.offset); in v3d_qpu_disasm_branch()
281 append(disasm, " %d", instr->branch.offset); in v3d_qpu_disasm_branch()
289 append(disasm, " rf%d", instr->branch.raddr_a); in v3d_qpu_disasm_branch()
293 if (instr->branch.ub) { in v3d_qpu_disasm_branch()
294 switch (instr->branch.bdu) { in v3d_qpu_disasm_branch()
308 append(disasm, ", rf%d", instr->branch.raddr_a); in v3d_qpu_disasm_branch()
316 const struct v3d_qpu_instr *instr) in v3d_qpu_decode() argument
324 switch (instr->type) { in v3d_qpu_decode()
326 v3d_qpu_disasm_alu(&disasm, instr); in v3d_qpu_decode()
330 v3d_qpu_disasm_branch(&disasm, instr); in v3d_qpu_decode()
345 struct v3d_qpu_instr instr; in v3d_qpu_disasm() local
346 bool ok = v3d_qpu_instr_unpack(devinfo, inst, &instr); in v3d_qpu_disasm()
349 return v3d_qpu_decode(devinfo, &instr); in v3d_qpu_disasm()
354 const struct v3d_qpu_instr *instr) in v3d_qpu_dump() argument
356 const char *decoded = v3d_qpu_decode(devinfo, instr); in v3d_qpu_dump()