144 static void cayman_emit_msaa_sample_locs(struct radeon_cmdbuf *cs, int nr_samples)  in cayman_emit_msaa_sample_locs()  argument
149 		radeon_set_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 0);  in cayman_emit_msaa_sample_locs()
150 		radeon_set_context_reg(cs, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, 0);  in cayman_emit_msaa_sample_locs()
151 		radeon_set_context_reg(cs, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, 0);  in cayman_emit_msaa_sample_locs()
152 		radeon_set_context_reg(cs, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, 0);  in cayman_emit_msaa_sample_locs()
155 		radeon_set_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, eg_sample_locs_2x[0]);  in cayman_emit_msaa_sample_locs()
156 		radeon_set_context_reg(cs, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, eg_sample_locs_2x[1]);  in cayman_emit_msaa_sample_locs()
157 		radeon_set_context_reg(cs, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, eg_sample_locs_2x[2]);  in cayman_emit_msaa_sample_locs()
158 		radeon_set_context_reg(cs, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, eg_sample_locs_2x[3]);  in cayman_emit_msaa_sample_locs()
161 		radeon_set_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, eg_sample_locs_4x[0]);  in cayman_emit_msaa_sample_locs()
162 		radeon_set_context_reg(cs, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, eg_sample_locs_4x[1]);  in cayman_emit_msaa_sample_locs()
163 		radeon_set_context_reg(cs, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, eg_sample_locs_4x[2]);  in cayman_emit_msaa_sample_locs()
164 		radeon_set_context_reg(cs, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, eg_sample_locs_4x[3]);  in cayman_emit_msaa_sample_locs()
167 		radeon_set_context_reg_seq(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 14);  in cayman_emit_msaa_sample_locs()
168 		radeon_emit(cs, cm_sample_locs_8x[0]);  in cayman_emit_msaa_sample_locs()
169 		radeon_emit(cs, cm_sample_locs_8x[4]);  in cayman_emit_msaa_sample_locs()
170 		radeon_emit(cs, 0);  in cayman_emit_msaa_sample_locs()
171 		radeon_emit(cs, 0);  in cayman_emit_msaa_sample_locs()
172 		radeon_emit(cs, cm_sample_locs_8x[1]);  in cayman_emit_msaa_sample_locs()
173 		radeon_emit(cs, cm_sample_locs_8x[5]);  in cayman_emit_msaa_sample_locs()
174 		radeon_emit(cs, 0);  in cayman_emit_msaa_sample_locs()
175 		radeon_emit(cs, 0);  in cayman_emit_msaa_sample_locs()
176 		radeon_emit(cs, cm_sample_locs_8x[2]);  in cayman_emit_msaa_sample_locs()
177 		radeon_emit(cs, cm_sample_locs_8x[6]);  in cayman_emit_msaa_sample_locs()
178 		radeon_emit(cs, 0);  in cayman_emit_msaa_sample_locs()
179 		radeon_emit(cs, 0);  in cayman_emit_msaa_sample_locs()
180 		radeon_emit(cs, cm_sample_locs_8x[3]);  in cayman_emit_msaa_sample_locs()
181 		radeon_emit(cs, cm_sample_locs_8x[7]);  in cayman_emit_msaa_sample_locs()
184 		radeon_set_context_reg_seq(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 16);  in cayman_emit_msaa_sample_locs()
185 		radeon_emit(cs, cm_sample_locs_16x[0]);  in cayman_emit_msaa_sample_locs()
186 		radeon_emit(cs, cm_sample_locs_16x[4]);  in cayman_emit_msaa_sample_locs()
187 		radeon_emit(cs, cm_sample_locs_16x[8]);  in cayman_emit_msaa_sample_locs()
188 		radeon_emit(cs, cm_sample_locs_16x[12]);  in cayman_emit_msaa_sample_locs()
189 		radeon_emit(cs, cm_sample_locs_16x[1]);  in cayman_emit_msaa_sample_locs()
190 		radeon_emit(cs, cm_sample_locs_16x[5]);  in cayman_emit_msaa_sample_locs()
191 		radeon_emit(cs, cm_sample_locs_16x[9]);  in cayman_emit_msaa_sample_locs()
192 		radeon_emit(cs, cm_sample_locs_16x[13]);  in cayman_emit_msaa_sample_locs()
193 		radeon_emit(cs, cm_sample_locs_16x[2]);  in cayman_emit_msaa_sample_locs()
194 		radeon_emit(cs, cm_sample_locs_16x[6]);  in cayman_emit_msaa_sample_locs()
195 		radeon_emit(cs, cm_sample_locs_16x[10]);  in cayman_emit_msaa_sample_locs()
196 		radeon_emit(cs, cm_sample_locs_16x[14]);  in cayman_emit_msaa_sample_locs()
197 		radeon_emit(cs, cm_sample_locs_16x[3]);  in cayman_emit_msaa_sample_locs()
198 		radeon_emit(cs, cm_sample_locs_16x[7]);  in cayman_emit_msaa_sample_locs()
199 		radeon_emit(cs, cm_sample_locs_16x[11]);  in cayman_emit_msaa_sample_locs()
200 		radeon_emit(cs, cm_sample_locs_16x[15]);  in cayman_emit_msaa_sample_locs()
205 void cayman_emit_msaa_state(struct radeon_cmdbuf *cs, int nr_samples,  in cayman_emit_msaa_state()  argument
223 		cayman_emit_msaa_sample_locs(cs, nr_samples);  in cayman_emit_msaa_state()
239 		radeon_set_context_reg_seq(cs, CM_R_028BDC_PA_SC_LINE_CNTL, 2);  in cayman_emit_msaa_state()
240 		radeon_emit(cs, sc_line_cntl |  in cayman_emit_msaa_state()
242 		radeon_emit(cs, S_028BE0_MSAA_NUM_SAMPLES(log_samples) |  in cayman_emit_msaa_state()
247 			radeon_set_context_reg(cs, CM_R_028804_DB_EQAA,  in cayman_emit_msaa_state()
254 			radeon_set_context_reg(cs, EG_R_028A4C_PA_SC_MODE_CNTL_1,  in cayman_emit_msaa_state()
258 			radeon_set_context_reg(cs, CM_R_028804_DB_EQAA,  in cayman_emit_msaa_state()
262 			radeon_set_context_reg(cs, EG_R_028A4C_PA_SC_MODE_CNTL_1,  in cayman_emit_msaa_state()
266 		radeon_set_context_reg_seq(cs, CM_R_028BDC_PA_SC_LINE_CNTL, 2);  in cayman_emit_msaa_state()
267 		radeon_emit(cs, sc_line_cntl); /* CM_R_028BDC_PA_SC_LINE_CNTL */  in cayman_emit_msaa_state()
268 		radeon_emit(cs, 0); /* CM_R_028BE0_PA_SC_AA_CONFIG */  in cayman_emit_msaa_state()
270 		radeon_set_context_reg(cs, CM_R_028804_DB_EQAA,  in cayman_emit_msaa_state()
273 		radeon_set_context_reg(cs, EG_R_028A4C_PA_SC_MODE_CNTL_1,  in cayman_emit_msaa_state()