52    struct si_fine_fence fine;  member
192       si_resource_reference(&(*sdst)->fine.buf, NULL);  in si_fence_reference()
223 static bool si_fine_fence_signaled(struct radeon_winsys *rws, const struct si_fine_fence *fine)  in si_fine_fence_signaled()  argument
226       rws->buffer_map(fine->buf->buf, NULL, PIPE_MAP_READ | PIPE_MAP_UNSYNCHRONIZED);  in si_fine_fence_signaled()
230    uint32_t *fence = (uint32_t *)(map + fine->offset);  in si_fine_fence_signaled()
234 static void si_fine_fence_set(struct si_context *ctx, struct si_fine_fence *fine, unsigned flags)  in si_fine_fence_set()  argument
241    u_upload_alloc(ctx->cached_gtt_allocator, 0, 4, 4, &fine->offset,  in si_fine_fence_set()
242                   (struct pipe_resource **)&fine->buf, (void **)&fence_ptr);  in si_fine_fence_set()
243    if (!fine->buf)  in si_fine_fence_set()
251       si_cp_write_data(ctx, fine->buf, fine->offset, 4, V_370_MEM, V_370_PFP, &value);  in si_fine_fence_set()
253       uint64_t fence_va = fine->buf->gpu_address + fine->offset;  in si_fine_fence_set()
255       radeon_add_to_buffer_list(ctx, ctx->gfx_cs, fine->buf, RADEON_USAGE_WRITE, RADEON_PRIO_QUERY);  in si_fine_fence_set()
318    if (sfence->fine.buf && si_fine_fence_signaled(rws, &sfence->fine)) {  in si_fence_finish()
320       si_resource_reference(&sfence->fine.buf, NULL);  in si_fence_finish()
367     * the fine-grained fence have completed. */  in si_fence_finish()
368    if (sfence->fine.buf && si_fine_fence_signaled(rws, &sfence->fine))  in si_fence_finish()
470    struct si_fine_fence fine = {};  in si_flush_from_st()  local
480       si_fine_fence_set(sctx, &fine, flags);  in si_flush_from_st()
535       multi_fence->fine = fine;  in si_flush_from_st()
536       fine.buf = NULL;  in si_flush_from_st()
543    assert(!fine.buf);  in si_flush_from_st()
594     * dependency is signalled. That's fine. Flushing is very expensive  in si_fence_server_sync()