Lines Matching refs:legalizeToReg
2104 Variable *IndexR = legalizeToReg(Mem->getIndex()); in loOperand()
2142 Variable *BaseR = legalizeToReg(NewBase); in hiOperand()
2143 Variable *IndexR = legalizeToReg(Mem->getIndex()); in hiOperand()
2168 Variable *BaseR = legalizeToReg(Base); in hiOperand()
2286 Variable *SrcLoReg = legalizeToReg(SrcLo); in div0Check()
2320 Variable *Src1R = legalizeToReg(Src1); in lowerIDivRem()
2365 Src0 = legalizeToReg(Src0); in lowerInt1Arithmetic()
2424 return legalizeToReg(Target, Src0); in src0R()
2428 return legalizeToReg(Target, Swapped ? Src1 : Src0); in unswappedSrc0R()
2436 return legalizeToReg(Target, Swapped ? Src0 : Src1); in unswappedSrc1R()
2446 static Variable *legalizeToReg(TargetARM32 *Target, Operand *Src) { in legalizeToReg() function in Ice::ARM32::__anon6a253d620b11::NumericOperandsBase
2447 return Target->legalizeToReg(Src); in legalizeToReg()
2509 return legalizeToReg(Target, Swapped ? Src0 : Src1); in unswappedSrc1RShAmtImm()
3127 Variable *Src0R = legalizeToReg(Src0); in lowerArithmetic()
3134 Variable *Src0R = legalizeToReg(Src0); in lowerArithmetic()
3141 Variable *Src0R = legalizeToReg(Src0); in lowerArithmetic()
3148 Variable *Src0R = legalizeToReg(Src0); in lowerArithmetic()
3160 Variable *Src0R = legalizeToReg(Src0); in lowerArithmetic()
3162 Variable *Src1R = legalizeToReg(Src1Producer->getSrc(0)); in lowerArithmetic()
3163 Variable *Src2R = legalizeToReg(Src1Producer->getSrc(1)); in lowerArithmetic()
3169 Variable *Src1R = legalizeToReg(Src1); in lowerArithmetic()
3175 Variable *Src0R = legalizeToReg(Src0); in lowerArithmetic()
3177 Variable *Src1R = legalizeToReg(Src1Producer->getSrc(0)); in lowerArithmetic()
3178 Variable *Src2R = legalizeToReg(Src1Producer->getSrc(1)); in lowerArithmetic()
3183 Variable *Src1R = legalizeToReg(Src1); in lowerArithmetic()
3189 Variable *Src0R = legalizeToReg(Src0); in lowerArithmetic()
3190 Variable *Src1R = legalizeToReg(Src1); in lowerArithmetic()
3196 Variable *Src0R = legalizeToReg(Src0); in lowerArithmetic()
3197 Variable *Src1R = legalizeToReg(Src1); in lowerArithmetic()
3213 Variable *Src0R = legalizeToReg(Src0); in lowerArithmetic()
3214 Variable *Src1R = legalizeToReg(Src1Producer->getSrc(0)); in lowerArithmetic()
3215 Variable *Src2R = legalizeToReg(Src1Producer->getSrc(1)); in lowerArithmetic()
3238 Variable *Src1R = legalizeToReg(Src1); in lowerArithmetic()
3261 Variable *Src1R = legalizeToReg(Src1); in lowerArithmetic()
3274 Variable *Src1R = legalizeToReg(Src1); in lowerArithmetic()
3287 Variable *Src1R = legalizeToReg(Src1); in lowerArithmetic()
3299 Variable *Src0R = legalizeToReg(Src0); in lowerArithmetic()
3300 Variable *Src1R = legalizeToReg(Src1Producer->getSrc(0)); in lowerArithmetic()
3301 Variable *Src2R = legalizeToReg(Src1Producer->getSrc(1)); in lowerArithmetic()
3577 _tst(legalizeToReg(Boolean), _1); in lowerInt1ForBranch()
3598 _tst(legalizeToReg(Src), _1); in lowerInt1ForBranch()
3826 RegArgs.emplace_back(legalizeToReg(FPArg.first, FPArg.second)); in lowerCall()
3829 RegArgs.emplace_back(legalizeToReg(GPRArg.first, GPRArg.second)); in lowerCall()
3918 auto *Src0R = legalizeToReg(Src0); in lowerCast()
3932 Variable *Src0R = legalizeToReg(Src0); in lowerCast()
3951 Variable *Src0R = legalizeToReg(Src0); in lowerCast()
3969 auto *Src0R = legalizeToReg(Src0); in lowerCast()
3984 _uxt(T_Lo, legalizeToReg(Src0)); in lowerCast()
4016 Variable *Src0R = legalizeToReg(Src0); in lowerCast()
4026 auto *Src0R = legalizeToReg(Src0); in lowerCast()
4050 Variable *Src0R = legalizeToReg(Src0); in lowerCast()
4059 Variable *Src0R = legalizeToReg(Src0); in lowerCast()
4104 Variable *Src0R = legalizeToReg(Src0); in lowerCast()
4130 Variable *Src0R = legalizeToReg(Src0); in lowerCast()
4169 Variable *Src0R = legalizeToReg(Src0); in lowerCast()
4183 Variable *Src0R = legalizeToReg(Src0); in lowerCast()
4237 Variable *Src0 = legalizeToReg(Instr->getSrc(0)); in lowerExtractElement()
4316 Variable *Src0R = legalizeToReg(Instr->getSrc(0)); in lowerFcmpCond()
4321 _vcmp(Src0R, legalizeToReg(Src1)); in lowerFcmpCond()
4354 auto *Src0 = legalizeToReg(Instr->getSrc(0)); in lowerFcmp()
4355 auto *Src1 = legalizeToReg(Instr->getSrc(1)); in lowerFcmp()
4511 Src0RLo = legalizeToReg(loOperand(Src1)); in lowerInt64IcmpCond()
4512 Src0RHi = legalizeToReg(hiOperand(Src1)); in lowerInt64IcmpCond()
4513 Src1RFLo = legalizeToReg(loOperand(Src0)); in lowerInt64IcmpCond()
4514 Src1RFHi = legalizeToReg(hiOperand(Src0)); in lowerInt64IcmpCond()
4516 Src0RLo = legalizeToReg(loOperand(Src0)); in lowerInt64IcmpCond()
4517 Src0RHi = legalizeToReg(hiOperand(Src0)); in lowerInt64IcmpCond()
4518 Src1RFLo = legalizeToReg(loOperand(Src1)); in lowerInt64IcmpCond()
4519 Src1RFHi = legalizeToReg(hiOperand(Src1)); in lowerInt64IcmpCond()
4612 _lsl(Src0R, legalizeToReg(Src0), ShAmtImm); in lowerInt8AndInt16IcmpCond()
4614 Variable *Src1R = legalizeToReg(Src1); in lowerInt8AndInt16IcmpCond()
4707 auto *Src0 = legalizeToReg(Instr->getSrc(0)); in lowerIcmp()
4708 auto *Src1 = legalizeToReg(Instr->getSrc(1)); in lowerIcmp()
4797 Variable *Src0 = legalizeToReg(Instr->getSrc(0)); in lowerInsertElement()
4798 Variable *Src1 = legalizeToReg(Instr->getSrc(1)); in lowerInsertElement()
4839 Variable *AddrR = legalizeToReg(Addr); in lowerLoadLinkedStoreExclusive()
4910 ValRF = legalizeToReg(Val); in lowerAtomicRMW()
5035 _mov(Dest, legalizeToReg(Ctx->getConstantInt32(Result))); in lowerIntrinsic()
5094 auto *ValueR = legalizeToReg(Instr->getArg(0)); in lowerIntrinsic()
5097 auto *Addr = legalizeToReg(Instr->getArg(1)); in lowerIntrinsic()
5163 auto *New = legalizeToReg(Instr->getArg(2)); in lowerIntrinsic()
5164 auto *Expected = legalizeToReg(Instr->getArg(1)); in lowerIntrinsic()
5201 Variable *Val_Lo = legalizeToReg(loOperand(Val)); in lowerIntrinsic()
5202 Variable *Val_Hi = legalizeToReg(hiOperand(Val)); in lowerIntrinsic()
5213 Variable *ValR = legalizeToReg(Val); in lowerIntrinsic()
5235 ValLoR = legalizeToReg(loOperand(Val)); in lowerIntrinsic()
5236 ValHiR = legalizeToReg(hiOperand(Val)); in lowerIntrinsic()
5238 ValLoR = legalizeToReg(Val); in lowerIntrinsic()
5250 ValLoR = legalizeToReg(loOperand(Val)); in lowerIntrinsic()
5251 ValHiR = legalizeToReg(hiOperand(Val)); in lowerIntrinsic()
5259 ValLoR = legalizeToReg(Val); in lowerIntrinsic()
5269 _vabs(T, legalizeToReg(Instr->getArg(0))); in lowerIntrinsic()
5289 Variable *TP = legalizeToReg(OperandARM32Mem::create( in lowerIntrinsic()
5301 Variable *Src = legalizeToReg(Instr->getArg(0)); in lowerIntrinsic()
5313 Variable *Val = legalizeToReg(Instr->getArg(0)); in lowerIntrinsic()
5323 Variable *Src0 = legalizeToReg(Instr->getArg(0)); in lowerIntrinsic()
5324 Variable *Src1 = legalizeToReg(Instr->getArg(1)); in lowerIntrinsic()
5364 Variable *Value = legalizeToReg(Instr->getArg(0)); in lowerIntrinsic()
5369 Value = legalizeToReg(Value); in lowerIntrinsic()
5385 Variable *Src0 = legalizeToReg(Instr->getArg(0)); in lowerIntrinsic()
5386 Variable *Src1 = legalizeToReg(Instr->getArg(1)); in lowerIntrinsic()
5395 Variable *Src0 = legalizeToReg(Instr->getArg(0)); in lowerIntrinsic()
5396 Variable *Src1 = legalizeToReg(Instr->getArg(1)); in lowerIntrinsic()
5417 Variable *Src0 = legalizeToReg(Instr->getArg(0)); in lowerIntrinsic()
5418 Variable *Src1 = legalizeToReg(Instr->getArg(1)); in lowerIntrinsic()
5428 Variable *Src0 = legalizeToReg(Instr->getArg(0)); in lowerIntrinsic()
5429 Variable *Src1 = legalizeToReg(Instr->getArg(1)); in lowerIntrinsic()
5929 Variable *R0 = legalizeToReg(loOperand(Src0), RegARM32::Reg_r0); in lowerRet()
5930 Variable *R1 = legalizeToReg(hiOperand(Src0), RegARM32::Reg_r1); in lowerRet()
5934 Variable *S0 = legalizeToReg(Src0, RegARM32::Reg_s0); in lowerRet()
5937 Variable *D0 = legalizeToReg(Src0, RegARM32::Reg_d0); in lowerRet()
5940 Variable *Q0 = legalizeToReg(Src0, RegARM32::Reg_q0); in lowerRet()
5980 Variable *Src0Var = legalizeToReg(Src0); in lowerShuffleVector()
5994 Variable *Src0R = legalizeToReg(Src0); in lowerShuffleVector()
6001 Variable *Src0R = legalizeToReg(Src0); in lowerShuffleVector()
6002 Variable *Src1R = legalizeToReg(Src1); in lowerShuffleVector()
6009 Variable *Src0R = legalizeToReg(Src0); in lowerShuffleVector()
6022 Variable *Src0R = legalizeToReg(Src0); in lowerShuffleVector()
6030 Variable *Src0R = legalizeToReg(Src0); in lowerShuffleVector()
6031 Variable *Src1R = legalizeToReg(Src1); in lowerShuffleVector()
6045 Variable *Src0R = legalizeToReg(Src0); in lowerShuffleVector()
6052 Variable *Src0R = legalizeToReg(Src0); in lowerShuffleVector()
6053 Variable *Src1R = legalizeToReg(Src1); in lowerShuffleVector()
6060 Variable *Src0R = legalizeToReg(Src0); in lowerShuffleVector()
6061 Variable *Src1R = legalizeToReg(Src1); in lowerShuffleVector()
6068 Variable *Src0R = legalizeToReg(Src0); in lowerShuffleVector()
6075 Variable *Src0R = legalizeToReg(Src0); in lowerShuffleVector()
6076 Variable *Src1R = legalizeToReg(Src1); in lowerShuffleVector()
6145 auto *SrcTR = legalizeToReg(SrcT); in lowerSelect()
6146 auto *SrcFR = legalizeToReg(SrcF); in lowerSelect()
6159 Variable *ValueHi = legalizeToReg(hiOperand(Value)); in lowerStore()
6160 Variable *ValueLo = legalizeToReg(loOperand(Value)); in lowerStore()
6164 Variable *ValueR = legalizeToReg(Value); in lowerStore()
6188 Variable *Src0Lo = legalizeToReg(loOperand(Src0)); in lowerSwitch()
6189 Variable *Src0Hi = legalizeToReg(hiOperand(Src0)); in lowerSwitch()
6203 Variable *Src0Var = legalizeToReg(Src0); in lowerSwitch()
6366 RegIndex = legalizeToReg(Index); in legalize()
6465 auto *GotAddr = legalizeToReg(GotPtr); in legalize()
6502 BaseReg = legalizeToReg(Offset); in legalize()
6543 Variable *TargetARM32::legalizeToReg(Operand *From, RegNumT RegNum) { in legalizeToReg() function in Ice::ARM32::TargetARM32
6756 Variable *Src = legalizeToReg(Boolean); in lowerInt1ForSelect()