| /external/arm-trusted-firmware/plat/imx/common/include/ |
| D | imx8_lpuart.h | 18 #define CTRL 0x18 macro
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| /external/python/cpython2/Modules/ |
| D | termios.c | 10 #define CTRL(c) ((c)&037) macro
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| /external/python/cpython3/Modules/ |
| D | termios.c | 8 #define CTRL(c) ((c)&037) macro
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| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/ |
| D | core_cm0plus.h | 522 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
575 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
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| D | core_sc000.h | 533 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
586 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
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| D | core_cm0.h | 498 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
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| D | core_sc300.h | 667 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
822 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1126 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
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| D | core_cm3.h | 685 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
840 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1144 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
|
| D | core_cm4.h | 746 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
901 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1205 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
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| D | core_cm7.h | 948 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
1103 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1410 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
|
| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/ |
| D | core_cm0plus.h | 522 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
575 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
|
| D | core_sc000.h | 533 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
586 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
|
| D | core_cm0.h | 498 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
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| D | core_cm3.h | 685 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
840 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1144 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
|
| D | core_sc300.h | 667 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
822 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1126 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
|
| D | core_cm4.h | 746 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
901 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1205 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
|
| D | core_cm7.h | 948 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
1103 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1410 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
|
| /external/python/cpython2/Lib/plat-irix5/ |
| D | IOCTL.py | 65 def CTRL(c): return ord(c) & 0x0f function
|
| /external/python/cpython2/Lib/plat-irix6/ |
| D | IOCTL.py | 65 def CTRL(c): return ord(c) & 0x0f function
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| /external/curl/tests/server/ |
| D | sws.c | 1318 #define CTRL 0 macro
|