| /external/llvm/lib/Target/AArch64/ |
| D | AArch64CollectLOH.cpp | 314 unsigned CurReg = MO.getReg(); in initReachingDef() local
354 unsigned CurReg = MO.getReg(); in initReachingDef() local
383 for (unsigned CurReg = 0; CurReg < NbReg; ++CurReg) in initReachingDef() local
409 unsigned CurReg; in reachingDefAlgorithm() local
481 unsigned CurReg; in printReachingDef() local
571 for (unsigned CurReg = 0; CurReg < NbReg; ++CurReg) { in reachedUsesToDefs() local
1022 unsigned CurReg = IO->getReg(); in collectInvolvedReg() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyRegNumbering.cpp | 90 unsigned CurReg = MFI.getParams().size(); in runOnMachineFunction() local
|
| /external/llvm-project/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyRegNumbering.cpp | 90 unsigned CurReg = MFI.getParams().size(); in runOnMachineFunction() local
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyRegNumbering.cpp | 93 unsigned CurReg = MFI.getParams().size(); in runOnMachineFunction() local
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SILowerI1Copies.cpp | 820 unsigned PrevReg, unsigned CurReg) { in buildMergeLaneMasks()
|
| D | SIInstrInfo.cpp | 4877 Register CurReg = MRI.createVirtualRegister(&AMDGPU::SGPR_64RegClass); in emitLoadSRsrcFromVGPRLoop() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SILowerI1Copies.cpp | 817 unsigned PrevReg, unsigned CurReg) { in buildMergeLaneMasks()
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86DomainReassignment.cpp | 548 unsigned CurReg = Worklist.pop_back_val(); in buildClosure() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86DomainReassignment.cpp | 552 unsigned CurReg = Worklist.pop_back_val(); in buildClosure() local
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 2093 for (unsigned CurReg = FirstReg - 1; CurReg >= RD0Reg && RegsNeeded; in tryFoldSPUpdateIntoPushPop() local
4422 unsigned CurReg = SrcLane == 1 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 2466 unsigned CurReg = RegClass->getRegister(CurRegEnc); in tryFoldSPUpdateIntoPushPop() local
5074 unsigned CurReg = SrcLane == 1 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain() local
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 2516 unsigned CurReg = RegClass->getRegister(CurRegEnc); in tryFoldSPUpdateIntoPushPop() local
5110 unsigned CurReg = SrcLane == 1 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain() local
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.cpp | 7755 unsigned CurReg = 0; in LowerCallTo() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.cpp | 9385 unsigned CurReg = 0; in LowerCallTo() local
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.cpp | 9471 unsigned CurReg = 0; in LowerCallTo() local
|