| /external/llvm/lib/Target/PowerPC/ |
| D | PPCTLSDynamicCall.cpp | 72 unsigned InReg = MI->getOperand(1).getReg(); in processBlock() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCTLSDynamicCall.cpp | 79 Register InReg = MI.getOperand(1).getReg(); in processBlock() local
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| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCTLSDynamicCall.cpp | 80 Register InReg = PPC::NoRegister; in processBlock() local
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| /external/llvm/include/llvm/Target/ |
| D | TargetCallingConv.h | 32 static const uint64_t InReg = 1ULL<<2; ///< Passed in register member
|
| /external/clang/include/clang/CodeGen/ |
| D | CGFunctionInfo.h | 96 bool InReg : 1; // isDirect() || isExtend() || isIndirect() variable
|
| /external/llvm-project/clang/include/clang/CodeGen/ |
| D | CGFunctionInfo.h | 109 bool InReg : 1; // isDirect() || isExtend() || isIndirect() variable
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallLowering.cpp | 614 const bool InReg = Arg.hasAttribute(Attribute::InReg); in lowerFormalArguments() local
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| D | AMDGPUMachineCFGStructurizer.cpp | 2739 unsigned InReg = LRegion->getBBSelectRegIn(); in structurizeComplexRegion() local
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| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | StatepointLowering.cpp | 1154 Register InReg = Record.payload.Reg; in visitGCRelocate() local
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| D | SelectionDAGBuilder.cpp | 1366 Register InReg = It->second; in getCopyFromRegs() local
1564 unsigned InReg = FuncInfo.InitializeRegForValue(Inst); in getValueImpl() local
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| /external/clang/lib/CodeGen/ |
| D | TargetInfo.cpp | 1430 bool &InReg, in shouldAggregateUseDirect()
1523 bool InReg; in classifyArgumentType() local
1572 bool InReg = shouldPrimitiveUseInReg(Ty, State); in classifyArgumentType() local
6852 bool InReg = shouldUseInReg(Ty, State); in classifyArgumentType() local
7012 bool InReg; member
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 352 Register InReg = MI.getOperand(1).getReg(); in LowerFPToInt() local
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallLowering.cpp | 826 const bool InReg = Arg.hasAttribute(Attribute::InReg); in lowerFormalArguments() local
|
| D | AMDGPUInstructionSelector.cpp | 1963 bool InReg = I.getOpcode() == AMDGPU::G_SEXT_INREG; in selectG_SZA_EXT() local
|
| /external/llvm-project/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 342 Register InReg = MI.getOperand(1).getReg(); in LowerFPToInt() local
|
| /external/llvm-project/clang/lib/CodeGen/ |
| D | TargetInfo.cpp | 1683 bool &InReg, in shouldAggregateUseDirect()
1814 bool InReg; in classifyArgumentType() local
1876 bool InReg = shouldPrimitiveUseInReg(Ty, State); in classifyArgumentType() local
8638 bool InReg = shouldUseInReg(Ty, State); in classifyArgumentType() local
9233 bool InReg; member
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 784 bool InReg = VA.isRegLoc() && in LowerFormalArguments() local
|
| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 814 bool InReg = VA.isRegLoc() && in LowerFormalArguments() local
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.cpp | 1041 unsigned InReg = It->second; in getCopyFromRegs() local
1231 unsigned InReg = FuncInfo.InitializeRegForValue(Inst); in getValueImpl() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.cpp | 1406 unsigned InReg = It->second; in getCopyFromRegs() local
1598 unsigned InReg = FuncInfo.InitializeRegForValue(Inst); in getValueImpl() local
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringMIPS32.cpp | 3375 bool InReg = false; in lowerCall() local
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| D | IceTargetLoweringARM32.cpp | 3715 bool InReg = false; in lowerCall() local
|