1 use crate::arch::RegId;
2 
3 /// 32-bit ARM core register identifier.
4 #[derive(Debug, Clone, Copy)]
5 #[non_exhaustive]
6 pub enum ArmCoreRegId {
7     /// General purpose registers (R0-R12)
8     Gpr(u8),
9     /// Stack Pointer (R13)
10     Sp,
11     /// Link Register (R14)
12     Lr,
13     /// Program Counter (R15)
14     Pc,
15     /// Floating point registers (F0-F7)
16     Fpr(u8),
17     /// Floating point status
18     Fps,
19     /// Current Program Status Register (cpsr)
20     Cpsr,
21 }
22 
23 impl RegId for ArmCoreRegId {
from_raw_id(id: usize) -> Option<(Self, usize)>24     fn from_raw_id(id: usize) -> Option<(Self, usize)> {
25         let reg = match id {
26             0..=12 => Self::Gpr(id as u8),
27             13 => Self::Sp,
28             14 => Self::Lr,
29             15 => Self::Pc,
30             16..=23 => Self::Fpr((id as u8) - 16),
31             25 => Self::Cpsr,
32             _ => return None,
33         };
34         Some((reg, 4))
35     }
36 }
37