1 /*
2 * © Copyright 2017-2018 Alyssa Rosenzweig
3 * © Copyright 2017-2018 Connor Abbott
4 * © Copyright 2017-2018 Lyude Paul
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 */
26
27 #ifndef __PANFROST_JOB_H__
28 #define __PANFROST_JOB_H__
29
30 #include <stdint.h>
31 #include <panfrost-misc.h>
32
33 #define MALI_SHORT_PTR_BITS (sizeof(uintptr_t)*8)
34
35 #define MALI_FBD_HIERARCHY_WEIGHTS 8
36
37 #define MALI_PAYLOAD_SIZE 256
38
39 typedef u32 mali_jd_core_req;
40
41 enum mali_job_type {
42 JOB_NOT_STARTED = 0,
43 JOB_TYPE_NULL = 1,
44 JOB_TYPE_SET_VALUE = 2,
45 JOB_TYPE_CACHE_FLUSH = 3,
46 JOB_TYPE_COMPUTE = 4,
47 JOB_TYPE_VERTEX = 5,
48 JOB_TYPE_GEOMETRY = 6,
49 JOB_TYPE_TILER = 7,
50 JOB_TYPE_FUSED = 8,
51 JOB_TYPE_FRAGMENT = 9,
52 };
53
54 enum mali_draw_mode {
55 MALI_DRAW_NONE = 0x0,
56 MALI_POINTS = 0x1,
57 MALI_LINES = 0x2,
58 MALI_LINE_STRIP = 0x4,
59 MALI_LINE_LOOP = 0x6,
60 MALI_TRIANGLES = 0x8,
61 MALI_TRIANGLE_STRIP = 0xA,
62 MALI_TRIANGLE_FAN = 0xC,
63 MALI_POLYGON = 0xD,
64 MALI_QUADS = 0xE,
65 MALI_QUAD_STRIP = 0xF,
66
67 /* All other modes invalid */
68 };
69
70 /* Applies to tiler_gl_enables */
71
72
73 #define MALI_OCCLUSION_QUERY (1 << 3)
74 #define MALI_OCCLUSION_PRECISE (1 << 4)
75
76 #define MALI_FRONT_FACE(v) (v << 5)
77 #define MALI_CCW (0)
78 #define MALI_CW (1)
79
80 #define MALI_CULL_FACE_FRONT (1 << 6)
81 #define MALI_CULL_FACE_BACK (1 << 7)
82
83 /* TODO: Might this actually be a finer bitfield? */
84 #define MALI_DEPTH_STENCIL_ENABLE 0x6400
85
86 #define DS_ENABLE(field) \
87 (field == MALI_DEPTH_STENCIL_ENABLE) \
88 ? "MALI_DEPTH_STENCIL_ENABLE" \
89 : (field == 0) ? "0" \
90 : "0 /* XXX: Unknown, check hexdump */"
91
92 /* Used in stencil and depth tests */
93
94 enum mali_func {
95 MALI_FUNC_NEVER = 0,
96 MALI_FUNC_LESS = 1,
97 MALI_FUNC_EQUAL = 2,
98 MALI_FUNC_LEQUAL = 3,
99 MALI_FUNC_GREATER = 4,
100 MALI_FUNC_NOTEQUAL = 5,
101 MALI_FUNC_GEQUAL = 6,
102 MALI_FUNC_ALWAYS = 7
103 };
104
105 /* Same OpenGL, but mixed up. Why? Because forget me, that's why! */
106
107 enum mali_alt_func {
108 MALI_ALT_FUNC_NEVER = 0,
109 MALI_ALT_FUNC_GREATER = 1,
110 MALI_ALT_FUNC_EQUAL = 2,
111 MALI_ALT_FUNC_GEQUAL = 3,
112 MALI_ALT_FUNC_LESS = 4,
113 MALI_ALT_FUNC_NOTEQUAL = 5,
114 MALI_ALT_FUNC_LEQUAL = 6,
115 MALI_ALT_FUNC_ALWAYS = 7
116 };
117
118 /* Flags apply to unknown2_3? */
119
120 #define MALI_HAS_MSAA (1 << 0)
121 #define MALI_CAN_DISCARD (1 << 5)
122
123 /* Applies on SFBD systems, specifying that programmable blending is in use */
124 #define MALI_HAS_BLEND_SHADER (1 << 6)
125
126 /* func is mali_func */
127 #define MALI_DEPTH_FUNC(func) (func << 8)
128 #define MALI_GET_DEPTH_FUNC(flags) ((flags >> 8) & 0x7)
129 #define MALI_DEPTH_FUNC_MASK MALI_DEPTH_FUNC(0x7)
130
131 #define MALI_DEPTH_TEST (1 << 11)
132
133 /* Next flags to unknown2_4 */
134 #define MALI_STENCIL_TEST (1 << 0)
135
136 /* What?! */
137 #define MALI_SAMPLE_ALPHA_TO_COVERAGE_NO_BLEND_SHADER (1 << 1)
138
139 #define MALI_NO_DITHER (1 << 9)
140 #define MALI_DEPTH_RANGE_A (1 << 12)
141 #define MALI_DEPTH_RANGE_B (1 << 13)
142 #define MALI_NO_MSAA (1 << 14)
143
144 /* Stencil test state is all encoded in a single u32, just with a lot of
145 * enums... */
146
147 enum mali_stencil_op {
148 MALI_STENCIL_KEEP = 0,
149 MALI_STENCIL_REPLACE = 1,
150 MALI_STENCIL_ZERO = 2,
151 MALI_STENCIL_INVERT = 3,
152 MALI_STENCIL_INCR_WRAP = 4,
153 MALI_STENCIL_DECR_WRAP = 5,
154 MALI_STENCIL_INCR = 6,
155 MALI_STENCIL_DECR = 7
156 };
157
158 struct mali_stencil_test {
159 unsigned ref : 8;
160 unsigned mask : 8;
161 enum mali_func func : 3;
162 enum mali_stencil_op sfail : 3;
163 enum mali_stencil_op dpfail : 3;
164 enum mali_stencil_op dppass : 3;
165 unsigned zero : 4;
166 } __attribute__((packed));
167
168 /* Blending is a mess, since anything fancy triggers a blend shader, and
169 * -those- are not understood whatsover yet */
170
171 #define MALI_MASK_R (1 << 0)
172 #define MALI_MASK_G (1 << 1)
173 #define MALI_MASK_B (1 << 2)
174 #define MALI_MASK_A (1 << 3)
175
176 enum mali_nondominant_mode {
177 MALI_BLEND_NON_MIRROR = 0,
178 MALI_BLEND_NON_ZERO = 1
179 };
180
181 enum mali_dominant_blend {
182 MALI_BLEND_DOM_SOURCE = 0,
183 MALI_BLEND_DOM_DESTINATION = 1
184 };
185
186 enum mali_dominant_factor {
187 MALI_DOMINANT_UNK0 = 0,
188 MALI_DOMINANT_ZERO = 1,
189 MALI_DOMINANT_SRC_COLOR = 2,
190 MALI_DOMINANT_DST_COLOR = 3,
191 MALI_DOMINANT_UNK4 = 4,
192 MALI_DOMINANT_SRC_ALPHA = 5,
193 MALI_DOMINANT_DST_ALPHA = 6,
194 MALI_DOMINANT_CONSTANT = 7,
195 };
196
197 enum mali_blend_modifier {
198 MALI_BLEND_MOD_UNK0 = 0,
199 MALI_BLEND_MOD_NORMAL = 1,
200 MALI_BLEND_MOD_SOURCE_ONE = 2,
201 MALI_BLEND_MOD_DEST_ONE = 3,
202 };
203
204 struct mali_blend_mode {
205 enum mali_blend_modifier clip_modifier : 2;
206 unsigned unused_0 : 1;
207 unsigned negate_source : 1;
208
209 enum mali_dominant_blend dominant : 1;
210
211 enum mali_nondominant_mode nondominant_mode : 1;
212
213 unsigned unused_1 : 1;
214
215 unsigned negate_dest : 1;
216
217 enum mali_dominant_factor dominant_factor : 3;
218 unsigned complement_dominant : 1;
219 } __attribute__((packed));
220
221 struct mali_blend_equation {
222 /* Of type mali_blend_mode */
223 unsigned rgb_mode : 12;
224 unsigned alpha_mode : 12;
225
226 unsigned zero1 : 4;
227
228 /* Corresponds to MALI_MASK_* above and glColorMask arguments */
229
230 unsigned color_mask : 4;
231
232 /* Attached constant for CONSTANT_ALPHA, etc */
233
234 #ifndef BIFROST
235 float constant;
236 #endif
237 } __attribute__((packed));
238
239 /* Used with channel swizzling */
240 enum mali_channel {
241 MALI_CHANNEL_RED = 0,
242 MALI_CHANNEL_GREEN = 1,
243 MALI_CHANNEL_BLUE = 2,
244 MALI_CHANNEL_ALPHA = 3,
245 MALI_CHANNEL_ZERO = 4,
246 MALI_CHANNEL_ONE = 5,
247 MALI_CHANNEL_RESERVED_0 = 6,
248 MALI_CHANNEL_RESERVED_1 = 7,
249 };
250
251 struct mali_channel_swizzle {
252 enum mali_channel r : 3;
253 enum mali_channel g : 3;
254 enum mali_channel b : 3;
255 enum mali_channel a : 3;
256 } __attribute__((packed));
257
258 /* Compressed per-pixel formats. Each of these formats expands to one to four
259 * floating-point or integer numbers, as defined by the OpenGL specification.
260 * There are various places in OpenGL where the user can specify a compressed
261 * format in memory, which all use the same 8-bit enum in the various
262 * descriptors, although different hardware units support different formats.
263 */
264
265 /* The top 3 bits specify how the bits of each component are interpreted. */
266
267 /* e.g. R11F_G11F_B10F */
268 #define MALI_FORMAT_SPECIAL (2 << 5)
269
270 /* signed normalized, e.g. RGBA8_SNORM */
271 #define MALI_FORMAT_SNORM (3 << 5)
272
273 /* e.g. RGBA8UI */
274 #define MALI_FORMAT_UINT (4 << 5)
275
276 /* e.g. RGBA8 and RGBA32F */
277 #define MALI_FORMAT_UNORM (5 << 5)
278
279 /* e.g. RGBA8I and RGBA16F */
280 #define MALI_FORMAT_SINT (6 << 5)
281
282 /* These formats seem to largely duplicate the others. They're used at least
283 * for Bifrost framebuffer output.
284 */
285 #define MALI_FORMAT_SPECIAL2 (7 << 5)
286
287 /* If the high 3 bits are 3 to 6 these two bits say how many components
288 * there are.
289 */
290 #define MALI_NR_CHANNELS(n) ((n - 1) << 3)
291
292 /* If the high 3 bits are 3 to 6, then the low 3 bits say how big each
293 * component is, except the special MALI_CHANNEL_FLOAT which overrides what the
294 * bits mean.
295 */
296
297 #define MALI_CHANNEL_4 2
298
299 #define MALI_CHANNEL_8 3
300
301 #define MALI_CHANNEL_16 4
302
303 #define MALI_CHANNEL_32 5
304
305 /* For MALI_FORMAT_SINT it means a half-float (e.g. RG16F). For
306 * MALI_FORMAT_UNORM, it means a 32-bit float.
307 */
308 #define MALI_CHANNEL_FLOAT 7
309
310 enum mali_format {
311 MALI_RGB565 = MALI_FORMAT_SPECIAL | 0x0,
312 MALI_RGB5_A1_UNORM = MALI_FORMAT_SPECIAL | 0x2,
313 MALI_RGB10_A2_UNORM = MALI_FORMAT_SPECIAL | 0x3,
314 MALI_RGB10_A2_SNORM = MALI_FORMAT_SPECIAL | 0x5,
315 MALI_RGB10_A2UI = MALI_FORMAT_SPECIAL | 0x7,
316 MALI_RGB10_A2I = MALI_FORMAT_SPECIAL | 0x9,
317
318 /* YUV formats */
319 MALI_NV12 = MALI_FORMAT_SPECIAL | 0xc,
320
321 MALI_Z32_UNORM = MALI_FORMAT_SPECIAL | 0xD,
322 MALI_R32_FIXED = MALI_FORMAT_SPECIAL | 0x11,
323 MALI_RG32_FIXED = MALI_FORMAT_SPECIAL | 0x12,
324 MALI_RGB32_FIXED = MALI_FORMAT_SPECIAL | 0x13,
325 MALI_RGBA32_FIXED = MALI_FORMAT_SPECIAL | 0x14,
326 MALI_R11F_G11F_B10F = MALI_FORMAT_SPECIAL | 0x19,
327 /* Only used for varyings, to indicate the transformed gl_Position */
328 MALI_VARYING_POS = MALI_FORMAT_SPECIAL | 0x1e,
329 /* Only used for varyings, to indicate that the write should be
330 * discarded.
331 */
332 MALI_VARYING_DISCARD = MALI_FORMAT_SPECIAL | 0x1f,
333
334 MALI_R8_SNORM = MALI_FORMAT_SNORM | MALI_NR_CHANNELS(1) | MALI_CHANNEL_8,
335 MALI_R16_SNORM = MALI_FORMAT_SNORM | MALI_NR_CHANNELS(1) | MALI_CHANNEL_16,
336 MALI_R32_SNORM = MALI_FORMAT_SNORM | MALI_NR_CHANNELS(1) | MALI_CHANNEL_32,
337 MALI_RG8_SNORM = MALI_FORMAT_SNORM | MALI_NR_CHANNELS(2) | MALI_CHANNEL_8,
338 MALI_RG16_SNORM = MALI_FORMAT_SNORM | MALI_NR_CHANNELS(2) | MALI_CHANNEL_16,
339 MALI_RG32_SNORM = MALI_FORMAT_SNORM | MALI_NR_CHANNELS(2) | MALI_CHANNEL_32,
340 MALI_RGB8_SNORM = MALI_FORMAT_SNORM | MALI_NR_CHANNELS(3) | MALI_CHANNEL_8,
341 MALI_RGB16_SNORM = MALI_FORMAT_SNORM | MALI_NR_CHANNELS(3) | MALI_CHANNEL_16,
342 MALI_RGB32_SNORM = MALI_FORMAT_SNORM | MALI_NR_CHANNELS(3) | MALI_CHANNEL_32,
343 MALI_RGBA8_SNORM = MALI_FORMAT_SNORM | MALI_NR_CHANNELS(4) | MALI_CHANNEL_8,
344 MALI_RGBA16_SNORM = MALI_FORMAT_SNORM | MALI_NR_CHANNELS(4) | MALI_CHANNEL_16,
345 MALI_RGBA32_SNORM = MALI_FORMAT_SNORM | MALI_NR_CHANNELS(4) | MALI_CHANNEL_32,
346
347 MALI_R8UI = MALI_FORMAT_UINT | MALI_NR_CHANNELS(1) | MALI_CHANNEL_8,
348 MALI_R16UI = MALI_FORMAT_UINT | MALI_NR_CHANNELS(1) | MALI_CHANNEL_16,
349 MALI_R32UI = MALI_FORMAT_UINT | MALI_NR_CHANNELS(1) | MALI_CHANNEL_32,
350 MALI_RG8UI = MALI_FORMAT_UINT | MALI_NR_CHANNELS(2) | MALI_CHANNEL_8,
351 MALI_RG16UI = MALI_FORMAT_UINT | MALI_NR_CHANNELS(2) | MALI_CHANNEL_16,
352 MALI_RG32UI = MALI_FORMAT_UINT | MALI_NR_CHANNELS(2) | MALI_CHANNEL_32,
353 MALI_RGB8UI = MALI_FORMAT_UINT | MALI_NR_CHANNELS(3) | MALI_CHANNEL_8,
354 MALI_RGB16UI = MALI_FORMAT_UINT | MALI_NR_CHANNELS(3) | MALI_CHANNEL_16,
355 MALI_RGB32UI = MALI_FORMAT_UINT | MALI_NR_CHANNELS(3) | MALI_CHANNEL_32,
356 MALI_RGBA8UI = MALI_FORMAT_UINT | MALI_NR_CHANNELS(4) | MALI_CHANNEL_8,
357 MALI_RGBA16UI = MALI_FORMAT_UINT | MALI_NR_CHANNELS(4) | MALI_CHANNEL_16,
358 MALI_RGBA32UI = MALI_FORMAT_UINT | MALI_NR_CHANNELS(4) | MALI_CHANNEL_32,
359
360 MALI_R8_UNORM = MALI_FORMAT_UNORM | MALI_NR_CHANNELS(1) | MALI_CHANNEL_8,
361 MALI_R16_UNORM = MALI_FORMAT_UNORM | MALI_NR_CHANNELS(1) | MALI_CHANNEL_16,
362 MALI_R32_UNORM = MALI_FORMAT_UNORM | MALI_NR_CHANNELS(1) | MALI_CHANNEL_32,
363 MALI_R32F = MALI_FORMAT_UNORM | MALI_NR_CHANNELS(1) | MALI_CHANNEL_FLOAT,
364 MALI_RG8_UNORM = MALI_FORMAT_UNORM | MALI_NR_CHANNELS(2) | MALI_CHANNEL_8,
365 MALI_RG16_UNORM = MALI_FORMAT_UNORM | MALI_NR_CHANNELS(2) | MALI_CHANNEL_16,
366 MALI_RG32_UNORM = MALI_FORMAT_UNORM | MALI_NR_CHANNELS(2) | MALI_CHANNEL_32,
367 MALI_RG32F = MALI_FORMAT_UNORM | MALI_NR_CHANNELS(2) | MALI_CHANNEL_FLOAT,
368 MALI_RGB8_UNORM = MALI_FORMAT_UNORM | MALI_NR_CHANNELS(3) | MALI_CHANNEL_8,
369 MALI_RGB16_UNORM = MALI_FORMAT_UNORM | MALI_NR_CHANNELS(3) | MALI_CHANNEL_16,
370 MALI_RGB32_UNORM = MALI_FORMAT_UNORM | MALI_NR_CHANNELS(3) | MALI_CHANNEL_32,
371 MALI_RGB32F = MALI_FORMAT_UNORM | MALI_NR_CHANNELS(3) | MALI_CHANNEL_FLOAT,
372 MALI_RGBA4_UNORM = MALI_FORMAT_UNORM | MALI_NR_CHANNELS(4) | MALI_CHANNEL_4,
373 MALI_RGBA8_UNORM = MALI_FORMAT_UNORM | MALI_NR_CHANNELS(4) | MALI_CHANNEL_8,
374 MALI_RGBA16_UNORM = MALI_FORMAT_UNORM | MALI_NR_CHANNELS(4) | MALI_CHANNEL_16,
375 MALI_RGBA32_UNORM = MALI_FORMAT_UNORM | MALI_NR_CHANNELS(4) | MALI_CHANNEL_32,
376 MALI_RGBA32F = MALI_FORMAT_UNORM | MALI_NR_CHANNELS(4) | MALI_CHANNEL_FLOAT,
377
378 MALI_R8I = MALI_FORMAT_SINT | MALI_NR_CHANNELS(1) | MALI_CHANNEL_8,
379 MALI_R16I = MALI_FORMAT_SINT | MALI_NR_CHANNELS(1) | MALI_CHANNEL_16,
380 MALI_R32I = MALI_FORMAT_SINT | MALI_NR_CHANNELS(1) | MALI_CHANNEL_32,
381 MALI_R16F = MALI_FORMAT_SINT | MALI_NR_CHANNELS(1) | MALI_CHANNEL_FLOAT,
382 MALI_RG8I = MALI_FORMAT_SINT | MALI_NR_CHANNELS(2) | MALI_CHANNEL_8,
383 MALI_RG16I = MALI_FORMAT_SINT | MALI_NR_CHANNELS(2) | MALI_CHANNEL_16,
384 MALI_RG32I = MALI_FORMAT_SINT | MALI_NR_CHANNELS(2) | MALI_CHANNEL_32,
385 MALI_RG16F = MALI_FORMAT_SINT | MALI_NR_CHANNELS(2) | MALI_CHANNEL_FLOAT,
386 MALI_RGB8I = MALI_FORMAT_SINT | MALI_NR_CHANNELS(3) | MALI_CHANNEL_8,
387 MALI_RGB16I = MALI_FORMAT_SINT | MALI_NR_CHANNELS(3) | MALI_CHANNEL_16,
388 MALI_RGB32I = MALI_FORMAT_SINT | MALI_NR_CHANNELS(3) | MALI_CHANNEL_32,
389 MALI_RGB16F = MALI_FORMAT_SINT | MALI_NR_CHANNELS(3) | MALI_CHANNEL_FLOAT,
390 MALI_RGBA8I = MALI_FORMAT_SINT | MALI_NR_CHANNELS(4) | MALI_CHANNEL_8,
391 MALI_RGBA16I = MALI_FORMAT_SINT | MALI_NR_CHANNELS(4) | MALI_CHANNEL_16,
392 MALI_RGBA32I = MALI_FORMAT_SINT | MALI_NR_CHANNELS(4) | MALI_CHANNEL_32,
393 MALI_RGBA16F = MALI_FORMAT_SINT | MALI_NR_CHANNELS(4) | MALI_CHANNEL_FLOAT,
394
395 MALI_RGBA4 = MALI_FORMAT_SPECIAL2 | 0x8,
396 MALI_RGBA8_2 = MALI_FORMAT_SPECIAL2 | 0xd,
397 MALI_RGB10_A2_2 = MALI_FORMAT_SPECIAL2 | 0xe,
398 };
399
400
401 /* Alpha coverage is encoded as 4-bits (from a clampf), with inversion
402 * literally performing a bitwise invert. This function produces slightly wrong
403 * results and I'm not sure why; some rounding issue I suppose... */
404
405 #define MALI_ALPHA_COVERAGE(clampf) ((uint16_t) (int) (clampf * 15.0f))
406 #define MALI_GET_ALPHA_COVERAGE(nibble) ((float) nibble / 15.0f)
407
408 /* Applies to unknown1 */
409 #define MALI_NO_ALPHA_TO_COVERAGE (1 << 10)
410
411 struct mali_blend_meta {
412 #ifndef BIFROST
413 /* Base value of 0x200.
414 * OR with 0x1 for blending (anything other than REPLACE).
415 * OR with 0x2 for programmable blending
416 */
417
418 u64 unk1;
419
420 /* For programmable blending, these turn into the blend_shader address */
421 struct mali_blend_equation blend_equation_1;
422
423 u64 zero2;
424 struct mali_blend_equation blend_equation_2;
425 #else
426 u32 unk1; // = 0x200
427 struct mali_blend_equation blend_equation;
428 /*
429 * - 0x19 normally
430 * - 0x3 when this slot is unused (everything else is 0 except the index)
431 * - 0x11 when this is the fourth slot (and it's used)
432 + * - 0 when there is a blend shader
433 */
434 u16 unk2;
435 /* increments from 0 to 3 */
436 u16 index;
437
438 union {
439 struct {
440 /* So far, I've only seen:
441 * - R001 for 1-component formats
442 * - RG01 for 2-component formats
443 * - RGB1 for 3-component formats
444 * - RGBA for 4-component formats
445 */
446 u32 swizzle : 12;
447 enum mali_format format : 8;
448
449 /* Type of the shader output variable. Note, this can
450 * be different from the format.
451 *
452 * 0: f16 (mediump float)
453 * 1: f32 (highp float)
454 * 2: i32 (highp int)
455 * 3: u32 (highp uint)
456 * 4: i16 (mediump int)
457 * 5: u16 (mediump uint)
458 */
459 u32 shader_type : 3;
460 u32 zero : 9;
461 };
462
463 /* Only the low 32 bits of the blend shader are stored, the
464 * high 32 bits are implicitly the same as the original shader.
465 * According to the kernel driver, the program counter for
466 * shaders is actually only 24 bits, so shaders cannot cross
467 * the 2^24-byte boundary, and neither can the blend shader.
468 * The blob handles this by allocating a 2^24 byte pool for
469 * shaders, and making sure that any blend shaders are stored
470 * in the same pool as the original shader. The kernel will
471 * make sure this allocation is aligned to 2^24 bytes.
472 */
473 u32 blend_shader;
474 };
475 #endif
476 } __attribute__((packed));
477
478 struct mali_shader_meta {
479 mali_ptr shader;
480 u16 texture_count;
481 u16 sampler_count;
482 u16 attribute_count;
483 u16 varying_count;
484
485 union {
486 struct {
487 u32 uniform_buffer_count : 4;
488 u32 unk1 : 28; // = 0x800000 for vertex, 0x958020 for tiler
489 } bifrost1;
490 struct {
491 /* 0x200 except MALI_NO_ALPHA_TO_COVERAGE. Mysterious 1
492 * other times. Who knows really? */
493 u16 unknown1;
494
495 /* Whole number of uniform registers used, times two;
496 * whole number of work registers used (no scale).
497 */
498 unsigned work_count : 5;
499 unsigned uniform_count : 5;
500 unsigned unknown2 : 6;
501 } midgard1;
502 };
503
504 /* On bifrost: Exactly the same as glPolygonOffset() for both.
505 * On midgard: Depth factor is exactly as passed to glPolygonOffset.
506 * Depth units is equal to the value passed to glDeptOhffset + 1.0f
507 * (use MALI_NEGATIVE)
508 */
509 float depth_units;
510 float depth_factor;
511
512 u32 unknown2_2;
513
514 u16 alpha_coverage;
515 u16 unknown2_3;
516
517 u8 stencil_mask_front;
518 u8 stencil_mask_back;
519 u16 unknown2_4;
520
521 struct mali_stencil_test stencil_front;
522 struct mali_stencil_test stencil_back;
523
524 union {
525 struct {
526 u32 unk3 : 7;
527 /* On Bifrost, some system values are preloaded in
528 * registers R55-R62 by the thread dispatcher prior to
529 * the start of shader execution. This is a bitfield
530 * with one entry for each register saying which
531 * registers need to be preloaded. Right now, the known
532 * values are:
533 *
534 * Vertex/compute:
535 * - R55 : gl_LocalInvocationID.xy
536 * - R56 : gl_LocalInvocationID.z + unknown in high 16 bits
537 * - R57 : gl_WorkGroupID.x
538 * - R58 : gl_WorkGroupID.y
539 * - R59 : gl_WorkGroupID.z
540 * - R60 : gl_GlobalInvocationID.x
541 * - R61 : gl_GlobalInvocationID.y/gl_VertexID (without base)
542 * - R62 : gl_GlobalInvocationID.z/gl_InstanceID (without base)
543 *
544 * Fragment:
545 * - R55 : unknown, never seen (but the bit for this is
546 * always set?)
547 * - R56 : unknown (bit always unset)
548 * - R57 : gl_PrimitiveID
549 * - R58 : gl_FrontFacing in low bit, potentially other stuff
550 * - R59 : u16 fragment coordinates (used to compute
551 * gl_FragCoord.xy, together with sample positions)
552 * - R60 : gl_SampleMask (used in epilog, so pretty
553 * much always used, but the bit is always 0 -- is
554 * this just always pushed?)
555 * - R61 : gl_SampleMaskIn and gl_SampleID, used by
556 * varying interpolation.
557 * - R62 : unknown (bit always unset).
558 */
559 u32 preload_regs : 8;
560 /* In units of 8 bytes or 64 bits, since the
561 * uniform/const port loads 64 bits at a time.
562 */
563 u32 uniform_count : 7;
564 u32 unk4 : 10; // = 2
565 } bifrost2;
566 struct {
567 u32 unknown2_7;
568 } midgard2;
569 };
570
571 /* zero on bifrost */
572 u32 unknown2_8;
573
574 /* Blending information for the older non-MRT Midgard HW. Check for
575 * MALI_HAS_BLEND_SHADER to decide how to interpret.
576 */
577
578 union {
579 mali_ptr blend_shader;
580 struct mali_blend_equation blend_equation;
581 };
582
583 /* There can be up to 4 blend_meta's. None of them are required for
584 * vertex shaders or the non-MRT case for Midgard (so the blob doesn't
585 * allocate any space).
586 */
587 struct mali_blend_meta blend_meta[];
588
589 } __attribute__((packed));
590
591 /* This only concerns hardware jobs */
592
593 /* Possible values for job_descriptor_size */
594
595 #define MALI_JOB_32 0
596 #define MALI_JOB_64 1
597
598 struct mali_job_descriptor_header {
599 u32 exception_status;
600 u32 first_incomplete_task;
601 u64 fault_pointer;
602 u8 job_descriptor_size : 1;
603 enum mali_job_type job_type : 7;
604 u8 job_barrier : 1;
605 u8 unknown_flags : 7;
606 u16 job_index;
607 u16 job_dependency_index_1;
608 u16 job_dependency_index_2;
609
610 union {
611 u64 next_job_64;
612 u32 next_job_32;
613 };
614 } __attribute__((packed));
615
616 struct mali_payload_set_value {
617 u64 out;
618 u64 unknown;
619 } __attribute__((packed));
620
621 /* Special attributes have a fixed index */
622 #define MALI_SPECIAL_ATTRIBUTE_BASE 16
623 #define MALI_VERTEX_ID (MALI_SPECIAL_ATTRIBUTE_BASE + 0)
624 #define MALI_INSTANCE_ID (MALI_SPECIAL_ATTRIBUTE_BASE + 1)
625
626 /*
627 * Mali Attributes
628 *
629 * This structure lets the attribute unit compute the address of an attribute
630 * given the vertex and instance ID. Unfortunately, the way this works is
631 * rather complicated when instancing is enabled.
632 *
633 * To explain this, first we need to explain how compute and vertex threads are
634 * dispatched. This is a guess (although a pretty firm guess!) since the
635 * details are mostly hidden from the driver, except for attribute instancing.
636 * When a quad is dispatched, it receives a single, linear index. However, we
637 * need to translate that index into a (vertex id, instance id) pair, or a
638 * (local id x, local id y, local id z) triple for compute shaders (although
639 * vertex shaders and compute shaders are handled almost identically).
640 * Focusing on vertex shaders, one option would be to do:
641 *
642 * vertex_id = linear_id % num_vertices
643 * instance_id = linear_id / num_vertices
644 *
645 * but this involves a costly division and modulus by an arbitrary number.
646 * Instead, we could pad num_vertices. We dispatch padded_num_vertices *
647 * num_instances threads instead of num_vertices * num_instances, which results
648 * in some "extra" threads with vertex_id >= num_vertices, which we have to
649 * discard. The more we pad num_vertices, the more "wasted" threads we
650 * dispatch, but the division is potentially easier.
651 *
652 * One straightforward choice is to pad num_vertices to the next power of two,
653 * which means that the division and modulus are just simple bit shifts and
654 * masking. But the actual algorithm is a bit more complicated. The thread
655 * dispatcher has special support for dividing by 3, 5, 7, and 9, in addition
656 * to dividing by a power of two. This is possibly using the technique
657 * described in patent US20170010862A1. As a result, padded_num_vertices can be
658 * 1, 3, 5, 7, or 9 times a power of two. This results in less wasted threads,
659 * since we need less padding.
660 *
661 * padded_num_vertices is picked by the hardware. The driver just specifies the
662 * actual number of vertices. At least for Mali G71, the first few cases are
663 * given by:
664 *
665 * num_vertices | padded_num_vertices
666 * 3 | 4
667 * 4-7 | 8
668 * 8-11 | 12 (3 * 4)
669 * 12-15 | 16
670 * 16-19 | 20 (5 * 4)
671 *
672 * Note that padded_num_vertices is a multiple of four (presumably because
673 * threads are dispatched in groups of 4). Also, padded_num_vertices is always
674 * at least one more than num_vertices, which seems like a quirk of the
675 * hardware. For larger num_vertices, the hardware uses the following
676 * algorithm: using the binary representation of num_vertices, we look at the
677 * most significant set bit as well as the following 3 bits. Let n be the
678 * number of bits after those 4 bits. Then we set padded_num_vertices according
679 * to the following table:
680 *
681 * high bits | padded_num_vertices
682 * 1000 | 9 * 2^n
683 * 1001 | 5 * 2^(n+1)
684 * 101x | 3 * 2^(n+2)
685 * 110x | 7 * 2^(n+1)
686 * 111x | 2^(n+4)
687 *
688 * For example, if num_vertices = 70 is passed to glDraw(), its binary
689 * representation is 1000110, so n = 3 and the high bits are 1000, and
690 * therefore padded_num_vertices = 9 * 2^3 = 72.
691 *
692 * The attribute unit works in terms of the original linear_id. if
693 * num_instances = 1, then they are the same, and everything is simple.
694 * However, with instancing things get more complicated. There are four
695 * possible modes, two of them we can group together:
696 *
697 * 1. Use the linear_id directly. Only used when there is no instancing.
698 *
699 * 2. Use the linear_id modulo a constant. This is used for per-vertex
700 * attributes with instancing enabled by making the constant equal
701 * padded_num_vertices. Because the modulus is always padded_num_vertices, this
702 * mode only supports a modulus that is a power of 2 times 1, 3, 5, 7, or 9.
703 * The shift field specifies the power of two, while the extra_flags field
704 * specifies the odd number. If shift = n and extra_flags = m, then the modulus
705 * is (2m + 1) * 2^n. As an example, if num_vertices = 70, then as computed
706 * above, padded_num_vertices = 9 * 2^3, so we should set extra_flags = 4 and
707 * shift = 3. Note that we must exactly follow the hardware algorithm used to
708 * get padded_num_vertices in order to correctly implement per-vertex
709 * attributes.
710 *
711 * 3. Divide the linear_id by a constant. In order to correctly implement
712 * instance divisors, we have to divide linear_id by padded_num_vertices times
713 * to user-specified divisor. So first we compute padded_num_vertices, again
714 * following the exact same algorithm that the hardware uses, then multiply it
715 * by the GL-level divisor to get the hardware-level divisor. This case is
716 * further divided into two more cases. If the hardware-level divisor is a
717 * power of two, then we just need to shift. The shift amount is specified by
718 * the shift field, so that the hardware-level divisor is just 2^shift.
719 *
720 * If it isn't a power of two, then we have to divide by an arbitrary integer.
721 * For that, we use the well-known technique of multiplying by an approximation
722 * of the inverse. The driver must compute the magic multiplier and shift
723 * amount, and then the hardware does the multiplication and shift. The
724 * hardware and driver also use the "round-down" optimization as described in
725 * http://ridiculousfish.com/files/faster_unsigned_division_by_constants.pdf.
726 * The hardware further assumes the multiplier is between 2^31 and 2^32, so the
727 * high bit is implicitly set to 1 even though it is set to 0 by the driver --
728 * presumably this simplifies the hardware multiplier a little. The hardware
729 * first multiplies linear_id by the multiplier and takes the high 32 bits,
730 * then applies the round-down correction if extra_flags = 1, then finally
731 * shifts right by the shift field.
732 *
733 * There are some differences between ridiculousfish's algorithm and the Mali
734 * hardware algorithm, which means that the reference code from ridiculousfish
735 * doesn't always produce the right constants. Mali does not use the pre-shift
736 * optimization, since that would make a hardware implementation slower (it
737 * would have to always do the pre-shift, multiply, and post-shift operations).
738 * It also forces the multplier to be at least 2^31, which means that the
739 * exponent is entirely fixed, so there is no trial-and-error. Altogether,
740 * given the divisor d, the algorithm the driver must follow is:
741 *
742 * 1. Set shift = floor(log2(d)).
743 * 2. Compute m = ceil(2^(shift + 32) / d) and e = 2^(shift + 32) % d.
744 * 3. If e <= 2^shift, then we need to use the round-down algorithm. Set
745 * magic_divisor = m - 1 and extra_flags = 1.
746 * 4. Otherwise, set magic_divisor = m and extra_flags = 0.
747 */
748
749 enum mali_attr_mode {
750 MALI_ATTR_UNUSED = 0,
751 MALI_ATTR_LINEAR = 1,
752 MALI_ATTR_POT_DIVIDE = 2,
753 MALI_ATTR_MODULO = 3,
754 MALI_ATTR_NPOT_DIVIDE = 4,
755 };
756
757 union mali_attr {
758 /* This is used for actual attributes. */
759 struct {
760 /* The bottom 3 bits are the mode */
761 mali_ptr elements : 64 - 8;
762 u32 shift : 5;
763 u32 extra_flags : 3;
764 u32 stride;
765 u32 size;
766 };
767 /* The entry after an NPOT_DIVIDE entry has this format. It stores
768 * extra information that wouldn't fit in a normal entry.
769 */
770 struct {
771 u32 unk; /* = 0x20 */
772 u32 magic_divisor;
773 u32 zero;
774 /* This is the original, GL-level divisor. */
775 u32 divisor;
776 };
777 } __attribute__((packed));
778
779 struct mali_attr_meta {
780 /* Vertex buffer index */
781 u8 index;
782
783 unsigned unknown1 : 2;
784 unsigned swizzle : 12;
785 enum mali_format format : 8;
786
787 /* Always observed to be zero at the moment */
788 unsigned unknown3 : 2;
789
790 /* When packing multiple attributes in a buffer, offset addresses by this value */
791 uint32_t src_offset;
792 } __attribute__((packed));
793
794 enum mali_fbd_type {
795 MALI_SFBD = 0,
796 MALI_MFBD = 1,
797 };
798
799 #define FBD_TYPE (1)
800 #define FBD_MASK (~0x3f)
801
802 struct mali_uniform_buffer_meta {
803 /* This is actually the size minus 1 (MALI_POSITIVE), in units of 16
804 * bytes. This gives a maximum of 2^14 bytes, which just so happens to
805 * be the GL minimum-maximum for GL_MAX_UNIFORM_BLOCK_SIZE.
806 */
807 u64 size : 10;
808
809 /* This is missing the bottom 2 bits and top 8 bits. The top 8 bits
810 * should be 0 for userspace pointers, according to
811 * https://lwn.net/Articles/718895/. By reusing these bits, we can make
812 * each entry in the table only 64 bits.
813 */
814 mali_ptr ptr : 64 - 10;
815 };
816
817 /* On Bifrost, these fields are the same between the vertex and tiler payloads.
818 * They also seem to be the same between Bifrost and Midgard. They're shared in
819 * fused payloads.
820 */
821
822 /* Applies to unknown_draw */
823
824 #define MALI_DRAW_INDEXED_UINT8 (0x10)
825 #define MALI_DRAW_INDEXED_UINT16 (0x20)
826 #define MALI_DRAW_INDEXED_UINT32 (0x30)
827 #define MALI_DRAW_VARYING_SIZE (0x100)
828 #define MALI_DRAW_PRIMITIVE_RESTART_FIXED_INDEX (0x10000)
829
830 struct mali_vertex_tiler_prefix {
831 /* This is a dynamic bitfield containing the following things in this order:
832 *
833 * - gl_WorkGroupSize.x
834 * - gl_WorkGroupSize.y
835 * - gl_WorkGroupSize.z
836 * - gl_NumWorkGroups.x
837 * - gl_NumWorkGroups.y
838 * - gl_NumWorkGroups.z
839 *
840 * The number of bits allocated for each number is based on the *_shift
841 * fields below. For example, workgroups_y_shift gives the bit that
842 * gl_NumWorkGroups.y starts at, and workgroups_z_shift gives the bit
843 * that gl_NumWorkGroups.z starts at (and therefore one after the bit
844 * that gl_NumWorkGroups.y ends at). The actual value for each gl_*
845 * value is one more than the stored value, since if any of the values
846 * are zero, then there would be no invocations (and hence no job). If
847 * there were 0 bits allocated to a given field, then it must be zero,
848 * and hence the real value is one.
849 *
850 * Vertex jobs reuse the same job dispatch mechanism as compute jobs,
851 * effectively doing glDispatchCompute(1, vertex_count, instance_count)
852 * where vertex count is the number of vertices.
853 */
854 u32 invocation_count;
855
856 u32 size_y_shift : 5;
857 u32 size_z_shift : 5;
858 u32 workgroups_x_shift : 6;
859 u32 workgroups_y_shift : 6;
860 u32 workgroups_z_shift : 6;
861 /* This is max(workgroups_x_shift, 2) in all the cases I've seen. */
862 u32 workgroups_x_shift_2 : 4;
863
864 u32 draw_mode : 4;
865 u32 unknown_draw : 22;
866
867 /* This is the the same as workgroups_x_shift_2 in compute shaders, but
868 * always 5 for vertex jobs and 6 for tiler jobs. I suspect this has
869 * something to do with how many quads get put in the same execution
870 * engine, which is a balance (you don't want to starve the engine, but
871 * you also want to distribute work evenly).
872 */
873 u32 workgroups_x_shift_3 : 6;
874
875
876 /* Negative of draw_start for TILER jobs from what I've seen */
877 int32_t negative_start;
878 u32 zero1;
879
880 /* Like many other strictly nonzero quantities, index_count is
881 * subtracted by one. For an indexed cube, this is equal to 35 = 6
882 * faces * 2 triangles/per face * 3 vertices/per triangle - 1. That is,
883 * for an indexed draw, index_count is the number of actual vertices
884 * rendered whereas invocation_count is the number of unique vertices
885 * rendered (the number of times the vertex shader must be invoked).
886 * For non-indexed draws, this is just equal to invocation_count. */
887
888 u32 index_count;
889
890 /* No hidden structure; literally just a pointer to an array of uint
891 * indices (width depends on flags). Thanks, guys, for not making my
892 * life insane for once! NULL for non-indexed draws. */
893
894 uintptr_t indices;
895 } __attribute__((packed));
896
897 /* Point size / line width can either be specified as a 32-bit float (for
898 * constant size) or as a [machine word size]-bit GPU pointer (for varying size). If a pointer
899 * is selected, by setting the appropriate MALI_DRAW_VARYING_SIZE bit in the tiler
900 * payload, the contents of varying_pointer will be intepreted as an array of
901 * fp16 sizes, one for each vertex. gl_PointSize is therefore implemented by
902 * creating a special MALI_R16F varying writing to varying_pointer. */
903
904 union midgard_primitive_size {
905 float constant;
906 uintptr_t pointer;
907 };
908
909 struct bifrost_vertex_only {
910 u32 unk2; /* =0x2 */
911
912 u32 zero0;
913
914 u64 zero1;
915 } __attribute__((packed));
916
917 struct bifrost_tiler_heap_meta {
918 u32 zero;
919 u32 heap_size;
920 /* note: these are just guesses! */
921 mali_ptr tiler_heap_start;
922 mali_ptr tiler_heap_free;
923 mali_ptr tiler_heap_end;
924
925 /* hierarchy weights? but they're still 0 after the job has run... */
926 u32 zeros[12];
927 } __attribute__((packed));
928
929 struct bifrost_tiler_meta {
930 u64 zero0;
931 u32 unk; // = 0xf0
932 u16 width;
933 u16 height;
934 u64 zero1;
935 mali_ptr tiler_heap_meta;
936 /* TODO what is this used for? */
937 u64 zeros[20];
938 } __attribute__((packed));
939
940 struct bifrost_tiler_only {
941 /* 0x20 */
942 union midgard_primitive_size primitive_size;
943
944 mali_ptr tiler_meta;
945
946 u64 zero1, zero2, zero3, zero4, zero5, zero6;
947
948 u32 gl_enables;
949 u32 zero7;
950 u64 zero8;
951 } __attribute__((packed));
952
953 struct bifrost_scratchpad {
954 u32 zero;
955 u32 flags; // = 0x1f
956 /* This is a pointer to a CPU-inaccessible buffer, 16 pages, allocated
957 * during startup. It seems to serve the same purpose as the
958 * gpu_scratchpad in the SFBD for Midgard, although it's slightly
959 * larger.
960 */
961 mali_ptr gpu_scratchpad;
962 } __attribute__((packed));
963
964 struct mali_vertex_tiler_postfix {
965 /* Zero for vertex jobs. Pointer to the position (gl_Position) varying
966 * output from the vertex shader for tiler jobs.
967 */
968
969 uintptr_t position_varying;
970
971 /* An array of mali_uniform_buffer_meta's. The size is given by the
972 * shader_meta.
973 */
974 uintptr_t uniform_buffers;
975
976 /* This is a pointer to an array of pointers to the texture
977 * descriptors, number of pointers bounded by number of textures. The
978 * indirection is needed to accomodate varying numbers and sizes of
979 * texture descriptors */
980 uintptr_t texture_trampoline;
981
982 /* For OpenGL, from what I've seen, this is intimately connected to
983 * texture_meta. cwabbott says this is not the case under Vulkan, hence
984 * why this field is seperate (Midgard is Vulkan capable). Pointer to
985 * array of sampler descriptors (which are uniform in size) */
986 uintptr_t sampler_descriptor;
987
988 uintptr_t uniforms;
989 u8 flags : 4;
990 uintptr_t _shader_upper : MALI_SHORT_PTR_BITS - 4; /* struct shader_meta */
991 uintptr_t attributes; /* struct attribute_buffer[] */
992 uintptr_t attribute_meta; /* attribute_meta[] */
993 uintptr_t varyings; /* struct attr */
994 uintptr_t varying_meta; /* pointer */
995 uintptr_t viewport;
996 uintptr_t occlusion_counter; /* A single bit as far as I can tell */
997
998 /* Note: on Bifrost, this isn't actually the FBD. It points to
999 * bifrost_scratchpad instead. However, it does point to the same thing
1000 * in vertex and tiler jobs.
1001 */
1002 mali_ptr framebuffer;
1003
1004 #ifdef __LP64__
1005 #ifdef BIFROST
1006 /* most likely padding to make this a multiple of 64 bytes */
1007 u64 zero7;
1008 #endif
1009 #endif
1010 } __attribute__((packed));
1011
1012 struct midgard_payload_vertex_tiler {
1013 #ifndef __LP64__
1014 union midgard_primitive_size primitive_size;
1015 #endif
1016
1017 struct mali_vertex_tiler_prefix prefix;
1018
1019 #ifndef __LP64__
1020 u32 zero3;
1021 #endif
1022
1023 u32 gl_enables; // 0x5
1024
1025 /* Offset for first vertex in buffer */
1026 u32 draw_start;
1027
1028 uintptr_t zero5;
1029
1030 struct mali_vertex_tiler_postfix postfix;
1031
1032 #ifdef __LP64__
1033 union midgard_primitive_size primitive_size;
1034 #endif
1035 } __attribute__((packed));
1036
1037 struct bifrost_payload_vertex {
1038 struct mali_vertex_tiler_prefix prefix;
1039 struct bifrost_vertex_only vertex;
1040 struct mali_vertex_tiler_postfix postfix;
1041 } __attribute__((packed));
1042
1043 struct bifrost_payload_tiler {
1044 struct mali_vertex_tiler_prefix prefix;
1045 struct bifrost_tiler_only tiler;
1046 struct mali_vertex_tiler_postfix postfix;
1047 } __attribute__((packed));
1048
1049 struct bifrost_payload_fused {
1050 struct mali_vertex_tiler_prefix prefix;
1051 struct bifrost_tiler_only tiler;
1052 struct mali_vertex_tiler_postfix tiler_postfix;
1053 struct bifrost_vertex_only vertex;
1054 struct mali_vertex_tiler_postfix vertex_postfix;
1055 } __attribute__((packed));
1056
1057 /* Pointed to from texture_trampoline, mostly unknown still, haven't
1058 * managed to replay successfully */
1059
1060 /* Purposeful off-by-one in width, height fields. For example, a (64, 64)
1061 * texture is stored as (63, 63) in these fields. This adjusts for that.
1062 * There's an identical pattern in the framebuffer descriptor. Even vertex
1063 * count fields work this way, hence the generic name -- integral fields that
1064 * are strictly positive generally need this adjustment. */
1065
1066 #define MALI_POSITIVE(dim) (dim - 1)
1067
1068 /* Opposite of MALI_POSITIVE, found in the depth_units field */
1069
1070 #define MALI_NEGATIVE(dim) (dim + 1)
1071
1072 /* Used with wrapping. Incomplete (this is a 4-bit field...) */
1073
1074 enum mali_wrap_mode {
1075 MALI_WRAP_REPEAT = 0x8,
1076 MALI_WRAP_CLAMP_TO_EDGE = 0x9,
1077 MALI_WRAP_CLAMP_TO_BORDER = 0xB,
1078 MALI_WRAP_MIRRORED_REPEAT = 0xC
1079 };
1080
1081 /* 8192x8192 */
1082 #define MAX_MIP_LEVELS (13)
1083
1084 /* Cubemap bloats everything up */
1085 #define MAX_FACES (6)
1086
1087 /* Corresponds to the type passed to glTexImage2D and so forth */
1088
1089 struct mali_texture_format {
1090 unsigned swizzle : 12;
1091 enum mali_format format : 8;
1092
1093 unsigned usage1 : 3;
1094 unsigned is_not_cubemap : 1;
1095 unsigned usage2 : 8;
1096 } __attribute__((packed));
1097
1098 struct mali_texture_descriptor {
1099 uint16_t width;
1100 uint16_t height;
1101 uint16_t depth;
1102
1103 uint16_t unknown1;
1104
1105 struct mali_texture_format format;
1106
1107 uint16_t unknown3;
1108
1109 /* One for non-mipmapped, zero for mipmapped */
1110 uint8_t unknown3A;
1111
1112 /* Zero for non-mipmapped, (number of levels - 1) for mipmapped */
1113 uint8_t nr_mipmap_levels;
1114
1115 /* Swizzling is a single 32-bit word, broken up here for convenience.
1116 * Here, swizzling refers to the ES 3.0 texture parameters for channel
1117 * level swizzling, not the internal pixel-level swizzling which is
1118 * below OpenGL's reach */
1119
1120 unsigned swizzle : 12;
1121 unsigned swizzle_zero : 20;
1122
1123 uint32_t unknown5;
1124 uint32_t unknown6;
1125 uint32_t unknown7;
1126
1127 mali_ptr swizzled_bitmaps[MAX_MIP_LEVELS * MAX_FACES];
1128 } __attribute__((packed));
1129
1130 /* Used as part of filter_mode */
1131
1132 #define MALI_LINEAR 0
1133 #define MALI_NEAREST 1
1134 #define MALI_MIP_LINEAR (0x18)
1135
1136 /* Used to construct low bits of filter_mode */
1137
1138 #define MALI_TEX_MAG(mode) (((mode) & 1) << 0)
1139 #define MALI_TEX_MIN(mode) (((mode) & 1) << 1)
1140
1141 #define MALI_TEX_MAG_MASK (1)
1142 #define MALI_TEX_MIN_MASK (2)
1143
1144 #define MALI_FILTER_NAME(filter) (filter ? "MALI_NEAREST" : "MALI_LINEAR")
1145
1146 /* Used for lod encoding. Thanks @urjaman for pointing out these routines can
1147 * be cleaned up a lot. */
1148
1149 #define DECODE_FIXED_16(x) ((float) (x / 256.0))
1150
1151 static inline uint16_t
FIXED_16(float x)1152 FIXED_16(float x)
1153 {
1154 /* Clamp inputs, accounting for float error */
1155 float max_lod = (32.0 - (1.0 / 512.0));
1156
1157 x = ((x > max_lod) ? max_lod : ((x < 0.0) ? 0.0 : x));
1158
1159 return (int) (x * 256.0);
1160 }
1161
1162 struct mali_sampler_descriptor {
1163 uint32_t filter_mode;
1164
1165 /* Fixed point. Upper 8-bits is before the decimal point, although it
1166 * caps [0-31]. Lower 8-bits is after the decimal point: int(round(x *
1167 * 256)) */
1168
1169 uint16_t min_lod;
1170 uint16_t max_lod;
1171
1172 /* All one word in reality, but packed a bit */
1173
1174 enum mali_wrap_mode wrap_s : 4;
1175 enum mali_wrap_mode wrap_t : 4;
1176 enum mali_wrap_mode wrap_r : 4;
1177 enum mali_alt_func compare_func : 3;
1178
1179 /* A single set bit of unknown, ha! */
1180 unsigned unknown2 : 1;
1181
1182 unsigned zero : 16;
1183
1184 uint32_t zero2;
1185 float border_color[4];
1186 } __attribute__((packed));
1187
1188 /* TODO: What are the floats? Apparently always { -inf, -inf, inf, inf },
1189 * unless the scissor test is enabled.
1190 *
1191 * viewport0/viewport1 form the arguments to glViewport. viewport1 is modified
1192 * by MALI_POSITIVE; viewport0 is as-is.
1193 */
1194
1195 struct mali_viewport {
1196 /* XY clipping planes */
1197 float clip_minx;
1198 float clip_miny;
1199 float clip_maxx;
1200 float clip_maxy;
1201
1202 /* Depth clipping planes */
1203 float clip_minz;
1204 float clip_maxz;
1205
1206 u16 viewport0[2];
1207 u16 viewport1[2];
1208 } __attribute__((packed));
1209
1210 /* TODO: Varying meta is symmetrical with attr_meta, but there is some
1211 * weirdness associated. Figure it out. */
1212
1213 struct mali_unknown6 {
1214 u64 unknown0;
1215 u64 unknown1;
1216 };
1217
1218 /* From presentations, 16x16 tiles externally. Use shift for fast computation
1219 * of tile numbers. */
1220
1221 #define MALI_TILE_SHIFT 4
1222 #define MALI_TILE_LENGTH (1 << MALI_TILE_SHIFT)
1223
1224 /* Tile coordinates are stored as a compact u32, as only 12 bits are needed to
1225 * each component. Notice that this provides a theoretical upper bound of (1 <<
1226 * 12) = 4096 tiles in each direction, addressing a maximum framebuffer of size
1227 * 65536x65536. Multiplying that together, times another four given that Mali
1228 * framebuffers are 32-bit ARGB8888, means that this upper bound would take 16
1229 * gigabytes of RAM just to store the uncompressed framebuffer itself, let
1230 * alone rendering in real-time to such a buffer.
1231 *
1232 * Nice job, guys.*/
1233
1234 /* From mali_kbase_10969_workaround.c */
1235 #define MALI_X_COORD_MASK 0x00000FFF
1236 #define MALI_Y_COORD_MASK 0x0FFF0000
1237
1238 /* Extract parts of a tile coordinate */
1239
1240 #define MALI_TILE_COORD_X(coord) ((coord) & MALI_X_COORD_MASK)
1241 #define MALI_TILE_COORD_Y(coord) (((coord) & MALI_Y_COORD_MASK) >> 16)
1242 #define MALI_TILE_COORD_FLAGS(coord) ((coord) & ~(MALI_X_COORD_MASK | MALI_Y_COORD_MASK))
1243
1244 /* No known flags yet, but just in case...? */
1245
1246 #define MALI_TILE_NO_FLAG (0)
1247
1248 /* Helpers to generate tile coordinates based on the boundary coordinates in
1249 * screen space. So, with the bounds (0, 0) to (128, 128) for the screen, these
1250 * functions would convert it to the bounding tiles (0, 0) to (7, 7).
1251 * Intentional "off-by-one"; finding the tile number is a form of fencepost
1252 * problem. */
1253
1254 #define MALI_MAKE_TILE_COORDS(X, Y) ((X) | ((Y) << 16))
1255 #define MALI_BOUND_TO_TILE(B, bias) ((B - bias) >> MALI_TILE_SHIFT)
1256 #define MALI_COORDINATE_TO_TILE(W, H, bias) MALI_MAKE_TILE_COORDS(MALI_BOUND_TO_TILE(W, bias), MALI_BOUND_TO_TILE(H, bias))
1257 #define MALI_COORDINATE_TO_TILE_MIN(W, H) MALI_COORDINATE_TO_TILE(W, H, 0)
1258 #define MALI_COORDINATE_TO_TILE_MAX(W, H) MALI_COORDINATE_TO_TILE(W, H, 1)
1259
1260 struct mali_payload_fragment {
1261 u32 min_tile_coord;
1262 u32 max_tile_coord;
1263 mali_ptr framebuffer;
1264 } __attribute__((packed));
1265
1266 /* (Single?) Framebuffer Descriptor */
1267
1268 /* Flags apply to format. With just MSAA_A and MSAA_B, the framebuffer is
1269 * configured for 4x. With MSAA_8, it is configured for 8x. */
1270
1271 #define MALI_FRAMEBUFFER_MSAA_8 (1 << 3)
1272 #define MALI_FRAMEBUFFER_MSAA_A (1 << 4)
1273 #define MALI_FRAMEBUFFER_MSAA_B (1 << 23)
1274
1275 /* Fast/slow based on whether all three buffers are cleared at once */
1276
1277 #define MALI_CLEAR_FAST (1 << 18)
1278 #define MALI_CLEAR_SLOW (1 << 28)
1279 #define MALI_CLEAR_SLOW_STENCIL (1 << 31)
1280
1281 struct mali_single_framebuffer {
1282 u32 unknown1;
1283 u32 unknown2;
1284 u64 unknown_address_0;
1285 u64 zero1;
1286 u64 zero0;
1287
1288 /* Exact format is ironically not known, since EGL is finnicky with the
1289 * blob. MSAA, colourspace, etc are configured here. */
1290
1291 u32 format;
1292
1293 u32 clear_flags;
1294 u32 zero2;
1295
1296 /* Purposeful off-by-one in these fields should be accounted for by the
1297 * MALI_DIMENSION macro */
1298
1299 u16 width;
1300 u16 height;
1301
1302 u32 zero3[8];
1303
1304 /* By default, the framebuffer is upside down from OpenGL's
1305 * perspective. Set framebuffer to the end and negate the stride to
1306 * flip in the Y direction */
1307
1308 mali_ptr framebuffer;
1309 int32_t stride;
1310
1311 u32 zero4;
1312
1313 /* Depth and stencil buffers are interleaved, it appears, as they are
1314 * set to the same address in captures. Both fields set to zero if the
1315 * buffer is not being cleared. Depending on GL_ENABLE magic, you might
1316 * get a zero enable despite the buffer being present; that still is
1317 * disabled. */
1318
1319 mali_ptr depth_buffer; // not SAME_VA
1320 u64 depth_buffer_enable;
1321
1322 mali_ptr stencil_buffer; // not SAME_VA
1323 u64 stencil_buffer_enable;
1324
1325 u32 clear_color_1; // RGBA8888 from glClear, actually used by hardware
1326 u32 clear_color_2; // always equal, but unclear function?
1327 u32 clear_color_3; // always equal, but unclear function?
1328 u32 clear_color_4; // always equal, but unclear function?
1329
1330 /* Set to zero if not cleared */
1331
1332 float clear_depth_1; // float32, ditto
1333 float clear_depth_2; // float32, ditto
1334 float clear_depth_3; // float32, ditto
1335 float clear_depth_4; // float32, ditto
1336
1337 u32 clear_stencil; // Exactly as it appears in OpenGL
1338
1339 u32 zero6[7];
1340
1341 /* Very weird format, see generation code in trans_builder.c */
1342 u32 resolution_check;
1343
1344 u32 tiler_flags;
1345
1346 u64 unknown_address_1; /* Pointing towards... a zero buffer? */
1347 u64 unknown_address_2;
1348
1349 /* See mali_kbase_replay.c */
1350 u64 tiler_heap_free;
1351 u64 tiler_heap_end;
1352
1353 /* More below this, maybe */
1354 } __attribute__((packed));
1355
1356 /* Format bits for the render target flags */
1357
1358 #define MALI_MFBD_FORMAT_AFBC (1 << 5)
1359 #define MALI_MFBD_FORMAT_MSAA (1 << 7)
1360
1361 struct mali_rt_format {
1362 unsigned unk1 : 32;
1363 unsigned unk2 : 3;
1364
1365 unsigned nr_channels : 2; /* MALI_POSITIVE */
1366
1367 unsigned flags : 11;
1368
1369 unsigned swizzle : 12;
1370
1371 unsigned unk4 : 4;
1372 } __attribute__((packed));
1373
1374 struct bifrost_render_target {
1375 struct mali_rt_format format;
1376
1377 u64 zero1;
1378
1379 union {
1380 struct {
1381 /* Stuff related to ARM Framebuffer Compression. When AFBC is enabled,
1382 * there is an extra metadata buffer that contains 16 bytes per tile.
1383 * The framebuffer needs to be the same size as before, since we don't
1384 * know ahead of time how much space it will take up. The
1385 * framebuffer_stride is set to 0, since the data isn't stored linearly
1386 * anymore.
1387 */
1388
1389 mali_ptr metadata;
1390 u32 stride; // stride in units of tiles
1391 u32 unk; // = 0x20000
1392 } afbc;
1393
1394 struct {
1395 /* Heck if I know */
1396 u64 unk;
1397 mali_ptr pointer;
1398 } chunknown;
1399 };
1400
1401 mali_ptr framebuffer;
1402
1403 u32 zero2 : 4;
1404 u32 framebuffer_stride : 28; // in units of bytes
1405 u32 zero3;
1406
1407 u32 clear_color_1; // RGBA8888 from glClear, actually used by hardware
1408 u32 clear_color_2; // always equal, but unclear function?
1409 u32 clear_color_3; // always equal, but unclear function?
1410 u32 clear_color_4; // always equal, but unclear function?
1411 } __attribute__((packed));
1412
1413 /* An optional part of bifrost_framebuffer. It comes between the main structure
1414 * and the array of render targets. It must be included if any of these are
1415 * enabled:
1416 *
1417 * - Transaction Elimination
1418 * - Depth/stencil
1419 * - TODO: Anything else?
1420 */
1421
1422 /* Flags field: note, these are guesses */
1423
1424 #define MALI_EXTRA_PRESENT (0x400)
1425 #define MALI_EXTRA_AFBC (0x20)
1426 #define MALI_EXTRA_AFBC_ZS (0x10)
1427 #define MALI_EXTRA_ZS (0x4)
1428
1429 struct bifrost_fb_extra {
1430 mali_ptr checksum;
1431 /* Each tile has an 8 byte checksum, so the stride is "width in tiles * 8" */
1432 u32 checksum_stride;
1433
1434 u32 flags;
1435
1436 union {
1437 /* Note: AFBC is only allowed for 24/8 combined depth/stencil. */
1438 struct {
1439 mali_ptr depth_stencil_afbc_metadata;
1440 u32 depth_stencil_afbc_stride; // in units of tiles
1441 u32 zero1;
1442
1443 mali_ptr depth_stencil;
1444
1445 u64 padding;
1446 } ds_afbc;
1447
1448 struct {
1449 /* Depth becomes depth/stencil in case of combined D/S */
1450 mali_ptr depth;
1451 u32 depth_stride_zero : 4;
1452 u32 depth_stride : 28;
1453 u32 zero1;
1454
1455 mali_ptr stencil;
1456 u32 stencil_stride_zero : 4;
1457 u32 stencil_stride : 28;
1458 u32 zero2;
1459 } ds_linear;
1460 };
1461
1462
1463 u64 zero3, zero4;
1464 } __attribute__((packed));
1465
1466 /* flags for unk3 */
1467
1468 /* Enables writing depth results back to main memory (rather than keeping them
1469 * on-chip in the tile buffer and then discarding) */
1470
1471 #define MALI_MFBD_DEPTH_WRITE (1 << 10)
1472
1473 /* The MFBD contains the extra bifrost_fb_extra section */
1474
1475 #define MALI_MFBD_EXTRA (1 << 13)
1476
1477 struct bifrost_framebuffer {
1478 u32 unk0; // = 0x10
1479
1480 u32 unknown2; // = 0x1f, same as SFBD
1481 mali_ptr scratchpad;
1482
1483 /* 0x10 */
1484 mali_ptr sample_locations;
1485 mali_ptr unknown1;
1486 /* 0x20 */
1487 u16 width1, height1;
1488 u32 zero3;
1489 u16 width2, height2;
1490 u32 unk1 : 19; // = 0x01000
1491 u32 rt_count_1 : 2; // off-by-one (use MALI_POSITIVE)
1492 u32 unk2 : 3; // = 0
1493 u32 rt_count_2 : 3; // no off-by-one
1494 u32 zero4 : 5;
1495 /* 0x30 */
1496 u32 clear_stencil : 8;
1497 u32 unk3 : 24; // = 0x100
1498 float clear_depth;
1499 mali_ptr tiler_meta;
1500 /* 0x40 */
1501
1502 /* Note: these are guesses! */
1503 mali_ptr tiler_scratch_start;
1504 mali_ptr tiler_scratch_middle;
1505
1506 /* These are not, since we see symmetry with replay jobs which name these explicitly */
1507 mali_ptr tiler_heap_start;
1508 mali_ptr tiler_heap_end;
1509
1510 u64 zero9, zero10, zero11, zero12;
1511
1512 /* optional: struct bifrost_fb_extra extra */
1513 /* struct bifrost_render_target rts[] */
1514 } __attribute__((packed));
1515
1516 #endif /* __PANFROST_JOB_H__ */
1517