/external/capstone/arch/ARM/ |
D | ARMDisassembler.c | 1382 unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); in DecodeCopMemInstruction() local 1525 unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); in DecodeAddrMode2IdxInstruction() local 1632 unsigned Rn = fieldFromInstruction_4(Val, 13, 4); in DecodeSORegMemOperand() local 1676 unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); in DecodeAddrMode3Instruction() local 1868 unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); in DecodeRFEInstruction() local 1900 unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); in DecodeQADDInstruction() local 1922 unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); in DecodeMemMultipleWritebackInstruction() local 2155 unsigned Rn = fieldFromInstruction_4(Insn, 0, 4); in DecodeSMLAInstruction() local 2185 unsigned Rn = fieldFromInstruction_4(Val, 13, 4); in DecodeAddrModeImm12Operand() local 2204 unsigned Rn = fieldFromInstruction_4(Val, 9, 4); in DecodeAddrMode5Operand() local [all …]
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/external/llvm/lib/Target/ARM/Disassembler/ |
D | ARMDisassembler.cpp | 1329 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeCopMemInstruction() local 1475 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeAddrMode2IdxInstruction() local 1580 unsigned Rn = fieldFromInstruction(Val, 13, 4); in DecodeSORegMemOperand() local 1625 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeAddrMode3Instruction() local 1815 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeRFEInstruction() local 1846 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeQADDInstruction() local 1868 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeMemMultipleWritebackInstruction() local 2122 unsigned Rn = fieldFromInstruction(Insn, 0, 4); in DecodeSMLAInstruction() local 2150 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeTSTInstruction() local 2200 unsigned Rn = fieldFromInstruction(Val, 13, 4); in DecodeAddrModeImm12Operand() local [all …]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/ |
D | ARMDisassembler.cpp | 1652 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeCopMemInstruction() local 1827 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeAddrMode2IdxInstruction() local 1932 unsigned Rn = fieldFromInstruction(Val, 13, 4); in DecodeSORegMemOperand() local 1977 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeAddrMode3Instruction() local 2167 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeRFEInstruction() local 2198 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeQADDInstruction() local 2220 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeMemMultipleWritebackInstruction() local 2474 unsigned Rn = fieldFromInstruction(Insn, 0, 4); in DecodeSMLAInstruction() local 2502 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeTSTInstruction() local 2552 unsigned Rn = fieldFromInstruction(Val, 13, 4); in DecodeAddrModeImm12Operand() local [all …]
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/external/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
D | ARMDisassembler.cpp | 1673 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeCopMemInstruction() local 1848 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeAddrMode2IdxInstruction() local 1953 unsigned Rn = fieldFromInstruction(Val, 13, 4); in DecodeSORegMemOperand() local 1998 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeAddrMode3Instruction() local 2188 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeRFEInstruction() local 2219 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeQADDInstruction() local 2241 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeMemMultipleWritebackInstruction() local 2495 unsigned Rn = fieldFromInstruction(Insn, 0, 4); in DecodeSMLAInstruction() local 2523 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeTSTInstruction() local 2573 unsigned Rn = fieldFromInstruction(Val, 13, 4); in DecodeAddrModeImm12Operand() local [all …]
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/external/llvm-project/lldb/source/Plugins/Instruction/ARM/ |
D | EmulateInstructionARM.cpp | 2483 Rn; // This function assumes Rn is the SP, but we should verify that. in EmulateSTRRtSP() local 2956 uint32_t Rn; // the base register which contains the address of the table of in EmulateTB() local 3106 uint64_t Rn = in EmulateADDImmThumb() local 3158 uint32_t Rd, Rn; in EmulateADDImmARM() local 3224 uint32_t Rd, Rn, Rm; in EmulateADDReg() local 3306 uint32_t Rn; // the first operand in EmulateCMNImm() local 3354 uint32_t Rn; // the first operand in EmulateCMNReg() local 3419 uint32_t Rn; // the first operand in EmulateCMPImm() local 3471 uint32_t Rn; // the first operand in EmulateCMPReg() local 3849 uint32_t Rn; // the first operand register in EmulateShiftReg() local [all …]
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/external/capstone/arch/AArch64/ |
D | AArch64Disassembler.c | 731 unsigned Rn = fieldFromInstruction(Insn, 5, 5); in DecodeFMOVLaneInstruction() local 836 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeThreeAddrSRegInstruction() local 936 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeUnsignedLdStInstruction() local 1000 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeSignedLdStInstruction() local 1186 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeExclusiveLdStInstruction() local 1262 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodePairLdStInstruction() local 1390 unsigned Rd, Rn, Rm; in DecodeAddSubERegInstruction() local 1451 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeLogicalImmInstruction() local 1560 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeBaseAddSubImm() local
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/external/llvm/lib/Target/AArch64/Disassembler/ |
D | AArch64Disassembler.cpp | 653 unsigned Rn = fieldFromInstruction(Insn, 5, 5); in DecodeFMOVLaneInstruction() local 744 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeThreeAddrSRegInstruction() local 839 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeUnsignedLdStInstruction() local 900 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeSignedLdStInstruction() local 1085 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeExclusiveLdStInstruction() local 1168 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodePairLdStInstruction() local 1297 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeAddSubERegInstruction() local 1354 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeLogicalImmInstruction() local 1460 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeBaseAddSubImm() local
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/external/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
D | AArch64Disassembler.cpp | 849 unsigned Rn = fieldFromInstruction(Insn, 5, 5); in DecodeFMOVLaneInstruction() local 940 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeThreeAddrSRegInstruction() local 1035 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeUnsignedLdStInstruction() local 1096 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeSignedLdStInstruction() local 1294 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeExclusiveLdStInstruction() local 1377 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodePairLdStInstruction() local 1511 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeAuthLoadInstruction() local 1544 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeAddSubERegInstruction() local 1601 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeLogicalImmInstruction() local 1707 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeAddSubImmShift() local
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Disassembler/ |
D | AArch64Disassembler.cpp | 846 unsigned Rn = fieldFromInstruction(Insn, 5, 5); in DecodeFMOVLaneInstruction() local 937 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeThreeAddrSRegInstruction() local 1032 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeUnsignedLdStInstruction() local 1093 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeSignedLdStInstruction() local 1291 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeExclusiveLdStInstruction() local 1374 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodePairLdStInstruction() local 1508 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeAddSubERegInstruction() local 1565 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeLogicalImmInstruction() local 1671 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeAddSubImmShift() local
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/external/swiftshader/third_party/subzero/src/ |
D | IceAssemblerARM32.cpp | 135 IValueT encodeGPRRegister(RegARM32::GPRRegister Rn) { in encodeGPRRegister() 436 IValueT encodeImmRegOffsetEnc3(IValueT Rn, IOffsetT Imm8, in encodeImmRegOffsetEnc3() 501 IValueT Rn = getEncodedGPRegNum(Var); in encodeAddress() local 798 IValueT Opcode, bool SetFlags, IValueT Rn, in emitType01() 822 IValueT Rn = encodeGPRegister(OpRn, "Rn", InstName); in emitType01() local 827 IValueT Rd, IValueT Rn, const Operand *OpSrc1, in emitType01() 932 IValueT Rn = encodeGPRegister(OpRn, "Rn", InstName); in emitCompareOp() local 964 RegARM32::GPRRegister Rn = getGPRReg(kRnShift, Address); in emitMemOp() local 986 RegARM32::GPRRegister Rn = getGPRReg(kRnShift, Address); in emitMemOp() local 1046 const RegARM32::GPRRegister Rn = getGPRReg(kRnShift, Address); in emitMemOpEnc3() local [all …]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMMCCodeEmitter.cpp | 938 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getThumbAddrModeRegRegOpValue() local 1070 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(M0.getReg()); in getMveAddrModeRQOpValue() local 1256 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getLdStSORegOpValue() local 1353 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getAddrMode3OpValue() local 1363 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrMode3OpValue() local 1400 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrModeISOpValue() local
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/external/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMMCCodeEmitter.cpp | 930 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getThumbAddrModeRegRegOpValue() local 1062 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(M0.getReg()); in getMveAddrModeRQOpValue() local 1248 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getLdStSORegOpValue() local 1345 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getAddrMode3OpValue() local 1355 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrMode3OpValue() local 1392 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrModeISOpValue() local
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMMCCodeEmitter.cpp | 865 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getThumbAddrModeRegRegOpValue() local 1072 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getLdStSORegOpValue() local 1169 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getAddrMode3OpValue() local 1179 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrMode3OpValue() local 1216 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrModeISOpValue() local
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/external/llvm-project/lldb/source/Plugins/Instruction/ARM64/ |
D | EmulateInstructionARM64.cpp | 629 const uint32_t Rn = Bits32(opcode, 9, 5); in EmulateADDSUBImm() local 709 uint32_t Rn = Bits32(opcode, 9, 5); in EmulateLDPSTP() local
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/ |
D | AArch64AsmParser.cpp | 3975 unsigned Rn = Inst.getOperand(3).getReg(); in validateInstruction() local 4021 unsigned Rn = Inst.getOperand(3).getReg(); in validateInstruction() local 4053 unsigned Rn = Inst.getOperand(2).getReg(); in validateInstruction() local 4072 unsigned Rn = Inst.getOperand(2).getReg(); in validateInstruction() local 4088 unsigned Rn = Inst.getOperand(2).getReg(); in validateInstruction() local 4102 unsigned Rn = Inst.getOperand(3).getReg(); in validateInstruction() local
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/external/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 2908 unsigned Rn = MI.getOperand(2).getReg(); in getNumMicroOpsSwiftLdSt() local 2934 unsigned Rn = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local 2944 unsigned Rn = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local 2981 unsigned Rn = MI.getOperand(2).getReg(); in getNumMicroOpsSwiftLdSt() local
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D | Thumb2SizeReduction.cpp | 438 unsigned Rn = MI->getOperand(IsStore ? 0 : 1).getReg(); in ReduceLoadStore() local
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/external/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
D | AArch64AsmParser.cpp | 4090 unsigned Rn = Inst.getOperand(3).getReg(); in validateInstruction() local 4136 unsigned Rn = Inst.getOperand(3).getReg(); in validateInstruction() local 4168 unsigned Rn = Inst.getOperand(2).getReg(); in validateInstruction() local 4187 unsigned Rn = Inst.getOperand(2).getReg(); in validateInstruction() local 4203 unsigned Rn = Inst.getOperand(2).getReg(); in validateInstruction() local 4217 unsigned Rn = Inst.getOperand(3).getReg(); in validateInstruction() local
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 3462 Register Rn = MI.getOperand(2).getReg(); in getNumMicroOpsSwiftLdSt() local 3488 Register Rn = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local 3498 Register Rn = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local 3535 Register Rn = MI.getOperand(2).getReg(); in getNumMicroOpsSwiftLdSt() local
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D | Thumb2SizeReduction.cpp | 468 Register Rn = MI->getOperand(IsStore ? 0 : 1).getReg(); in ReduceLoadStore() local
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/external/llvm-project/llvm/lib/Target/ARM/ |
D | Thumb2SizeReduction.cpp | 468 Register Rn = MI->getOperand(IsStore ? 0 : 1).getReg(); in ReduceLoadStore() local
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D | ARMBaseInstrInfo.cpp | 3512 Register Rn = MI.getOperand(2).getReg(); in getNumMicroOpsSwiftLdSt() local 3538 Register Rn = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local 3548 Register Rn = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local 3585 Register Rn = MI.getOperand(2).getReg(); in getNumMicroOpsSwiftLdSt() local
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/external/llvm/lib/Target/AArch64/AsmParser/ |
D | AArch64AsmParser.cpp | 3451 unsigned Rn = Inst.getOperand(3).getReg(); in validateInstruction() local 3497 unsigned Rn = Inst.getOperand(3).getReg(); in validateInstruction() local 3529 unsigned Rn = Inst.getOperand(2).getReg(); in validateInstruction() local 3548 unsigned Rn = Inst.getOperand(2).getReg(); in validateInstruction() local
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/external/llvm/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 6245 const unsigned Rn = MRI->getEncodingValue(Inst.getOperand(3).getReg()); in validateInstruction() local 6306 const unsigned Rn = MRI->getEncodingValue(Inst.getOperand(2).getReg()); in validateInstruction() local 6329 const unsigned Rn = MRI->getEncodingValue(Inst.getOperand(2).getReg()); in validateInstruction() local 6354 unsigned Rn = Inst.getOperand(0).getReg(); in validateInstruction() local 8449 unsigned Rn = Inst.getOperand(0).getReg(); in processInstruction() local 8473 unsigned Rn = Inst.getOperand(0).getReg(); in processInstruction() local
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 7290 unsigned Rn = MRI->getEncodingValue(Inst.getOperand(3).getReg()); in validateLDRDSTRD() local 7481 const unsigned Rn = MRI->getEncodingValue(Inst.getOperand(2).getReg()); in validateInstruction() local 7514 const unsigned Rn = MRI->getEncodingValue(Inst.getOperand(2).getReg()); in validateInstruction() local 7589 unsigned Rn = Inst.getOperand(0).getReg(); in validateInstruction() local 9935 unsigned Rn = Inst.getOperand(0).getReg(); in processInstruction() local 9959 unsigned Rn = Inst.getOperand(0).getReg(); in processInstruction() local
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