| /external/llvm-project/flang/lib/Decimal/ |
| D | big-radix-floating-point.h | 343 constexpr Raw SignBit() const { return Raw{isNegative_} << (Real::bits - 1); } in RemoveLeastOrderZeroDigits() function
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/DWARF/ |
| D | DWARFExpression.h | 45 SignBit = 0x80, enumerator
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| /external/llvm-project/llvm/include/llvm/DebugInfo/DWARF/ |
| D | DWARFExpression.h | 49 SignBit = 0x80, enumerator
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| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineSimplifyDemanded.cpp | 655 APInt SignBit(APInt::getSignBit(BitWidth)); in SimplifyDemandedUseBits() local
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| D | InstCombineCompares.cpp | 1605 const APInt &SignBit = XorCst->getValue(); in visitICmpInstWithInstAndIntCst() local
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| /external/llvm-project/llvm/unittests/CodeGen/GlobalISel/ |
| D | KnownBitsTest.cpp | 315 auto SignBit = B.buildConstant(S32, 0x80000000); in TEST_F() local
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| /external/tensorflow/tensorflow/python/lib/core/ |
| D | bfloat16.cc | 1088 struct SignBit { struct
1089 bool operator()(bfloat16 a) { return std::signbit(static_cast<float>(a)); } in operator ()()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 71 uint8_t SignBit; member
1518 SDValue SignBit = DAG.getNode(ISD::AND, DL, IntVT, SignAsInt.IntValue, in ExpandFCOPYSIGN() local
2377 SDValue SignBit = DAG.getConstant(0x80000000u, dl, MVT::i32); in ExpandLegalINT_TO_FP() local
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| D | LegalizeFloatTypes.cpp | 302 SDValue SignBit = DAG.getNode( in SoftenFloatRes_FCOPYSIGN() local
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| D | DAGCombiner.cpp | 11232 SDValue SignBit = DAG.getConstant( in visitBITCAST() local
11253 APInt SignBit = APInt::getSignMask(VT.getSizeInBits()); in visitBITCAST() local
11301 APInt SignBit = APInt::getSignMask(VT.getSizeInBits() / 2); in visitBITCAST() local
11322 APInt SignBit = APInt::getSignMask(VT.getSizeInBits()); in visitBITCAST() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 1359 uint8_t SignBit; member
1444 SDValue SignBit = DAG.getNode(ISD::AND, DL, IntVT, SignAsInt.IntValue, in ExpandFCOPYSIGN() local
2290 SDValue SignBit = DAG.getConstant(0x80000000u, dl, MVT::i32); in ExpandLegalINT_TO_FP() local
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| D | LegalizeFloatTypes.cpp | 262 SDValue SignBit = DAG.getNode( in SoftenFloatRes_FCOPYSIGN() local
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| D | TargetLowering.cpp | 836 APInt SignBit = APInt::getSignBit(BitWidth).lshr(ShAmt); in SimplifyDemandedBits() local
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| D | DAGCombiner.cpp | 7476 SDValue SignBit = DAG.getConstant( in visitBITCAST() local
7497 APInt SignBit = APInt::getSignBit(VT.getSizeInBits()); in visitBITCAST() local
7545 APInt SignBit = APInt::getSignBit(VT.getSizeInBits() / 2); in visitBITCAST() local
7566 APInt SignBit = APInt::getSignBit(VT.getSizeInBits()); in visitBITCAST() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVISelLowering.cpp | 973 APInt SignBit = APInt::getSignMask(32); in PerformDAGCombine() local
1018 APInt SignBit = APInt::getSignMask(32).sext(64); in PerformDAGCombine() local
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| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeFloatTypes.cpp | 321 SDValue SignBit = DAG.getNode( in SoftenFloatRes_FCOPYSIGN() local
2668 SDValue SignBit = DAG.getNode( in SoftPromoteHalfRes_FCOPYSIGN() local
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| D | LegalizeDAG.cpp | 71 uint8_t SignBit; member
1549 SDValue SignBit = DAG.getNode(ISD::AND, DL, IntVT, SignAsInt.IntValue, in ExpandFCOPYSIGN() local
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| D | DAGCombiner.cpp | 12219 SDValue SignBit = DAG.getConstant( in visitBITCAST() local
12240 APInt SignBit = APInt::getSignMask(VT.getSizeInBits()); in visitBITCAST() local
12288 APInt SignBit = APInt::getSignMask(VT.getSizeInBits() / 2); in visitBITCAST() local
12309 APInt SignBit = APInt::getSignMask(VT.getSizeInBits()); in visitBITCAST() local
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 1664 SDValue SignBit = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, SignBitMask); in LowerFTRUNC() local
1930 const SDValue SignBit = DAG.getConstant(63, SL, MVT::i64); in LowerINT_TO_FP32() local
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| /external/llvm-project/llvm/lib/Target/RISCV/ |
| D | RISCVISelLowering.cpp | 1482 APInt SignBit = APInt::getSignMask(32); in PerformDAGCombine() local
1563 APInt SignBit = APInt::getSignMask(32).sext(64); in PerformDAGCombine() local
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 2168 SDValue SignBit = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, SignBitMask); in LowerFTRUNC() local
2421 const SDValue SignBit = DAG.getConstant(63, SL, MVT::i64); in LowerINT_TO_FP32() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 2100 SDValue SignBit = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, SignBitMask); in LowerFTRUNC() local
2423 const SDValue SignBit = DAG.getConstant(63, SL, MVT::i64); in LowerINT_TO_FP32() local
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| D | AMDGPULegalizerInfo.cpp | 1452 auto SignBit = B.buildAnd(S32, Hi, SignBitMask); in legalizeIntrinsicTrunc() local
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| /external/llvm/lib/Support/ |
| D | APInt.cpp | 1068 unsigned SignBit = APINT_BITS_PER_WORD - BitWidth; in ashr() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 3952 auto SignBit = MIRBuilder.buildConstant(S64, 63); in lowerSITOFP() local
|