/external/llvm/lib/CodeGen/SelectionDAG/ |
D | ScheduleDAGVLIW.cpp | 117 SUnit *SuccSU = D.getSUnit(); in releaseSucc() local
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D | ScheduleDAGRRList.cpp | 1114 SUnit *SuccSU = Succ.getSUnit(); in CopyAndMoveSuccessors() local 1153 SUnit *SuccSU = Succ.getSUnit(); in InsertCopiesAndMoveSuccs() local 2240 const SUnit *SuccSU = Succ.getSUnit(); in hasOnlyLiveOutUses() local 2704 SUnit *SuccSU = Succ.getSUnit(); in canClobberReachingPhysRegUse() local 2729 static bool canClobberPhysRegDefs(const SUnit *SuccSU, const SUnit *SU, in canClobberPhysRegDefs() 2865 SUnit *SuccSU = Edge.getSUnit(); in PrescheduleNodesWithMultipleUses() local 2912 SUnit *SuccSU = Succ.getSUnit(); in AddPseudoTwoAddrDeps() local
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D | ScheduleDAGFast.cpp | 369 SUnit *SuccSU = I->getSUnit(); in CopyAndMoveSuccessors() local 406 SUnit *SuccSU = I->getSUnit(); in InsertCopiesAndMoveSuccs() local
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D | ResourcePriorityQueue.cpp | 115 SUnit *SuccSU = I->getSUnit(); in numberRCValSuccInSU() local
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | ScheduleDAGVLIW.cpp | 114 SUnit *SuccSU = D.getSUnit(); in releaseSucc() local
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D | ScheduleDAGRRList.cpp | 1201 SUnit *SuccSU = Succ.getSUnit(); in CopyAndMoveSuccessors() local 1240 SUnit *SuccSU = Succ.getSUnit(); in InsertCopiesAndMoveSuccs() local 2382 const SUnit *SuccSU = Succ.getSUnit(); in hasOnlyLiveOutUses() local 2848 SUnit *SuccSU = Succ.getSUnit(); in canClobberReachingPhysRegUse() local 2873 static bool canClobberPhysRegDefs(const SUnit *SuccSU, const SUnit *SU, in canClobberPhysRegDefs() 3032 SUnit *SuccSU = Edge.getSUnit(); in PrescheduleNodesWithMultipleUses() local 3079 SUnit *SuccSU = Succ.getSUnit(); in AddPseudoTwoAddrDeps() local
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D | ScheduleDAGFast.cpp | 362 SUnit *SuccSU = Succ.getSUnit(); in CopyAndMoveSuccessors() local 398 SUnit *SuccSU = Succ.getSUnit(); in InsertCopiesAndMoveSuccs() local
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D | ResourcePriorityQueue.cpp | 111 SUnit *SuccSU = Succ.getSUnit(); in numberRCValSuccInSU() local
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/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
D | ScheduleDAGVLIW.cpp | 114 SUnit *SuccSU = D.getSUnit(); in releaseSucc() local
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D | ScheduleDAGRRList.cpp | 1201 SUnit *SuccSU = Succ.getSUnit(); in CopyAndMoveSuccessors() local 1240 SUnit *SuccSU = Succ.getSUnit(); in InsertCopiesAndMoveSuccs() local 2385 const SUnit *SuccSU = Succ.getSUnit(); in hasOnlyLiveOutUses() local 2851 SUnit *SuccSU = Succ.getSUnit(); in canClobberReachingPhysRegUse() local 2876 static bool canClobberPhysRegDefs(const SUnit *SuccSU, const SUnit *SU, in canClobberPhysRegDefs() 3035 SUnit *SuccSU = Edge.getSUnit(); in PrescheduleNodesWithMultipleUses() local 3082 SUnit *SuccSU = Succ.getSUnit(); in AddPseudoTwoAddrDeps() local
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D | ScheduleDAGFast.cpp | 362 SUnit *SuccSU = Succ.getSUnit(); in CopyAndMoveSuccessors() local 398 SUnit *SuccSU = Succ.getSUnit(); in InsertCopiesAndMoveSuccs() local
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D | ResourcePriorityQueue.cpp | 115 SUnit *SuccSU = Succ.getSUnit(); in numberRCValSuccInSU() local
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/external/llvm/lib/CodeGen/ |
D | ScheduleDAG.cpp | 187 SUnit *SuccSU = I->getSUnit(); in setDepthDirty() local 277 SUnit *SuccSU = I->getSUnit(); in ComputeHeight() local
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D | PostRASchedulerList.cpp | 460 SUnit *SuccSU = SuccEdge->getSUnit(); in ReleaseSucc() local
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | ScheduleDAG.cpp | 225 SUnit *SuccSU = SuccDep.getSUnit(); in setDepthDirty() local 304 SUnit *SuccSU = SuccDep.getSUnit(); in ComputeHeight() local
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D | PostRASchedulerList.cpp | 455 SUnit *SuccSU = SuccEdge->getSUnit(); in ReleaseSucc() local
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D | ScheduleDAGInstrs.cpp | 1196 bool ScheduleDAGInstrs::canAddEdge(SUnit *SuccSU, SUnit *PredSU) { in canAddEdge() 1200 bool ScheduleDAGInstrs::addEdge(SUnit *SuccSU, const SDep &PredDep) { in addEdge()
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/external/llvm-project/llvm/lib/CodeGen/ |
D | ScheduleDAG.cpp | 225 SUnit *SuccSU = SuccDep.getSUnit(); in setDepthDirty() local 304 SUnit *SuccSU = SuccDep.getSUnit(); in ComputeHeight() local
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D | PostRASchedulerList.cpp | 453 SUnit *SuccSU = SuccEdge->getSUnit(); in ReleaseSucc() local
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D | ScheduleDAGInstrs.cpp | 1200 bool ScheduleDAGInstrs::canAddEdge(SUnit *SuccSU, SUnit *PredSU) { in canAddEdge() 1204 bool ScheduleDAGInstrs::addEdge(SUnit *SuccSU, const SDep &PredDep) { in addEdge()
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | GCNMinRegStrategy.cpp | 228 auto SuccSU = S.getSUnit(); in releaseSuccessors() local
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D | SIMachineScheduler.cpp | 454 SUnit *SuccSU = SuccEdge->getSUnit(); in undoReleaseSucc() local 464 SUnit *SuccSU = SuccEdge->getSUnit(); in releaseSucc() local 485 SUnit *SuccSU = Succ.getSUnit(); in releaseSuccessors() local
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | GCNMinRegStrategy.cpp | 222 auto SuccSU = S.getSUnit(); in releaseSuccessors() local
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D | SIMachineScheduler.cpp | 454 SUnit *SuccSU = SuccEdge->getSUnit(); in undoReleaseSucc() local 464 SUnit *SuccSU = SuccEdge->getSUnit(); in releaseSucc() local 485 SUnit *SuccSU = Succ.getSUnit(); in releaseSuccessors() local
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/external/llvm/lib/Target/AMDGPU/ |
D | SIMachineScheduler.cpp | 434 SUnit *SuccSU = SuccEdge->getSUnit(); in undoReleaseSucc() local 444 SUnit *SuccSU = SuccEdge->getSUnit(); in releaseSucc() local 465 SUnit *SuccSU = Succ.getSUnit(); in releaseSuccessors() local
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