1 /************************************************************************** 2 * 3 * Copyright 2008 VMware, Inc. 4 * Copyright 2009-2010 VMware, Inc. 5 * All Rights Reserved. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a 8 * copy of this software and associated documentation files (the 9 * "Software"), to deal in the Software without restriction, including 10 * without limitation the rights to use, copy, modify, merge, publish, 11 * distribute, sub license, and/or sell copies of the Software, and to 12 * permit persons to whom the Software is furnished to do so, subject to 13 * the following conditions: 14 * 15 * The above copyright notice and this permission notice (including the 16 * next paragraph) shall be included in all copies or substantial portions 17 * of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 22 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR 23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 26 * 27 **************************************************************************/ 28 29 #ifndef P_SHADER_TOKENS_H 30 #define P_SHADER_TOKENS_H 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 37 struct tgsi_header 38 { 39 unsigned HeaderSize : 8; 40 unsigned BodySize : 24; 41 }; 42 43 #define TGSI_PROCESSOR_FRAGMENT 0 44 #define TGSI_PROCESSOR_VERTEX 1 45 #define TGSI_PROCESSOR_GEOMETRY 2 46 #define TGSI_PROCESSOR_TESS_CTRL 3 47 #define TGSI_PROCESSOR_TESS_EVAL 4 48 #define TGSI_PROCESSOR_COMPUTE 5 49 50 struct tgsi_processor 51 { 52 unsigned Processor : 4; /* TGSI_PROCESSOR_ */ 53 unsigned Padding : 28; 54 }; 55 56 #define TGSI_TOKEN_TYPE_DECLARATION 0 57 #define TGSI_TOKEN_TYPE_IMMEDIATE 1 58 #define TGSI_TOKEN_TYPE_INSTRUCTION 2 59 #define TGSI_TOKEN_TYPE_PROPERTY 3 60 61 struct tgsi_token 62 { 63 unsigned Type : 4; /**< TGSI_TOKEN_TYPE_x */ 64 unsigned NrTokens : 8; /**< UINT */ 65 unsigned Padding : 20; 66 }; 67 68 enum tgsi_file_type { 69 TGSI_FILE_NULL =0, 70 TGSI_FILE_CONSTANT =1, 71 TGSI_FILE_INPUT =2, 72 TGSI_FILE_OUTPUT =3, 73 TGSI_FILE_TEMPORARY =4, 74 TGSI_FILE_SAMPLER =5, 75 TGSI_FILE_ADDRESS =6, 76 TGSI_FILE_IMMEDIATE =7, 77 TGSI_FILE_PREDICATE =8, 78 TGSI_FILE_SYSTEM_VALUE =9, 79 TGSI_FILE_IMAGE =10, 80 TGSI_FILE_SAMPLER_VIEW =11, 81 TGSI_FILE_BUFFER, 82 TGSI_FILE_MEMORY, 83 TGSI_FILE_HW_ATOMIC, 84 TGSI_FILE_COUNT /**< how many TGSI_FILE_ types */ 85 }; 86 87 88 #define TGSI_WRITEMASK_NONE 0x00 89 #define TGSI_WRITEMASK_X 0x01 90 #define TGSI_WRITEMASK_Y 0x02 91 #define TGSI_WRITEMASK_XY 0x03 92 #define TGSI_WRITEMASK_Z 0x04 93 #define TGSI_WRITEMASK_XZ 0x05 94 #define TGSI_WRITEMASK_YZ 0x06 95 #define TGSI_WRITEMASK_XYZ 0x07 96 #define TGSI_WRITEMASK_W 0x08 97 #define TGSI_WRITEMASK_XW 0x09 98 #define TGSI_WRITEMASK_YW 0x0A 99 #define TGSI_WRITEMASK_XYW 0x0B 100 #define TGSI_WRITEMASK_ZW 0x0C 101 #define TGSI_WRITEMASK_XZW 0x0D 102 #define TGSI_WRITEMASK_YZW 0x0E 103 #define TGSI_WRITEMASK_XYZW 0x0F 104 105 #define TGSI_INTERPOLATE_CONSTANT 0 106 #define TGSI_INTERPOLATE_LINEAR 1 107 #define TGSI_INTERPOLATE_PERSPECTIVE 2 108 #define TGSI_INTERPOLATE_COLOR 3 /* special color case for smooth/flat */ 109 #define TGSI_INTERPOLATE_COUNT 4 110 111 #define TGSI_INTERPOLATE_LOC_CENTER 0 112 #define TGSI_INTERPOLATE_LOC_CENTROID 1 113 #define TGSI_INTERPOLATE_LOC_SAMPLE 2 114 #define TGSI_INTERPOLATE_LOC_COUNT 3 115 116 #define TGSI_CYLINDRICAL_WRAP_X (1 << 0) 117 #define TGSI_CYLINDRICAL_WRAP_Y (1 << 1) 118 #define TGSI_CYLINDRICAL_WRAP_Z (1 << 2) 119 #define TGSI_CYLINDRICAL_WRAP_W (1 << 3) 120 121 enum tgsi_memory_type { 122 TGSI_MEMORY_TYPE_GLOBAL, /* OpenCL global */ 123 TGSI_MEMORY_TYPE_SHARED, /* OpenCL local / GLSL shared */ 124 TGSI_MEMORY_TYPE_PRIVATE, /* OpenCL private */ 125 TGSI_MEMORY_TYPE_INPUT, /* OpenCL kernel input params */ 126 TGSI_MEMORY_TYPE_COUNT, 127 }; 128 129 struct tgsi_declaration 130 { 131 unsigned Type : 4; /**< TGSI_TOKEN_TYPE_DECLARATION */ 132 unsigned NrTokens : 8; /**< UINT */ 133 unsigned File : 4; /**< one of TGSI_FILE_x */ 134 unsigned UsageMask : 4; /**< bitmask of TGSI_WRITEMASK_x flags */ 135 unsigned Dimension : 1; /**< any extra dimension info? */ 136 unsigned Semantic : 1; /**< BOOL, any semantic info? */ 137 unsigned Interpolate : 1; /**< any interpolation info? */ 138 unsigned Invariant : 1; /**< invariant optimization? */ 139 unsigned Local : 1; /**< optimize as subroutine local variable? */ 140 unsigned Array : 1; /**< extra array info? */ 141 unsigned Atomic : 1; /**< atomic only? for TGSI_FILE_BUFFER */ 142 unsigned MemType : 2; /**< TGSI_MEMORY_TYPE_x for TGSI_FILE_MEMORY */ 143 unsigned Padding : 3; 144 }; 145 146 struct tgsi_declaration_range 147 { 148 unsigned First : 16; /**< UINT */ 149 unsigned Last : 16; /**< UINT */ 150 }; 151 152 struct tgsi_declaration_dimension 153 { 154 unsigned Index2D:16; /**< UINT */ 155 unsigned Padding:16; 156 }; 157 158 struct tgsi_declaration_interp 159 { 160 unsigned Interpolate : 4; /**< one of TGSI_INTERPOLATE_x */ 161 unsigned Location : 2; /**< one of TGSI_INTERPOLATE_LOC_x */ 162 unsigned CylindricalWrap:4; /**< TGSI_CYLINDRICAL_WRAP_x flags */ 163 unsigned Padding : 22; 164 }; 165 166 #define TGSI_SEMANTIC_POSITION 0 167 #define TGSI_SEMANTIC_COLOR 1 168 #define TGSI_SEMANTIC_BCOLOR 2 /**< back-face color */ 169 #define TGSI_SEMANTIC_FOG 3 170 #define TGSI_SEMANTIC_PSIZE 4 171 #define TGSI_SEMANTIC_GENERIC 5 172 #define TGSI_SEMANTIC_NORMAL 6 173 #define TGSI_SEMANTIC_FACE 7 174 #define TGSI_SEMANTIC_EDGEFLAG 8 175 #define TGSI_SEMANTIC_PRIMID 9 176 #define TGSI_SEMANTIC_INSTANCEID 10 /**< doesn't include start_instance */ 177 #define TGSI_SEMANTIC_VERTEXID 11 178 #define TGSI_SEMANTIC_STENCIL 12 179 #define TGSI_SEMANTIC_CLIPDIST 13 180 #define TGSI_SEMANTIC_CLIPVERTEX 14 181 #define TGSI_SEMANTIC_GRID_SIZE 15 /**< grid size in blocks */ 182 #define TGSI_SEMANTIC_BLOCK_ID 16 /**< id of the current block */ 183 #define TGSI_SEMANTIC_BLOCK_SIZE 17 /**< block size in threads */ 184 #define TGSI_SEMANTIC_THREAD_ID 18 /**< block-relative id of the current thread */ 185 #define TGSI_SEMANTIC_TEXCOORD 19 /**< texture or sprite coordinates */ 186 #define TGSI_SEMANTIC_PCOORD 20 /**< point sprite coordinate */ 187 #define TGSI_SEMANTIC_VIEWPORT_INDEX 21 /**< viewport index */ 188 #define TGSI_SEMANTIC_LAYER 22 /**< layer (rendertarget index) */ 189 #define TGSI_SEMANTIC_CULLDIST 23 190 #define TGSI_SEMANTIC_SAMPLEID 24 191 #define TGSI_SEMANTIC_SAMPLEPOS 25 192 #define TGSI_SEMANTIC_SAMPLEMASK 26 193 #define TGSI_SEMANTIC_INVOCATIONID 27 194 #define TGSI_SEMANTIC_VERTEXID_NOBASE 28 195 #define TGSI_SEMANTIC_BASEVERTEX 29 196 #define TGSI_SEMANTIC_PATCH 30 /**< generic per-patch semantic */ 197 #define TGSI_SEMANTIC_TESSCOORD 31 /**< coordinate being processed by tess */ 198 #define TGSI_SEMANTIC_TESSOUTER 32 /**< outer tessellation levels */ 199 #define TGSI_SEMANTIC_TESSINNER 33 /**< inner tessellation levels */ 200 #define TGSI_SEMANTIC_VERTICESIN 34 /**< number of input vertices */ 201 #define TGSI_SEMANTIC_HELPER_INVOCATION 35 /**< current invocation is helper */ 202 #define TGSI_SEMANTIC_COUNT 36 /**< number of semantic values */ 203 204 struct tgsi_declaration_semantic 205 { 206 unsigned Name : 8; /**< one of TGSI_SEMANTIC_x */ 207 unsigned Index : 16; /**< UINT */ 208 unsigned StreamX : 2; /**< vertex stream (for GS output) */ 209 unsigned StreamY : 2; 210 unsigned StreamZ : 2; 211 unsigned StreamW : 2; 212 }; 213 214 struct tgsi_declaration_image { 215 unsigned Resource : 8; /**< one of TGSI_TEXTURE_ */ 216 unsigned Raw : 1; 217 unsigned Writable : 1; 218 unsigned Format : 10; /**< one of PIPE_FORMAT_ */ 219 unsigned Padding : 12; 220 }; 221 222 enum tgsi_return_type { 223 TGSI_RETURN_TYPE_UNORM = 0, 224 TGSI_RETURN_TYPE_SNORM, 225 TGSI_RETURN_TYPE_SINT, 226 TGSI_RETURN_TYPE_UINT, 227 TGSI_RETURN_TYPE_FLOAT, 228 TGSI_RETURN_TYPE_COUNT 229 }; 230 231 struct tgsi_declaration_sampler_view { 232 unsigned Resource : 8; /**< one of TGSI_TEXTURE_ */ 233 unsigned ReturnTypeX : 6; /**< one of enum tgsi_return_type */ 234 unsigned ReturnTypeY : 6; /**< one of enum tgsi_return_type */ 235 unsigned ReturnTypeZ : 6; /**< one of enum tgsi_return_type */ 236 unsigned ReturnTypeW : 6; /**< one of enum tgsi_return_type */ 237 }; 238 239 struct tgsi_declaration_array { 240 unsigned ArrayID : 10; 241 unsigned Padding : 22; 242 }; 243 244 /* 245 * Special resources that don't need to be declared. They map to the 246 * GLOBAL/LOCAL/PRIVATE/INPUT compute memory spaces. 247 */ 248 #define TGSI_RESOURCE_GLOBAL 0x7fff 249 #define TGSI_RESOURCE_LOCAL 0x7ffe 250 #define TGSI_RESOURCE_PRIVATE 0x7ffd 251 #define TGSI_RESOURCE_INPUT 0x7ffc 252 253 #define TGSI_IMM_FLOAT32 0 254 #define TGSI_IMM_UINT32 1 255 #define TGSI_IMM_INT32 2 256 #define TGSI_IMM_FLOAT64 3 257 258 struct tgsi_immediate 259 { 260 unsigned Type : 4; /**< TGSI_TOKEN_TYPE_IMMEDIATE */ 261 unsigned NrTokens : 14; /**< UINT */ 262 unsigned DataType : 4; /**< one of TGSI_IMM_x */ 263 unsigned Padding : 10; 264 }; 265 266 union tgsi_immediate_data 267 { 268 float Float; 269 unsigned Uint; 270 int Int; 271 }; 272 273 #define TGSI_PROPERTY_GS_INPUT_PRIM 0 274 #define TGSI_PROPERTY_GS_OUTPUT_PRIM 1 275 #define TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES 2 276 #define TGSI_PROPERTY_FS_COORD_ORIGIN 3 277 #define TGSI_PROPERTY_FS_COORD_PIXEL_CENTER 4 278 #define TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS 5 279 #define TGSI_PROPERTY_FS_DEPTH_LAYOUT 6 280 #define TGSI_PROPERTY_VS_PROHIBIT_UCPS 7 281 #define TGSI_PROPERTY_GS_INVOCATIONS 8 282 #define TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION 9 283 #define TGSI_PROPERTY_TCS_VERTICES_OUT 10 284 #define TGSI_PROPERTY_TES_PRIM_MODE 11 285 #define TGSI_PROPERTY_TES_SPACING 12 286 #define TGSI_PROPERTY_TES_VERTEX_ORDER_CW 13 287 #define TGSI_PROPERTY_TES_POINT_MODE 14 288 #define TGSI_PROPERTY_NUM_CLIPDIST_ENABLED 15 289 #define TGSI_PROPERTY_NUM_CULLDIST_ENABLED 16 290 #define TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL 17 291 #define TGSI_PROPERTY_FS_POST_DEPTH_COVERAGE 18 292 #define TGSI_PROPERTY_NEXT_SHADER 19 293 #define TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH 20 294 #define TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT 21 295 #define TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH 22 296 #define TGSI_PROPERTY_MUL_ZERO_WINS 23 297 #define TGSI_PROPERTY_VS_BLIT_SGPRS_AMD 24 298 #define TGSI_PROPERTY_CS_USER_DATA_COMPONENTS_AMD 25 299 #define TGSI_PROPERTY_LAYER_VIEWPORT_RELATIVE 26 300 #define TGSI_PROPERTY_FS_BLEND_EQUATION_ADVANCED 27 301 #define TGSI_PROPERTY_COUNT 28 302 303 struct tgsi_property { 304 unsigned Type : 4; /**< TGSI_TOKEN_TYPE_PROPERTY */ 305 unsigned NrTokens : 8; /**< UINT */ 306 unsigned PropertyName : 8; /**< one of TGSI_PROPERTY */ 307 unsigned Padding : 12; 308 }; 309 310 #define TGSI_FS_COORD_ORIGIN_UPPER_LEFT 0 311 #define TGSI_FS_COORD_ORIGIN_LOWER_LEFT 1 312 313 #define TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER 0 314 #define TGSI_FS_COORD_PIXEL_CENTER_INTEGER 1 315 316 #define TGSI_FS_DEPTH_LAYOUT_NONE 0 317 #define TGSI_FS_DEPTH_LAYOUT_ANY 1 318 #define TGSI_FS_DEPTH_LAYOUT_GREATER 2 319 #define TGSI_FS_DEPTH_LAYOUT_LESS 3 320 #define TGSI_FS_DEPTH_LAYOUT_UNCHANGED 4 321 322 323 struct tgsi_property_data { 324 unsigned Data; 325 }; 326 327 /* TGSI opcodes. 328 * 329 * For more information on semantics of opcodes and 330 * which APIs are known to use which opcodes, see 331 * gallium/docs/source/tgsi.rst 332 */ 333 /* VIRGLRENDERER specific - DON'T SYNC WITH MESA 334 * OR REMOVE OPCODES - FILL in and REWRITE tgsi_info 335 * accordingly. 336 */ 337 #define TGSI_OPCODE_ARL 0 338 #define TGSI_OPCODE_MOV 1 339 #define TGSI_OPCODE_LIT 2 340 #define TGSI_OPCODE_RCP 3 341 #define TGSI_OPCODE_RSQ 4 342 #define TGSI_OPCODE_EXP 5 343 #define TGSI_OPCODE_LOG 6 344 #define TGSI_OPCODE_MUL 7 345 #define TGSI_OPCODE_ADD 8 346 #define TGSI_OPCODE_DP3 9 347 #define TGSI_OPCODE_DP4 10 348 #define TGSI_OPCODE_DST 11 349 #define TGSI_OPCODE_MIN 12 350 #define TGSI_OPCODE_MAX 13 351 #define TGSI_OPCODE_SLT 14 352 #define TGSI_OPCODE_SGE 15 353 #define TGSI_OPCODE_MAD 16 354 #define TGSI_OPCODE_SUB 17 355 #define TGSI_OPCODE_LRP 18 356 #define TGSI_OPCODE_FMA 19 357 #define TGSI_OPCODE_SQRT 20 358 /* gap */ 359 #define TGSI_OPCODE_FRC 24 360 /* gap */ 361 #define TGSI_OPCODE_FLR 26 362 #define TGSI_OPCODE_ROUND 27 363 #define TGSI_OPCODE_EX2 28 364 #define TGSI_OPCODE_LG2 29 365 #define TGSI_OPCODE_POW 30 366 #define TGSI_OPCODE_XPD 31 367 /* gap */ 368 #define TGSI_OPCODE_ABS 33 369 /* gap */ 370 #define TGSI_OPCODE_DPH 35 371 #define TGSI_OPCODE_COS 36 372 #define TGSI_OPCODE_DDX 37 373 #define TGSI_OPCODE_DDY 38 374 #define TGSI_OPCODE_KILL 39 /* unconditional */ 375 #define TGSI_OPCODE_PK2H 40 376 #define TGSI_OPCODE_PK2US 41 377 #define TGSI_OPCODE_PK4B 42 378 #define TGSI_OPCODE_PK4UB 43 379 /* gap */ 380 #define TGSI_OPCODE_SEQ 45 381 /* gap */ 382 #define TGSI_OPCODE_SGT 47 383 #define TGSI_OPCODE_SIN 48 384 #define TGSI_OPCODE_SLE 49 385 #define TGSI_OPCODE_SNE 50 386 /* gap */ 387 #define TGSI_OPCODE_TEX 52 388 #define TGSI_OPCODE_TXD 53 389 #define TGSI_OPCODE_TXP 54 390 #define TGSI_OPCODE_UP2H 55 391 #define TGSI_OPCODE_UP2US 56 392 #define TGSI_OPCODE_UP4B 57 393 #define TGSI_OPCODE_UP4UB 58 394 /* gap */ 395 #define TGSI_OPCODE_ARR 61 396 /* gap */ 397 #define TGSI_OPCODE_CAL 63 398 #define TGSI_OPCODE_RET 64 399 #define TGSI_OPCODE_SSG 65 /* SGN */ 400 #define TGSI_OPCODE_CMP 66 401 #define TGSI_OPCODE_SCS 67 402 #define TGSI_OPCODE_TXB 68 403 #define TGSI_OPCODE_FBFETCH 69 404 #define TGSI_OPCODE_DIV 70 405 #define TGSI_OPCODE_DP2 71 406 #define TGSI_OPCODE_TXL 72 407 #define TGSI_OPCODE_BRK 73 408 #define TGSI_OPCODE_IF 74 409 #define TGSI_OPCODE_UIF 75 410 #define TGSI_OPCODE_ELSE 77 411 #define TGSI_OPCODE_ENDIF 78 412 413 #define TGSI_OPCODE_DDX_FINE 79 414 #define TGSI_OPCODE_DDY_FINE 80 415 /* gap */ 416 #define TGSI_OPCODE_CEIL 83 417 #define TGSI_OPCODE_I2F 84 418 #define TGSI_OPCODE_NOT 85 419 #define TGSI_OPCODE_TRUNC 86 420 #define TGSI_OPCODE_SHL 87 421 /* gap */ 422 #define TGSI_OPCODE_AND 89 423 #define TGSI_OPCODE_OR 90 424 #define TGSI_OPCODE_MOD 91 425 #define TGSI_OPCODE_XOR 92 426 /* gap */ 427 #define TGSI_OPCODE_TXF 94 428 #define TGSI_OPCODE_TXQ 95 429 #define TGSI_OPCODE_CONT 96 430 #define TGSI_OPCODE_EMIT 97 431 #define TGSI_OPCODE_ENDPRIM 98 432 #define TGSI_OPCODE_BGNLOOP 99 433 #define TGSI_OPCODE_BGNSUB 100 434 #define TGSI_OPCODE_ENDLOOP 101 435 #define TGSI_OPCODE_ENDSUB 102 436 /* gap */ 437 #define TGSI_OPCODE_TXQS 104 438 #define TGSI_OPCODE_RESQ 105 439 /* gap */ 440 #define TGSI_OPCODE_NOP 107 441 442 #define TGSI_OPCODE_FSEQ 108 443 #define TGSI_OPCODE_FSGE 109 444 #define TGSI_OPCODE_FSLT 110 445 #define TGSI_OPCODE_FSNE 111 446 447 #define TGSI_OPCODE_MEMBAR 112 448 /* gap */ 449 #define TGSI_OPCODE_KILL_IF 116 /* conditional kill */ 450 #define TGSI_OPCODE_END 117 /* aka HALT */ 451 #define TGSI_OPCODE_DFMA 118 452 #define TGSI_OPCODE_F2I 119 453 #define TGSI_OPCODE_IDIV 120 454 #define TGSI_OPCODE_IMAX 121 455 #define TGSI_OPCODE_IMIN 122 456 #define TGSI_OPCODE_INEG 123 457 #define TGSI_OPCODE_ISGE 124 458 #define TGSI_OPCODE_ISHR 125 459 #define TGSI_OPCODE_ISLT 126 460 #define TGSI_OPCODE_F2U 127 461 #define TGSI_OPCODE_U2F 128 462 #define TGSI_OPCODE_UADD 129 463 #define TGSI_OPCODE_UDIV 130 464 #define TGSI_OPCODE_UMAD 131 465 #define TGSI_OPCODE_UMAX 132 466 #define TGSI_OPCODE_UMIN 133 467 #define TGSI_OPCODE_UMOD 134 468 #define TGSI_OPCODE_UMUL 135 469 #define TGSI_OPCODE_USEQ 136 470 #define TGSI_OPCODE_USGE 137 471 #define TGSI_OPCODE_USHR 138 472 #define TGSI_OPCODE_USLT 139 473 #define TGSI_OPCODE_USNE 140 474 #define TGSI_OPCODE_SWITCH 141 475 #define TGSI_OPCODE_CASE 142 476 #define TGSI_OPCODE_DEFAULT 143 477 #define TGSI_OPCODE_ENDSWITCH 144 478 479 /* resource related opcodes */ 480 #define TGSI_OPCODE_SAMPLE 145 481 #define TGSI_OPCODE_SAMPLE_I 146 482 #define TGSI_OPCODE_SAMPLE_I_MS 147 483 #define TGSI_OPCODE_SAMPLE_B 148 484 #define TGSI_OPCODE_SAMPLE_C 149 485 #define TGSI_OPCODE_SAMPLE_C_LZ 150 486 #define TGSI_OPCODE_SAMPLE_D 151 487 #define TGSI_OPCODE_SAMPLE_L 152 488 #define TGSI_OPCODE_GATHER4 153 489 #define TGSI_OPCODE_SVIEWINFO 154 490 #define TGSI_OPCODE_SAMPLE_POS 155 491 #define TGSI_OPCODE_SAMPLE_INFO 156 492 493 #define TGSI_OPCODE_UARL 157 494 #define TGSI_OPCODE_UCMP 158 495 #define TGSI_OPCODE_IABS 159 496 #define TGSI_OPCODE_ISSG 160 497 498 #define TGSI_OPCODE_LOAD 161 499 #define TGSI_OPCODE_STORE 162 500 501 /* gap */ 502 #define TGSI_OPCODE_BARRIER 166 503 504 #define TGSI_OPCODE_ATOMUADD 167 505 #define TGSI_OPCODE_ATOMXCHG 168 506 #define TGSI_OPCODE_ATOMCAS 169 507 #define TGSI_OPCODE_ATOMAND 170 508 #define TGSI_OPCODE_ATOMOR 171 509 #define TGSI_OPCODE_ATOMXOR 172 510 #define TGSI_OPCODE_ATOMUMIN 173 511 #define TGSI_OPCODE_ATOMUMAX 174 512 #define TGSI_OPCODE_ATOMIMIN 175 513 #define TGSI_OPCODE_ATOMIMAX 176 514 515 /* to be used for shadow cube map compares */ 516 #define TGSI_OPCODE_TEX2 177 517 #define TGSI_OPCODE_TXB2 178 518 #define TGSI_OPCODE_TXL2 179 519 520 #define TGSI_OPCODE_IMUL_HI 180 521 #define TGSI_OPCODE_UMUL_HI 181 522 523 #define TGSI_OPCODE_TG4 182 524 525 #define TGSI_OPCODE_LODQ 183 526 527 #define TGSI_OPCODE_IBFE 184 528 #define TGSI_OPCODE_UBFE 185 529 #define TGSI_OPCODE_BFI 186 530 #define TGSI_OPCODE_BREV 187 531 #define TGSI_OPCODE_POPC 188 532 #define TGSI_OPCODE_LSB 189 533 #define TGSI_OPCODE_IMSB 190 534 #define TGSI_OPCODE_UMSB 191 535 536 #define TGSI_OPCODE_INTERP_CENTROID 192 537 #define TGSI_OPCODE_INTERP_SAMPLE 193 538 #define TGSI_OPCODE_INTERP_OFFSET 194 539 540 /* sm5 marked opcodes are supported in D3D11 optionally - also DMOV, DMOVC */ 541 #define TGSI_OPCODE_F2D 195 /* SM5 */ 542 #define TGSI_OPCODE_D2F 196 543 #define TGSI_OPCODE_DABS 197 544 #define TGSI_OPCODE_DNEG 198 /* SM5 */ 545 #define TGSI_OPCODE_DADD 199 /* SM5 */ 546 #define TGSI_OPCODE_DMUL 200 /* SM5 */ 547 #define TGSI_OPCODE_DMAX 201 /* SM5 */ 548 #define TGSI_OPCODE_DMIN 202 /* SM5 */ 549 #define TGSI_OPCODE_DSLT 203 /* SM5 */ 550 #define TGSI_OPCODE_DSGE 204 /* SM5 */ 551 #define TGSI_OPCODE_DSEQ 205 /* SM5 */ 552 #define TGSI_OPCODE_DSNE 206 /* SM5 */ 553 #define TGSI_OPCODE_DRCP 207 /* eg, cayman */ 554 #define TGSI_OPCODE_DSQRT 208 /* eg, cayman also has DRSQ */ 555 #define TGSI_OPCODE_DMAD 209 556 #define TGSI_OPCODE_DFRAC 210 /* eg, cayman */ 557 #define TGSI_OPCODE_DLDEXP 211 /* eg, cayman */ 558 #define TGSI_OPCODE_DFRACEXP 212 /* eg, cayman */ 559 #define TGSI_OPCODE_D2I 213 560 #define TGSI_OPCODE_I2D 214 561 #define TGSI_OPCODE_D2U 215 562 #define TGSI_OPCODE_U2D 216 563 #define TGSI_OPCODE_DRSQ 217 /* eg, cayman also has DRSQ */ 564 #define TGSI_OPCODE_DTRUNC 218 /* nvc0 */ 565 #define TGSI_OPCODE_DCEIL 219 /* nvc0 */ 566 #define TGSI_OPCODE_DFLR 220 /* nvc0 */ 567 #define TGSI_OPCODE_DROUND 221 /* nvc0 */ 568 #define TGSI_OPCODE_DSSG 222 569 #define TGSI_OPCODE_DDIV 223 570 #define TGSI_OPCODE_CLOCK 224 571 572 /* opcodes for ARB_gpu_shader_int64 */ 573 #define TGSI_OPCODE_I64ABS 225 574 #define TGSI_OPCODE_I64NEG 226 575 #define TGSI_OPCODE_I64SSG 227 576 #define TGSI_OPCODE_I64SLT 228 577 #define TGSI_OPCODE_I64SGE 229 578 #define TGSI_OPCODE_I64MIN 230 579 #define TGSI_OPCODE_I64MAX 231 580 #define TGSI_OPCODE_I64SHR 232 581 #define TGSI_OPCODE_I64DIV 233 582 #define TGSI_OPCODE_I64MOD 234 583 #define TGSI_OPCODE_F2I64 235 584 #define TGSI_OPCODE_U2I64 236 585 #define TGSI_OPCODE_I2I64 237 586 #define TGSI_OPCODE_D2I64 238 587 #define TGSI_OPCODE_I642F 239 588 #define TGSI_OPCODE_I642D 240 589 590 #define TGSI_OPCODE_U64ADD 241 591 #define TGSI_OPCODE_U64MUL 242 592 #define TGSI_OPCODE_U64SEQ 243 593 #define TGSI_OPCODE_U64SNE 244 594 #define TGSI_OPCODE_U64SLT 245 595 #define TGSI_OPCODE_U64SGE 246 596 #define TGSI_OPCODE_U64MIN 247 597 #define TGSI_OPCODE_U64MAX 248 598 #define TGSI_OPCODE_U64SHL 249 599 #define TGSI_OPCODE_U64SHR 250 600 #define TGSI_OPCODE_U64DIV 251 601 #define TGSI_OPCODE_U64MOD 252 602 #define TGSI_OPCODE_F2U64 253 603 #define TGSI_OPCODE_D2U64 254 604 #define TGSI_OPCODE_U642F 255 605 #define TGSI_OPCODE_U642D 256 606 607 #define TGSI_OPCODE_LAST 257 608 609 /** 610 * Opcode is the operation code to execute. A given operation defines the 611 * semantics how the source registers (if any) are interpreted and what is 612 * written to the destination registers (if any) as a result of execution. 613 * 614 * NumDstRegs and NumSrcRegs is the number of destination and source registers, 615 * respectively. For a given operation code, those numbers are fixed and are 616 * present here only for convenience. 617 * 618 * Saturate controls how are final results in destination registers modified. 619 */ 620 621 /* 622 * VIRGLRENDERER specific - 623 * we no long keep this in sync with mesa, we had to increase the NrTokens 624 * as mesa can remove old opcodes, but the renderer cannot. 625 */ 626 struct tgsi_instruction 627 { 628 unsigned Type : 4; /* TGSI_TOKEN_TYPE_INSTRUCTION */ 629 unsigned NrTokens : 9; /* UINT */ 630 unsigned Opcode : 8; /* TGSI_OPCODE_ */ 631 unsigned Saturate : 1; /* BOOL */ 632 unsigned NumDstRegs : 2; /* UINT */ 633 unsigned NumSrcRegs : 4; /* UINT */ 634 unsigned Label : 1; 635 unsigned Texture : 1; 636 unsigned Memory : 1; 637 unsigned Precise : 1; 638 }; 639 640 /* 641 * If tgsi_instruction::Label is TRUE, tgsi_instruction_label follows. 642 * 643 * If tgsi_instruction::Texture is TRUE, tgsi_instruction_texture follows. 644 * if texture instruction has a number of offsets, 645 * then tgsi_instruction::Texture::NumOffset of tgsi_texture_offset follow. 646 * 647 * Then, tgsi_instruction::NumDstRegs of tgsi_dst_register follow. 648 * 649 * Then, tgsi_instruction::NumSrcRegs of tgsi_src_register follow. 650 * 651 * tgsi_instruction::NrTokens contains the total number of words that make the 652 * instruction, including the instruction word. 653 */ 654 655 #define TGSI_SWIZZLE_X 0 656 #define TGSI_SWIZZLE_Y 1 657 #define TGSI_SWIZZLE_Z 2 658 #define TGSI_SWIZZLE_W 3 659 660 struct tgsi_instruction_label 661 { 662 unsigned Label : 24; /* UINT */ 663 unsigned Padding : 8; 664 }; 665 666 #define TGSI_TEXTURE_BUFFER 0 667 #define TGSI_TEXTURE_1D 1 668 #define TGSI_TEXTURE_2D 2 669 #define TGSI_TEXTURE_3D 3 670 #define TGSI_TEXTURE_CUBE 4 671 #define TGSI_TEXTURE_RECT 5 672 #define TGSI_TEXTURE_SHADOW1D 6 673 #define TGSI_TEXTURE_SHADOW2D 7 674 #define TGSI_TEXTURE_SHADOWRECT 8 675 #define TGSI_TEXTURE_1D_ARRAY 9 676 #define TGSI_TEXTURE_2D_ARRAY 10 677 #define TGSI_TEXTURE_SHADOW1D_ARRAY 11 678 #define TGSI_TEXTURE_SHADOW2D_ARRAY 12 679 #define TGSI_TEXTURE_SHADOWCUBE 13 680 #define TGSI_TEXTURE_2D_MSAA 14 681 #define TGSI_TEXTURE_2D_ARRAY_MSAA 15 682 #define TGSI_TEXTURE_CUBE_ARRAY 16 683 #define TGSI_TEXTURE_SHADOWCUBE_ARRAY 17 684 #define TGSI_TEXTURE_UNKNOWN 18 685 #define TGSI_TEXTURE_COUNT 19 686 687 struct tgsi_instruction_texture 688 { 689 unsigned Texture : 8; /* TGSI_TEXTURE_ */ 690 unsigned NumOffsets : 4; 691 unsigned Padding : 20; 692 }; 693 694 /* for texture offsets in GLSL and DirectX. 695 * Generally these always come from TGSI_FILE_IMMEDIATE, 696 * however DX11 appears to have the capability to do 697 * non-constant texture offsets. 698 */ 699 struct tgsi_texture_offset 700 { 701 int Index : 16; 702 unsigned File : 4; /**< one of TGSI_FILE_x */ 703 unsigned SwizzleX : 2; /* TGSI_SWIZZLE_x */ 704 unsigned SwizzleY : 2; /* TGSI_SWIZZLE_x */ 705 unsigned SwizzleZ : 2; /* TGSI_SWIZZLE_x */ 706 unsigned Padding : 6; 707 }; 708 709 /** 710 * File specifies the register array to access. 711 * 712 * Index specifies the element number of a register in the register file. 713 * 714 * If Indirect is TRUE, Index should be offset by the X component of the indirect 715 * register that follows. The register can be now fetched into local storage 716 * for further processing. 717 * 718 * If Negate is TRUE, all components of the fetched register are negated. 719 * 720 * The fetched register components are swizzled according to SwizzleX, SwizzleY, 721 * SwizzleZ and SwizzleW. 722 * 723 */ 724 725 struct tgsi_src_register 726 { 727 unsigned File : 4; /* TGSI_FILE_ */ 728 unsigned Indirect : 1; /* BOOL */ 729 unsigned Dimension : 1; /* BOOL */ 730 int Index : 16; /* SINT */ 731 unsigned SwizzleX : 2; /* TGSI_SWIZZLE_ */ 732 unsigned SwizzleY : 2; /* TGSI_SWIZZLE_ */ 733 unsigned SwizzleZ : 2; /* TGSI_SWIZZLE_ */ 734 unsigned SwizzleW : 2; /* TGSI_SWIZZLE_ */ 735 unsigned Absolute : 1; /* BOOL */ 736 unsigned Negate : 1; /* BOOL */ 737 }; 738 739 /** 740 * If tgsi_src_register::Indirect is TRUE, tgsi_ind_register follows. 741 * 742 * File, Index and Swizzle are handled the same as in tgsi_src_register. 743 * 744 * If ArrayID is zero the whole register file might be indirectly addressed, 745 * if not only the Declaration with this ArrayID is accessed by this operand. 746 * 747 */ 748 749 struct tgsi_ind_register 750 { 751 unsigned File : 4; /* TGSI_FILE_ */ 752 int Index : 16; /* SINT */ 753 unsigned Swizzle : 2; /* TGSI_SWIZZLE_ */ 754 unsigned ArrayID : 10; /* UINT */ 755 }; 756 757 /** 758 * If tgsi_src_register::Dimension is TRUE, tgsi_dimension follows. 759 */ 760 761 struct tgsi_dimension 762 { 763 unsigned Indirect : 1; /* BOOL */ 764 unsigned Dimension : 1; /* BOOL */ 765 unsigned Padding : 14; 766 int Index : 16; /* SINT */ 767 }; 768 769 struct tgsi_dst_register 770 { 771 unsigned File : 4; /* TGSI_FILE_ */ 772 unsigned WriteMask : 4; /* TGSI_WRITEMASK_ */ 773 unsigned Indirect : 1; /* BOOL */ 774 unsigned Dimension : 1; /* BOOL */ 775 int Index : 16; /* SINT */ 776 unsigned Padding : 6; 777 }; 778 779 #define TGSI_MEMORY_COHERENT (1 << 0) 780 #define TGSI_MEMORY_RESTRICT (1 << 1) 781 #define TGSI_MEMORY_VOLATILE (1 << 2) 782 783 /** 784 * Specifies the type of memory access to do for the LOAD/STORE instruction. 785 */ 786 struct tgsi_instruction_memory 787 { 788 unsigned Qualifier : 3; /* TGSI_MEMORY_ */ 789 unsigned Texture : 8; /* only for images: TGSI_TEXTURE_ */ 790 unsigned Format : 10; /* only for images: PIPE_FORMAT_ */ 791 unsigned Padding : 11; 792 }; 793 794 #define TGSI_MEMBAR_SHADER_BUFFER (1 << 0) 795 #define TGSI_MEMBAR_ATOMIC_BUFFER (1 << 1) 796 #define TGSI_MEMBAR_SHADER_IMAGE (1 << 2) 797 #define TGSI_MEMBAR_SHARED (1 << 3) 798 #define TGSI_MEMBAR_THREAD_GROUP (1 << 4) 799 800 #ifdef __cplusplus 801 } 802 #endif 803 804 #endif /* P_SHADER_TOKENS_H */ 805