1 /*
2 * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <assert.h>
8 #include <string.h>
9 #include <libfdt.h>
10
11 #include <platform_def.h>
12
13 #include <common/debug.h>
14 #include <common/desc_image_load.h>
15 #include <common/tbbr/tbbr_img_def.h>
16 #if TRUSTED_BOARD_BOOT
17 #include <drivers/auth/mbedtls/mbedtls_config.h>
18 #if MEASURED_BOOT
19 #include <drivers/auth/crypto_mod.h>
20 #include <mbedtls/md.h>
21 #endif
22 #endif
23 #include <lib/fconf/fconf.h>
24 #include <lib/fconf/fconf_dyn_cfg_getter.h>
25 #include <lib/fconf/fconf_tbbr_getter.h>
26
27 #include <plat/arm/common/arm_dyn_cfg_helpers.h>
28 #include <plat/arm/common/plat_arm.h>
29
30 #if TRUSTED_BOARD_BOOT
31
32 static void *mbedtls_heap_addr;
33 static size_t mbedtls_heap_size;
34
35 /*
36 * This function is the implementation of the shared Mbed TLS heap between
37 * BL1 and BL2 for Arm platforms. The shared heap address is passed from BL1
38 * to BL2 with a pointer. This pointer resides inside the TB_FW_CONFIG file
39 * which is a DTB.
40 *
41 * This function is placed inside an #if directive for the below reasons:
42 * - To allocate space for the Mbed TLS heap --only if-- Trusted Board Boot
43 * is enabled.
44 * - This implementation requires the DTB to be present so that BL1 has a
45 * mechanism to pass the pointer to BL2.
46 */
arm_get_mbedtls_heap(void ** heap_addr,size_t * heap_size)47 int arm_get_mbedtls_heap(void **heap_addr, size_t *heap_size)
48 {
49 assert(heap_addr != NULL);
50 assert(heap_size != NULL);
51
52 #if defined(IMAGE_BL1) || BL2_AT_EL3
53
54 /* If in BL1 or BL2_AT_EL3 define a heap */
55 static unsigned char heap[TF_MBEDTLS_HEAP_SIZE];
56
57 *heap_addr = heap;
58 *heap_size = sizeof(heap);
59 mbedtls_heap_addr = heap;
60 mbedtls_heap_size = sizeof(heap);
61
62 #elif defined(IMAGE_BL2)
63
64 /* If in BL2, retrieve the already allocated heap's info from DTB */
65 *heap_addr = FCONF_GET_PROPERTY(tbbr, dyn_config, mbedtls_heap_addr);
66 *heap_size = FCONF_GET_PROPERTY(tbbr, dyn_config, mbedtls_heap_size);
67
68 #endif
69
70 return 0;
71 }
72
73 /*
74 * Puts the shared Mbed TLS heap information to the DTB.
75 * Executed only from BL1.
76 */
arm_bl1_set_mbedtls_heap(void)77 void arm_bl1_set_mbedtls_heap(void)
78 {
79 int err;
80 uintptr_t tb_fw_cfg_dtb;
81 const struct dyn_cfg_dtb_info_t *tb_fw_config_info;
82
83 /*
84 * If tb_fw_cfg_dtb==NULL then DTB is not present for the current
85 * platform. As such, we don't attempt to write to the DTB at all.
86 *
87 * If mbedtls_heap_addr==NULL, then it means we are using the default
88 * heap implementation. As such, BL2 will have its own heap for sure
89 * and hence there is no need to pass any information to the DTB.
90 *
91 * In the latter case, if we still wanted to write in the DTB the heap
92 * information, we would need to call plat_get_mbedtls_heap to retrieve
93 * the default heap's address and size.
94 */
95
96 tb_fw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, TB_FW_CONFIG_ID);
97 assert(tb_fw_config_info != NULL);
98
99 tb_fw_cfg_dtb = tb_fw_config_info->config_addr;
100
101 if ((tb_fw_cfg_dtb != 0UL) && (mbedtls_heap_addr != NULL)) {
102 /* As libfdt uses void *, we can't avoid this cast */
103 void *dtb = (void *)tb_fw_cfg_dtb;
104
105 err = arm_set_dtb_mbedtls_heap_info(dtb,
106 mbedtls_heap_addr, mbedtls_heap_size);
107 if (err < 0) {
108 ERROR("%swrite shared Mbed TLS heap information%s",
109 "BL1: unable to ", " to DTB\n");
110 panic();
111 }
112 #if !MEASURED_BOOT
113 /*
114 * Ensure that the info written to the DTB is visible to other
115 * images. It's critical because BL2 won't be able to proceed
116 * without the heap info.
117 *
118 * In MEASURED_BOOT case flushing is done in
119 * arm_bl1_set_bl2_hash() function which is called after heap
120 * information is written in the DTB.
121 */
122 flush_dcache_range(tb_fw_cfg_dtb, fdt_totalsize(dtb));
123 #endif /* !MEASURED_BOOT */
124 }
125 }
126
127 #if MEASURED_BOOT
128 /*
129 * Calculates and writes BL2 hash data to TB_FW_CONFIG DTB.
130 * Executed only from BL1.
131 */
arm_bl1_set_bl2_hash(const image_desc_t * image_desc)132 void arm_bl1_set_bl2_hash(const image_desc_t *image_desc)
133 {
134 unsigned char hash_data[MBEDTLS_MD_MAX_SIZE];
135 const image_info_t image_info = image_desc->image_info;
136 uintptr_t tb_fw_cfg_dtb;
137 int err;
138 const struct dyn_cfg_dtb_info_t *tb_fw_config_info;
139
140 tb_fw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, TB_FW_CONFIG_ID);
141 assert(tb_fw_config_info != NULL);
142
143 tb_fw_cfg_dtb = tb_fw_config_info->config_addr;
144
145 /*
146 * If tb_fw_cfg_dtb==NULL then DTB is not present for the current
147 * platform. As such, we cannot write to the DTB at all and pass
148 * measured data.
149 */
150 if (tb_fw_cfg_dtb == 0UL) {
151 panic();
152 }
153
154 /* Calculate hash */
155 err = crypto_mod_calc_hash(MBEDTLS_MD_ID,
156 (void *)image_info.image_base,
157 image_info.image_size, hash_data);
158 if (err != 0) {
159 ERROR("%scalculate%s\n", "BL1: unable to ",
160 " BL2 hash");
161 panic();
162 }
163
164 err = arm_set_bl2_hash_info((void *)tb_fw_cfg_dtb, hash_data);
165 if (err < 0) {
166 ERROR("%swrite%sdata%s\n", "BL1: unable to ",
167 " BL2 hash ", "to DTB\n");
168 panic();
169 }
170
171 /*
172 * Ensure that the info written to the DTB is visible to other
173 * images. It's critical because BL2 won't be able to proceed
174 * without the heap info and its hash data.
175 */
176 flush_dcache_range(tb_fw_cfg_dtb, fdt_totalsize((void *)tb_fw_cfg_dtb));
177 }
178
179 /*
180 * Reads TCG_DIGEST_SIZE bytes of BL2 hash data from the DTB.
181 * Executed only from BL2.
182 */
arm_bl2_get_hash(void * data)183 void arm_bl2_get_hash(void *data)
184 {
185 const void *bl2_hash;
186
187 assert(data != NULL);
188
189 /* Retrieve TCG_DIGEST_SIZE bytes of BL2 hash data from the DTB */
190 bl2_hash = FCONF_GET_PROPERTY(tbbr, dyn_config, bl2_hash_data);
191 (void)memcpy(data, bl2_hash, TCG_DIGEST_SIZE);
192 }
193 #endif /* MEASURED_BOOT */
194 #endif /* TRUSTED_BOARD_BOOT */
195
196 /*
197 * BL2 utility function to initialize dynamic configuration specified by
198 * FW_CONFIG. Populate the bl_mem_params_node_t of other FW_CONFIGs if
199 * specified in FW_CONFIG.
200 */
arm_bl2_dyn_cfg_init(void)201 void arm_bl2_dyn_cfg_init(void)
202 {
203 unsigned int i;
204 bl_mem_params_node_t *cfg_mem_params = NULL;
205 uintptr_t image_base;
206 uint32_t image_size;
207 const unsigned int config_ids[] = {
208 HW_CONFIG_ID,
209 SOC_FW_CONFIG_ID,
210 NT_FW_CONFIG_ID,
211 #if defined(SPD_tspd) || defined(SPD_spmd)
212 /* tos_fw_config is only present for TSPD/SPMD */
213 TOS_FW_CONFIG_ID
214 #endif
215 };
216
217 const struct dyn_cfg_dtb_info_t *dtb_info;
218
219 /* Iterate through all the fw config IDs */
220 for (i = 0; i < ARRAY_SIZE(config_ids); i++) {
221 /* Get the config load address and size from TB_FW_CONFIG */
222 cfg_mem_params = get_bl_mem_params_node(config_ids[i]);
223 if (cfg_mem_params == NULL) {
224 VERBOSE("%sHW_CONFIG in bl_mem_params_node\n",
225 "Couldn't find ");
226 continue;
227 }
228
229 dtb_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, config_ids[i]);
230 if (dtb_info == NULL) {
231 VERBOSE("%sconfig_id %d load info in TB_FW_CONFIG\n",
232 "Couldn't find ", config_ids[i]);
233 continue;
234 }
235
236 image_base = dtb_info->config_addr;
237 image_size = dtb_info->config_max_size;
238
239 /*
240 * Do some runtime checks on the load addresses of soc_fw_config,
241 * tos_fw_config, nt_fw_config. This is not a comprehensive check
242 * of all invalid addresses but to prevent trivial porting errors.
243 */
244 if (config_ids[i] != HW_CONFIG_ID) {
245
246 if (check_uptr_overflow(image_base, image_size)) {
247 continue;
248 }
249 #ifdef BL31_BASE
250 /* Ensure the configs don't overlap with BL31 */
251 if ((image_base >= BL31_BASE) &&
252 (image_base <= BL31_LIMIT)) {
253 continue;
254 }
255 #endif
256 /* Ensure the configs are loaded in a valid address */
257 if (image_base < ARM_BL_RAM_BASE) {
258 continue;
259 }
260 #ifdef BL32_BASE
261 /*
262 * If BL32 is present, ensure that the configs don't
263 * overlap with it.
264 */
265 if ((image_base >= BL32_BASE) &&
266 (image_base <= BL32_LIMIT)) {
267 continue;
268 }
269 #endif
270 }
271
272 cfg_mem_params->image_info.image_base = image_base;
273 cfg_mem_params->image_info.image_max_size = (uint32_t)image_size;
274
275 /*
276 * Remove the IMAGE_ATTRIB_SKIP_LOADING attribute from
277 * HW_CONFIG or FW_CONFIG nodes
278 */
279 cfg_mem_params->image_info.h.attr &= ~IMAGE_ATTRIB_SKIP_LOADING;
280 }
281 }
282