1 /******************************************************************************
2 *
3 * Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 ******************************************************************************/
18 /**
19 *******************************************************************************
20 * @file
21 *  ihevcd_api.c
22 *
23 * @brief
24 *  Contains api functions definitions for HEVC decoder
25 *
26 * @author
27 *  Harish
28 *
29 * @par List of Functions:
30 * - api_check_struct_sanity()
31 * - ihevcd_get_version()
32 * - ihevcd_set_default_params()
33 * - ihevcd_init()
34 * - ihevcd_get_num_rec()
35 * - ihevcd_allocate_static_bufs()
36 * - ihevcd_create()
37 * - ihevcd_retrieve_memrec()
38 * - ihevcd_set_display_frame()
39 * - ihevcd_set_flush_mode()
40 * - ihevcd_get_status()
41 * - ihevcd_get_buf_info()
42 * - ihevcd_set_params()
43 * - ihevcd_reset()
44 * - ihevcd_rel_display_frame()
45 * - ihevcd_disable_deblk()
46 * - ihevcd_get_frame_dimensions()
47 * - ihevcd_set_num_cores()
48 * - ihevcd_ctl()
49 * - ihevcd_cxa_api_function()
50 *
51 * @remarks
52 *  None
53 *
54 *******************************************************************************
55 */
56 /*****************************************************************************/
57 /* File Includes                                                             */
58 /*****************************************************************************/
59 #include <stdio.h>
60 #include <stddef.h>
61 #include <stdlib.h>
62 #include <string.h>
63 
64 #include "ihevc_typedefs.h"
65 #include "iv.h"
66 #include "ivd.h"
67 #include "ihevcd_cxa.h"
68 #include "ithread.h"
69 
70 #include "ihevc_defs.h"
71 #include "ihevc_debug.h"
72 
73 #include "ihevc_structs.h"
74 #include "ihevc_macros.h"
75 #include "ihevc_platform_macros.h"
76 
77 #include "ihevc_buf_mgr.h"
78 #include "ihevc_dpb_mgr.h"
79 #include "ihevc_disp_mgr.h"
80 #include "ihevc_common_tables.h"
81 #include "ihevc_cabac_tables.h"
82 #include "ihevc_error.h"
83 
84 #include "ihevcd_defs.h"
85 #include "ihevcd_trace.h"
86 
87 #include "ihevcd_function_selector.h"
88 #include "ihevcd_structs.h"
89 #include "ihevcd_error.h"
90 #include "ihevcd_utils.h"
91 #include "ihevcd_decode.h"
92 #include "ihevcd_job_queue.h"
93 #include "ihevcd_statistics.h"
94 
95 
96 #define ALIGNED_FREE(ps_codec, y) \
97 if(y) {ps_codec->pf_aligned_free(ps_codec->pv_mem_ctxt, ((void *)y)); (y) = NULL;}
98 
99 /*****************************************************************************/
100 /* Function Prototypes                                                       */
101 /*****************************************************************************/
102 IV_API_CALL_STATUS_T ihevcd_get_version(CHAR *pc_version_string,
103                                         UWORD32 u4_version_buffer_size);
104 WORD32 ihevcd_free_dynamic_bufs(codec_t *ps_codec);
105 
106 
107 /**
108 *******************************************************************************
109 *
110 * @brief
111 *  Used to test arguments for corresponding API call
112 *
113 * @par Description:
114 *  For each command the arguments are validated
115 *
116 * @param[in] ps_handle
117 *  Codec handle at API level
118 *
119 * @param[in] pv_api_ip
120 *  Pointer to input structure
121 *
122 * @param[out] pv_api_op
123 *  Pointer to output structure
124 *
125 * @returns  Status of error checking
126 *
127 * @remarks
128 *
129 *
130 *******************************************************************************
131 */
132 
api_check_struct_sanity(iv_obj_t * ps_handle,void * pv_api_ip,void * pv_api_op)133 static IV_API_CALL_STATUS_T api_check_struct_sanity(iv_obj_t *ps_handle,
134                                                     void *pv_api_ip,
135                                                     void *pv_api_op)
136 {
137     IVD_API_COMMAND_TYPE_T e_cmd;
138     UWORD32 *pu4_api_ip;
139     UWORD32 *pu4_api_op;
140     WORD32 i;
141 
142     if(NULL == pv_api_op)
143         return (IV_FAIL);
144 
145     if(NULL == pv_api_ip)
146         return (IV_FAIL);
147 
148     pu4_api_ip = (UWORD32 *)pv_api_ip;
149     pu4_api_op = (UWORD32 *)pv_api_op;
150     e_cmd = (IVD_API_COMMAND_TYPE_T)*(pu4_api_ip + 1);
151 
152     *(pu4_api_op + 1) = 0;
153     /* error checks on handle */
154     switch((WORD32)e_cmd)
155     {
156         case IVD_CMD_CREATE:
157             break;
158 
159         case IVD_CMD_REL_DISPLAY_FRAME:
160         case IVD_CMD_SET_DISPLAY_FRAME:
161         case IVD_CMD_GET_DISPLAY_FRAME:
162         case IVD_CMD_VIDEO_DECODE:
163         case IVD_CMD_DELETE:
164         case IVD_CMD_VIDEO_CTL:
165             if(ps_handle == NULL)
166             {
167                 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
168                 *(pu4_api_op + 1) |= IVD_HANDLE_NULL;
169                 return IV_FAIL;
170             }
171 
172             if(ps_handle->u4_size != sizeof(iv_obj_t))
173             {
174                 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
175                 *(pu4_api_op + 1) |= IVD_HANDLE_STRUCT_SIZE_INCORRECT;
176                 return IV_FAIL;
177             }
178 
179 
180             if(ps_handle->pv_codec_handle == NULL)
181             {
182                 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
183                 *(pu4_api_op + 1) |= IVD_INVALID_HANDLE_NULL;
184                 return IV_FAIL;
185             }
186             break;
187         default:
188             *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
189             *(pu4_api_op + 1) |= IVD_INVALID_API_CMD;
190             return IV_FAIL;
191     }
192 
193     switch((WORD32)e_cmd)
194     {
195         case IVD_CMD_CREATE:
196         {
197             ihevcd_cxa_create_ip_t *ps_ip = (ihevcd_cxa_create_ip_t *)pv_api_ip;
198             ihevcd_cxa_create_op_t *ps_op = (ihevcd_cxa_create_op_t *)pv_api_op;
199 
200 
201             ps_op->s_ivd_create_op_t.u4_error_code = 0;
202 
203             if((ps_ip->s_ivd_create_ip_t.u4_size > sizeof(ihevcd_cxa_create_ip_t))
204                             || (ps_ip->s_ivd_create_ip_t.u4_size
205                                             < sizeof(ivd_create_ip_t)))
206             {
207                 ps_op->s_ivd_create_op_t.u4_error_code |= 1
208                                 << IVD_UNSUPPORTEDPARAM;
209                 ps_op->s_ivd_create_op_t.u4_error_code |=
210                                 IVD_IP_API_STRUCT_SIZE_INCORRECT;
211 
212                 return (IV_FAIL);
213             }
214 
215             if((ps_op->s_ivd_create_op_t.u4_size != sizeof(ihevcd_cxa_create_op_t))
216                             && (ps_op->s_ivd_create_op_t.u4_size
217                                             != sizeof(ivd_create_op_t)))
218             {
219                 ps_op->s_ivd_create_op_t.u4_error_code |= 1
220                                 << IVD_UNSUPPORTEDPARAM;
221                 ps_op->s_ivd_create_op_t.u4_error_code |=
222                                 IVD_OP_API_STRUCT_SIZE_INCORRECT;
223 
224                 return (IV_FAIL);
225             }
226 
227 
228             if((ps_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420P)
229                             && (ps_ip->s_ivd_create_ip_t.e_output_format
230                                             != IV_YUV_422ILE)
231                             && (ps_ip->s_ivd_create_ip_t.e_output_format
232                                             != IV_RGB_565)
233                             && (ps_ip->s_ivd_create_ip_t.e_output_format
234                                             != IV_YUV_420SP_UV)
235                             && (ps_ip->s_ivd_create_ip_t.e_output_format
236                                             != IV_YUV_420SP_VU))
237             {
238                 ps_op->s_ivd_create_op_t.u4_error_code |= 1
239                                 << IVD_UNSUPPORTEDPARAM;
240                 ps_op->s_ivd_create_op_t.u4_error_code |=
241                                 IVD_INIT_DEC_COL_FMT_NOT_SUPPORTED;
242 
243                 return (IV_FAIL);
244             }
245 
246         }
247             break;
248 
249         case IVD_CMD_GET_DISPLAY_FRAME:
250         {
251             ihevcd_cxa_get_display_frame_ip_t *ps_ip =
252                             (ihevcd_cxa_get_display_frame_ip_t *)pv_api_ip;
253             ihevcd_cxa_get_display_frame_op_t *ps_op =
254                             (ihevcd_cxa_get_display_frame_op_t *)pv_api_op;
255 
256             ps_op->s_ivd_get_display_frame_op_t.u4_error_code = 0;
257 
258             if((ps_ip->s_ivd_get_display_frame_ip_t.u4_size
259                             != sizeof(ihevcd_cxa_get_display_frame_ip_t))
260                             && (ps_ip->s_ivd_get_display_frame_ip_t.u4_size
261                                             != sizeof(ivd_get_display_frame_ip_t)))
262             {
263                 ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1
264                                 << IVD_UNSUPPORTEDPARAM;
265                 ps_op->s_ivd_get_display_frame_op_t.u4_error_code |=
266                                 IVD_IP_API_STRUCT_SIZE_INCORRECT;
267                 return (IV_FAIL);
268             }
269 
270             if((ps_op->s_ivd_get_display_frame_op_t.u4_size
271                             != sizeof(ihevcd_cxa_get_display_frame_op_t))
272                             && (ps_op->s_ivd_get_display_frame_op_t.u4_size
273                                             != sizeof(ivd_get_display_frame_op_t)))
274             {
275                 ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1
276                                 << IVD_UNSUPPORTEDPARAM;
277                 ps_op->s_ivd_get_display_frame_op_t.u4_error_code |=
278                                 IVD_OP_API_STRUCT_SIZE_INCORRECT;
279                 return (IV_FAIL);
280             }
281 
282         }
283             break;
284 
285         case IVD_CMD_REL_DISPLAY_FRAME:
286         {
287             ihevcd_cxa_rel_display_frame_ip_t *ps_ip =
288                             (ihevcd_cxa_rel_display_frame_ip_t *)pv_api_ip;
289             ihevcd_cxa_rel_display_frame_op_t *ps_op =
290                             (ihevcd_cxa_rel_display_frame_op_t *)pv_api_op;
291 
292             ps_op->s_ivd_rel_display_frame_op_t.u4_error_code = 0;
293 
294             if((ps_ip->s_ivd_rel_display_frame_ip_t.u4_size
295                             != sizeof(ihevcd_cxa_rel_display_frame_ip_t))
296                             && (ps_ip->s_ivd_rel_display_frame_ip_t.u4_size
297                                             != sizeof(ivd_rel_display_frame_ip_t)))
298             {
299                 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= 1
300                                 << IVD_UNSUPPORTEDPARAM;
301                 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |=
302                                 IVD_IP_API_STRUCT_SIZE_INCORRECT;
303                 return (IV_FAIL);
304             }
305 
306             if((ps_op->s_ivd_rel_display_frame_op_t.u4_size
307                             != sizeof(ihevcd_cxa_rel_display_frame_op_t))
308                             && (ps_op->s_ivd_rel_display_frame_op_t.u4_size
309                                             != sizeof(ivd_rel_display_frame_op_t)))
310             {
311                 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= 1
312                                 << IVD_UNSUPPORTEDPARAM;
313                 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |=
314                                 IVD_OP_API_STRUCT_SIZE_INCORRECT;
315                 return (IV_FAIL);
316             }
317 
318         }
319             break;
320 
321         case IVD_CMD_SET_DISPLAY_FRAME:
322         {
323             ihevcd_cxa_set_display_frame_ip_t *ps_ip =
324                             (ihevcd_cxa_set_display_frame_ip_t *)pv_api_ip;
325             ihevcd_cxa_set_display_frame_op_t *ps_op =
326                             (ihevcd_cxa_set_display_frame_op_t *)pv_api_op;
327             UWORD32 j;
328 
329             ps_op->s_ivd_set_display_frame_op_t.u4_error_code = 0;
330 
331             if((ps_ip->s_ivd_set_display_frame_ip_t.u4_size
332                             != sizeof(ihevcd_cxa_set_display_frame_ip_t))
333                             && (ps_ip->s_ivd_set_display_frame_ip_t.u4_size
334                                             != sizeof(ivd_set_display_frame_ip_t)))
335             {
336                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
337                                 << IVD_UNSUPPORTEDPARAM;
338                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
339                                 IVD_IP_API_STRUCT_SIZE_INCORRECT;
340                 return (IV_FAIL);
341             }
342 
343             if((ps_op->s_ivd_set_display_frame_op_t.u4_size
344                             != sizeof(ihevcd_cxa_set_display_frame_op_t))
345                             && (ps_op->s_ivd_set_display_frame_op_t.u4_size
346                                             != sizeof(ivd_set_display_frame_op_t)))
347             {
348                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
349                                 << IVD_UNSUPPORTEDPARAM;
350                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
351                                 IVD_OP_API_STRUCT_SIZE_INCORRECT;
352                 return (IV_FAIL);
353             }
354 
355             if(ps_ip->s_ivd_set_display_frame_ip_t.num_disp_bufs == 0)
356             {
357                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
358                                 << IVD_UNSUPPORTEDPARAM;
359                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
360                                 IVD_DISP_FRM_ZERO_OP_BUFS;
361                 return IV_FAIL;
362             }
363 
364             for(j = 0; j < ps_ip->s_ivd_set_display_frame_ip_t.num_disp_bufs;
365                             j++)
366             {
367                 if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_num_bufs
368                                 == 0)
369                 {
370                     ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
371                                     << IVD_UNSUPPORTEDPARAM;
372                     ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
373                                     IVD_DISP_FRM_ZERO_OP_BUFS;
374                     return IV_FAIL;
375                 }
376 
377                 for(i = 0;
378                                 i
379                                                 < (WORD32)ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_num_bufs;
380                                 i++)
381                 {
382                     if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].pu1_bufs[i]
383                                     == NULL)
384                     {
385                         ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
386                                         << IVD_UNSUPPORTEDPARAM;
387                         ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
388                                         IVD_DISP_FRM_OP_BUF_NULL;
389                         return IV_FAIL;
390                     }
391 
392                     if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_min_out_buf_size[i]
393                                     == 0)
394                     {
395                         ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
396                                         << IVD_UNSUPPORTEDPARAM;
397                         ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
398                                         IVD_DISP_FRM_ZERO_OP_BUF_SIZE;
399                         return IV_FAIL;
400                     }
401                 }
402             }
403         }
404             break;
405 
406         case IVD_CMD_VIDEO_DECODE:
407         {
408             ihevcd_cxa_video_decode_ip_t *ps_ip =
409                             (ihevcd_cxa_video_decode_ip_t *)pv_api_ip;
410             ihevcd_cxa_video_decode_op_t *ps_op =
411                             (ihevcd_cxa_video_decode_op_t *)pv_api_op;
412 
413             DEBUG("The input bytes is: %d",
414                             ps_ip->s_ivd_video_decode_ip_t.u4_num_Bytes);
415             ps_op->s_ivd_video_decode_op_t.u4_error_code = 0;
416 
417             if(ps_ip->s_ivd_video_decode_ip_t.u4_size
418                             != sizeof(ihevcd_cxa_video_decode_ip_t)
419                             && ps_ip->s_ivd_video_decode_ip_t.u4_size
420                                             != offsetof(ivd_video_decode_ip_t,
421                                                         s_out_buffer))
422             {
423                 ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1
424                                 << IVD_UNSUPPORTEDPARAM;
425                 ps_op->s_ivd_video_decode_op_t.u4_error_code |=
426                                 IVD_IP_API_STRUCT_SIZE_INCORRECT;
427                 return (IV_FAIL);
428             }
429 
430             if(ps_op->s_ivd_video_decode_op_t.u4_size
431                             != sizeof(ihevcd_cxa_video_decode_op_t)
432                             && ps_op->s_ivd_video_decode_op_t.u4_size
433                                             != offsetof(ivd_video_decode_op_t,
434                                                         u4_output_present))
435             {
436                 ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1
437                                 << IVD_UNSUPPORTEDPARAM;
438                 ps_op->s_ivd_video_decode_op_t.u4_error_code |=
439                                 IVD_OP_API_STRUCT_SIZE_INCORRECT;
440                 return (IV_FAIL);
441             }
442 
443         }
444             break;
445 
446         case IVD_CMD_DELETE:
447         {
448             ihevcd_cxa_delete_ip_t *ps_ip =
449                             (ihevcd_cxa_delete_ip_t *)pv_api_ip;
450             ihevcd_cxa_delete_op_t *ps_op =
451                             (ihevcd_cxa_delete_op_t *)pv_api_op;
452 
453             ps_op->s_ivd_delete_op_t.u4_error_code = 0;
454 
455             if(ps_ip->s_ivd_delete_ip_t.u4_size
456                             != sizeof(ihevcd_cxa_delete_ip_t))
457             {
458                 ps_op->s_ivd_delete_op_t.u4_error_code |= 1
459                                 << IVD_UNSUPPORTEDPARAM;
460                 ps_op->s_ivd_delete_op_t.u4_error_code |=
461                                 IVD_IP_API_STRUCT_SIZE_INCORRECT;
462                 return (IV_FAIL);
463             }
464 
465             if(ps_op->s_ivd_delete_op_t.u4_size
466                             != sizeof(ihevcd_cxa_delete_op_t))
467             {
468                 ps_op->s_ivd_delete_op_t.u4_error_code |= 1
469                                 << IVD_UNSUPPORTEDPARAM;
470                 ps_op->s_ivd_delete_op_t.u4_error_code |=
471                                 IVD_OP_API_STRUCT_SIZE_INCORRECT;
472                 return (IV_FAIL);
473             }
474 
475         }
476             break;
477 
478         case IVD_CMD_VIDEO_CTL:
479         {
480             UWORD32 *pu4_ptr_cmd;
481             UWORD32 sub_command;
482 
483             pu4_ptr_cmd = (UWORD32 *)pv_api_ip;
484             pu4_ptr_cmd += 2;
485             sub_command = *pu4_ptr_cmd;
486 
487             switch(sub_command)
488             {
489                 case IVD_CMD_CTL_SETPARAMS:
490                 {
491                     ihevcd_cxa_ctl_set_config_ip_t *ps_ip;
492                     ihevcd_cxa_ctl_set_config_op_t *ps_op;
493                     ps_ip = (ihevcd_cxa_ctl_set_config_ip_t *)pv_api_ip;
494                     ps_op = (ihevcd_cxa_ctl_set_config_op_t *)pv_api_op;
495 
496                     if(ps_ip->s_ivd_ctl_set_config_ip_t.u4_size
497                                     != sizeof(ihevcd_cxa_ctl_set_config_ip_t))
498                     {
499                         ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= 1
500                                         << IVD_UNSUPPORTEDPARAM;
501                         ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |=
502                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
503                         return IV_FAIL;
504                     }
505                 }
506                     //no break; is needed here
507                 case IVD_CMD_CTL_SETDEFAULT:
508                 {
509                     ihevcd_cxa_ctl_set_config_op_t *ps_op;
510                     ps_op = (ihevcd_cxa_ctl_set_config_op_t *)pv_api_op;
511                     if(ps_op->s_ivd_ctl_set_config_op_t.u4_size
512                                     != sizeof(ihevcd_cxa_ctl_set_config_op_t))
513                     {
514                         ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= 1
515                                         << IVD_UNSUPPORTEDPARAM;
516                         ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |=
517                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
518                         return IV_FAIL;
519                     }
520                 }
521                     break;
522 
523                 case IVD_CMD_CTL_GETPARAMS:
524                 {
525                     ihevcd_cxa_ctl_getstatus_ip_t *ps_ip;
526                     ihevcd_cxa_ctl_getstatus_op_t *ps_op;
527 
528                     ps_ip = (ihevcd_cxa_ctl_getstatus_ip_t *)pv_api_ip;
529                     ps_op = (ihevcd_cxa_ctl_getstatus_op_t *)pv_api_op;
530                     if(ps_ip->s_ivd_ctl_getstatus_ip_t.u4_size
531                                     != sizeof(ihevcd_cxa_ctl_getstatus_ip_t))
532                     {
533                         ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= 1
534                                         << IVD_UNSUPPORTEDPARAM;
535                         ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |=
536                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
537                         return IV_FAIL;
538                     }
539                     if((ps_op->s_ivd_ctl_getstatus_op_t.u4_size
540                                     != sizeof(ihevcd_cxa_ctl_getstatus_op_t)) &&
541                        (ps_op->s_ivd_ctl_getstatus_op_t.u4_size
542                                     != sizeof(ivd_ctl_getstatus_op_t)))
543                     {
544                         ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= 1
545                                         << IVD_UNSUPPORTEDPARAM;
546                         ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |=
547                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
548                         return IV_FAIL;
549                     }
550                 }
551                     break;
552 
553                 case IVD_CMD_CTL_GETBUFINFO:
554                 {
555                     ihevcd_cxa_ctl_getbufinfo_ip_t *ps_ip;
556                     ihevcd_cxa_ctl_getbufinfo_op_t *ps_op;
557                     ps_ip = (ihevcd_cxa_ctl_getbufinfo_ip_t *)pv_api_ip;
558                     ps_op = (ihevcd_cxa_ctl_getbufinfo_op_t *)pv_api_op;
559 
560                     if(ps_ip->s_ivd_ctl_getbufinfo_ip_t.u4_size
561                                     != sizeof(ihevcd_cxa_ctl_getbufinfo_ip_t))
562                     {
563                         ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= 1
564                                         << IVD_UNSUPPORTEDPARAM;
565                         ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |=
566                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
567                         return IV_FAIL;
568                     }
569                     if(ps_op->s_ivd_ctl_getbufinfo_op_t.u4_size
570                                     != sizeof(ihevcd_cxa_ctl_getbufinfo_op_t))
571                     {
572                         ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= 1
573                                         << IVD_UNSUPPORTEDPARAM;
574                         ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |=
575                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
576                         return IV_FAIL;
577                     }
578                 }
579                     break;
580 
581                 case IVD_CMD_CTL_GETVERSION:
582                 {
583                     ihevcd_cxa_ctl_getversioninfo_ip_t *ps_ip;
584                     ihevcd_cxa_ctl_getversioninfo_op_t *ps_op;
585                     ps_ip = (ihevcd_cxa_ctl_getversioninfo_ip_t *)pv_api_ip;
586                     ps_op = (ihevcd_cxa_ctl_getversioninfo_op_t *)pv_api_op;
587                     if(ps_ip->s_ivd_ctl_getversioninfo_ip_t.u4_size
588                                     != sizeof(ihevcd_cxa_ctl_getversioninfo_ip_t))
589                     {
590                         ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= 1
591                                         << IVD_UNSUPPORTEDPARAM;
592                         ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |=
593                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
594                         return IV_FAIL;
595                     }
596                     if(ps_op->s_ivd_ctl_getversioninfo_op_t.u4_size
597                                     != sizeof(ihevcd_cxa_ctl_getversioninfo_op_t))
598                     {
599                         ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= 1
600                                         << IVD_UNSUPPORTEDPARAM;
601                         ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |=
602                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
603                         return IV_FAIL;
604                     }
605                 }
606                     break;
607 
608                 case IVD_CMD_CTL_FLUSH:
609                 {
610                     ihevcd_cxa_ctl_flush_ip_t *ps_ip;
611                     ihevcd_cxa_ctl_flush_op_t *ps_op;
612                     ps_ip = (ihevcd_cxa_ctl_flush_ip_t *)pv_api_ip;
613                     ps_op = (ihevcd_cxa_ctl_flush_op_t *)pv_api_op;
614                     if(ps_ip->s_ivd_ctl_flush_ip_t.u4_size
615                                     != sizeof(ihevcd_cxa_ctl_flush_ip_t))
616                     {
617                         ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= 1
618                                         << IVD_UNSUPPORTEDPARAM;
619                         ps_op->s_ivd_ctl_flush_op_t.u4_error_code |=
620                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
621                         return IV_FAIL;
622                     }
623                     if(ps_op->s_ivd_ctl_flush_op_t.u4_size
624                                     != sizeof(ihevcd_cxa_ctl_flush_op_t))
625                     {
626                         ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= 1
627                                         << IVD_UNSUPPORTEDPARAM;
628                         ps_op->s_ivd_ctl_flush_op_t.u4_error_code |=
629                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
630                         return IV_FAIL;
631                     }
632                 }
633                     break;
634 
635                 case IVD_CMD_CTL_RESET:
636                 {
637                     ihevcd_cxa_ctl_reset_ip_t *ps_ip;
638                     ihevcd_cxa_ctl_reset_op_t *ps_op;
639                     ps_ip = (ihevcd_cxa_ctl_reset_ip_t *)pv_api_ip;
640                     ps_op = (ihevcd_cxa_ctl_reset_op_t *)pv_api_op;
641                     if(ps_ip->s_ivd_ctl_reset_ip_t.u4_size
642                                     != sizeof(ihevcd_cxa_ctl_reset_ip_t))
643                     {
644                         ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= 1
645                                         << IVD_UNSUPPORTEDPARAM;
646                         ps_op->s_ivd_ctl_reset_op_t.u4_error_code |=
647                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
648                         return IV_FAIL;
649                     }
650                     if(ps_op->s_ivd_ctl_reset_op_t.u4_size
651                                     != sizeof(ihevcd_cxa_ctl_reset_op_t))
652                     {
653                         ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= 1
654                                         << IVD_UNSUPPORTEDPARAM;
655                         ps_op->s_ivd_ctl_reset_op_t.u4_error_code |=
656                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
657                         return IV_FAIL;
658                     }
659                 }
660                     break;
661                 case IHEVCD_CXA_CMD_CTL_DEGRADE:
662                 {
663                     ihevcd_cxa_ctl_degrade_ip_t *ps_ip;
664                     ihevcd_cxa_ctl_degrade_op_t *ps_op;
665 
666                     ps_ip = (ihevcd_cxa_ctl_degrade_ip_t *)pv_api_ip;
667                     ps_op = (ihevcd_cxa_ctl_degrade_op_t *)pv_api_op;
668 
669                     if(ps_ip->u4_size
670                                     != sizeof(ihevcd_cxa_ctl_degrade_ip_t))
671                     {
672                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
673                         ps_op->u4_error_code |=
674                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
675                         return IV_FAIL;
676                     }
677 
678                     if(ps_op->u4_size
679                                     != sizeof(ihevcd_cxa_ctl_degrade_op_t))
680                     {
681                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
682                         ps_op->u4_error_code |=
683                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
684                         return IV_FAIL;
685                     }
686 
687                     if((ps_ip->i4_degrade_pics < 0) ||
688                        (ps_ip->i4_degrade_pics > 4) ||
689                        (ps_ip->i4_nondegrade_interval < 0) ||
690                        (ps_ip->i4_degrade_type < 0) ||
691                        (ps_ip->i4_degrade_type > 15))
692                     {
693                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
694                         return IV_FAIL;
695                     }
696 
697                     break;
698                 }
699 
700                 case IHEVCD_CXA_CMD_CTL_GET_BUFFER_DIMENSIONS:
701                 {
702                     ihevcd_cxa_ctl_get_frame_dimensions_ip_t *ps_ip;
703                     ihevcd_cxa_ctl_get_frame_dimensions_op_t *ps_op;
704 
705                     ps_ip =
706                                     (ihevcd_cxa_ctl_get_frame_dimensions_ip_t *)pv_api_ip;
707                     ps_op =
708                                     (ihevcd_cxa_ctl_get_frame_dimensions_op_t *)pv_api_op;
709 
710                     if(ps_ip->u4_size
711                                     != sizeof(ihevcd_cxa_ctl_get_frame_dimensions_ip_t))
712                     {
713                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
714                         ps_op->u4_error_code |=
715                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
716                         return IV_FAIL;
717                     }
718 
719                     if(ps_op->u4_size
720                                     != sizeof(ihevcd_cxa_ctl_get_frame_dimensions_op_t))
721                     {
722                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
723                         ps_op->u4_error_code |=
724                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
725                         return IV_FAIL;
726                     }
727 
728                     break;
729                 }
730 
731                 case IHEVCD_CXA_CMD_CTL_GET_VUI_PARAMS:
732                 {
733                     ihevcd_cxa_ctl_get_vui_params_ip_t *ps_ip;
734                     ihevcd_cxa_ctl_get_vui_params_op_t *ps_op;
735 
736                     ps_ip =
737                                     (ihevcd_cxa_ctl_get_vui_params_ip_t *)pv_api_ip;
738                     ps_op =
739                                     (ihevcd_cxa_ctl_get_vui_params_op_t *)pv_api_op;
740 
741                     if(ps_ip->u4_size
742                                     != sizeof(ihevcd_cxa_ctl_get_vui_params_ip_t))
743                     {
744                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
745                         ps_op->u4_error_code |=
746                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
747                         return IV_FAIL;
748                     }
749 
750                     if(ps_op->u4_size
751                                     != sizeof(ihevcd_cxa_ctl_get_vui_params_op_t))
752                     {
753                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
754                         ps_op->u4_error_code |=
755                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
756                         return IV_FAIL;
757                     }
758 
759                     break;
760                 }
761                 case IHEVCD_CXA_CMD_CTL_GET_SEI_MASTERING_PARAMS:
762                 {
763                     ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *ps_ip;
764                     ihevcd_cxa_ctl_get_sei_mastering_params_op_t *ps_op;
765 
766                     ps_ip = (ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *)pv_api_ip;
767                     ps_op = (ihevcd_cxa_ctl_get_sei_mastering_params_op_t *)pv_api_op;
768 
769                     if(ps_ip->u4_size
770                                     != sizeof(ihevcd_cxa_ctl_get_sei_mastering_params_ip_t))
771                     {
772                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
773                         ps_op->u4_error_code |=
774                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
775                         return IV_FAIL;
776                     }
777 
778                     if(ps_op->u4_size
779                                     != sizeof(ihevcd_cxa_ctl_get_sei_mastering_params_op_t))
780                     {
781                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
782                         ps_op->u4_error_code |=
783                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
784                         return IV_FAIL;
785                     }
786 
787                     break;
788                 }
789                 case IHEVCD_CXA_CMD_CTL_SET_NUM_CORES:
790                 {
791                     ihevcd_cxa_ctl_set_num_cores_ip_t *ps_ip;
792                     ihevcd_cxa_ctl_set_num_cores_op_t *ps_op;
793 
794                     ps_ip = (ihevcd_cxa_ctl_set_num_cores_ip_t *)pv_api_ip;
795                     ps_op = (ihevcd_cxa_ctl_set_num_cores_op_t *)pv_api_op;
796 
797                     if(ps_ip->u4_size
798                                     != sizeof(ihevcd_cxa_ctl_set_num_cores_ip_t))
799                     {
800                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
801                         ps_op->u4_error_code |=
802                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
803                         return IV_FAIL;
804                     }
805 
806                     if(ps_op->u4_size
807                                     != sizeof(ihevcd_cxa_ctl_set_num_cores_op_t))
808                     {
809                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
810                         ps_op->u4_error_code |=
811                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
812                         return IV_FAIL;
813                     }
814 
815 #ifdef MULTICORE
816                     if((ps_ip->u4_num_cores < 1) || (ps_ip->u4_num_cores > MAX_NUM_CORES))
817 #else
818                     if(ps_ip->u4_num_cores != 1)
819 #endif
820                         {
821                             ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
822                             return IV_FAIL;
823                         }
824                     break;
825                 }
826                 case IHEVCD_CXA_CMD_CTL_SET_PROCESSOR:
827                 {
828                     ihevcd_cxa_ctl_set_processor_ip_t *ps_ip;
829                     ihevcd_cxa_ctl_set_processor_op_t *ps_op;
830 
831                     ps_ip = (ihevcd_cxa_ctl_set_processor_ip_t *)pv_api_ip;
832                     ps_op = (ihevcd_cxa_ctl_set_processor_op_t *)pv_api_op;
833 
834                     if(ps_ip->u4_size
835                                     != sizeof(ihevcd_cxa_ctl_set_processor_ip_t))
836                     {
837                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
838                         ps_op->u4_error_code |=
839                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
840                         return IV_FAIL;
841                     }
842 
843                     if(ps_op->u4_size
844                                     != sizeof(ihevcd_cxa_ctl_set_processor_op_t))
845                     {
846                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
847                         ps_op->u4_error_code |=
848                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
849                         return IV_FAIL;
850                     }
851 
852                     break;
853                 }
854                 default:
855                     *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
856                     *(pu4_api_op + 1) |= IVD_UNSUPPORTED_API_CMD;
857                     return IV_FAIL;
858             }
859         }
860             break;
861         default:
862             *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
863             *(pu4_api_op + 1) |= IVD_UNSUPPORTED_API_CMD;
864             return IV_FAIL;
865     }
866 
867     return IV_SUCCESS;
868 }
869 
870 
871 /**
872 *******************************************************************************
873 *
874 * @brief
875 *  Sets default dynamic parameters
876 *
877 * @par Description:
878 *  Sets default dynamic parameters. Will be called in ihevcd_init() to ensure
879 * that even if set_params is not called, codec  continues to work
880 *
881 * @param[in] ps_codec_obj
882 *  Pointer to codec object at API level
883 *
884 * @param[in] pv_api_ip
885 *  Pointer to input argument structure
886 *
887 * @param[out] pv_api_op
888 *  Pointer to output argument structure
889 *
890 * @returns  Status
891 *
892 * @remarks
893 *
894 *
895 *******************************************************************************
896 */
ihevcd_set_default_params(codec_t * ps_codec)897 WORD32 ihevcd_set_default_params(codec_t *ps_codec)
898 {
899 
900     WORD32 ret = IV_SUCCESS;
901 
902     ps_codec->e_pic_skip_mode = IVD_SKIP_NONE;
903     ps_codec->i4_strd = 0;
904     ps_codec->i4_disp_strd = 0;
905     ps_codec->i4_header_mode = 0;
906     ps_codec->e_pic_out_order = IVD_DISPLAY_FRAME_OUT;
907     return ret;
908 }
909 
ihevcd_update_function_ptr(codec_t * ps_codec)910 void ihevcd_update_function_ptr(codec_t *ps_codec)
911 {
912 
913     /* Init inter pred function array */
914     ps_codec->apf_inter_pred[0] = NULL;
915     ps_codec->apf_inter_pred[1] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_copy_fptr;
916     ps_codec->apf_inter_pred[2] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_fptr;
917     ps_codec->apf_inter_pred[3] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_fptr;
918     ps_codec->apf_inter_pred[4] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_w16out_fptr;
919     ps_codec->apf_inter_pred[5] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_copy_w16out_fptr;
920     ps_codec->apf_inter_pred[6] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_w16out_fptr;
921     ps_codec->apf_inter_pred[7] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_w16out_fptr;
922     ps_codec->apf_inter_pred[8] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_w16out_fptr;
923     ps_codec->apf_inter_pred[9] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_w16inp_fptr;
924     ps_codec->apf_inter_pred[10] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_w16inp_w16out_fptr;
925     ps_codec->apf_inter_pred[11] = NULL;
926     ps_codec->apf_inter_pred[12] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_copy_fptr;
927     ps_codec->apf_inter_pred[13] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_fptr;
928     ps_codec->apf_inter_pred[14] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_fptr;
929     ps_codec->apf_inter_pred[15] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_w16out_fptr;
930     ps_codec->apf_inter_pred[16] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_copy_w16out_fptr;
931     ps_codec->apf_inter_pred[17] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_w16out_fptr;
932     ps_codec->apf_inter_pred[18] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_w16out_fptr;
933     ps_codec->apf_inter_pred[19] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_w16out_fptr;
934     ps_codec->apf_inter_pred[20] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_w16inp_fptr;
935     ps_codec->apf_inter_pred[21] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_w16inp_w16out_fptr;
936 
937     /* Init intra pred function array */
938     ps_codec->apf_intra_pred_luma[0] = (pf_intra_pred)NULL;
939     ps_codec->apf_intra_pred_luma[1] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_planar_fptr;
940     ps_codec->apf_intra_pred_luma[2] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_dc_fptr;
941     ps_codec->apf_intra_pred_luma[3] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode2_fptr;
942     ps_codec->apf_intra_pred_luma[4] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_3_to_9_fptr;
943     ps_codec->apf_intra_pred_luma[5] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_horz_fptr;
944     ps_codec->apf_intra_pred_luma[6] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_11_to_17_fptr;
945     ps_codec->apf_intra_pred_luma[7] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_18_34_fptr;
946     ps_codec->apf_intra_pred_luma[8] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_19_to_25_fptr;
947     ps_codec->apf_intra_pred_luma[9] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_ver_fptr;
948     ps_codec->apf_intra_pred_luma[10] =  (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_27_to_33_fptr;
949 
950     ps_codec->apf_intra_pred_chroma[0] = (pf_intra_pred)NULL;
951     ps_codec->apf_intra_pred_chroma[1] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_planar_fptr;
952     ps_codec->apf_intra_pred_chroma[2] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_dc_fptr;
953     ps_codec->apf_intra_pred_chroma[3] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode2_fptr;
954     ps_codec->apf_intra_pred_chroma[4] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_3_to_9_fptr;
955     ps_codec->apf_intra_pred_chroma[5] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_horz_fptr;
956     ps_codec->apf_intra_pred_chroma[6] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_11_to_17_fptr;
957     ps_codec->apf_intra_pred_chroma[7] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_18_34_fptr;
958     ps_codec->apf_intra_pred_chroma[8] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_19_to_25_fptr;
959     ps_codec->apf_intra_pred_chroma[9] =  (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_ver_fptr;
960     ps_codec->apf_intra_pred_chroma[10] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_27_to_33_fptr;
961 
962     /* Init itrans_recon function array */
963     ps_codec->apf_itrans_recon[0] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_4x4_ttype1_fptr;
964     ps_codec->apf_itrans_recon[1] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_4x4_fptr;
965     ps_codec->apf_itrans_recon[2] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_8x8_fptr;
966     ps_codec->apf_itrans_recon[3] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_16x16_fptr;
967     ps_codec->apf_itrans_recon[4] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_32x32_fptr;
968     ps_codec->apf_itrans_recon[5] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_chroma_itrans_recon_4x4_fptr;
969     ps_codec->apf_itrans_recon[6] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_chroma_itrans_recon_8x8_fptr;
970     ps_codec->apf_itrans_recon[7] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_chroma_itrans_recon_16x16_fptr;
971 
972     /* Init recon function array */
973     ps_codec->apf_recon[0] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_4x4_ttype1_fptr;
974     ps_codec->apf_recon[1] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_4x4_fptr;
975     ps_codec->apf_recon[2] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_8x8_fptr;
976     ps_codec->apf_recon[3] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_16x16_fptr;
977     ps_codec->apf_recon[4] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_32x32_fptr;
978     ps_codec->apf_recon[5] = (pf_recon)ps_codec->s_func_selector.ihevc_chroma_recon_4x4_fptr;
979     ps_codec->apf_recon[6] = (pf_recon)ps_codec->s_func_selector.ihevc_chroma_recon_8x8_fptr;
980     ps_codec->apf_recon[7] = (pf_recon)ps_codec->s_func_selector.ihevc_chroma_recon_16x16_fptr;
981 
982     /* Init itrans_recon_dc function array */
983     ps_codec->apf_itrans_recon_dc[0] = (pf_itrans_recon_dc)ps_codec->s_func_selector.ihevcd_itrans_recon_dc_luma_fptr;
984     ps_codec->apf_itrans_recon_dc[1] = (pf_itrans_recon_dc)ps_codec->s_func_selector.ihevcd_itrans_recon_dc_chroma_fptr;
985 
986     /* Init sao function array */
987     ps_codec->apf_sao_luma[0] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class0_fptr;
988     ps_codec->apf_sao_luma[1] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class1_fptr;
989     ps_codec->apf_sao_luma[2] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class2_fptr;
990     ps_codec->apf_sao_luma[3] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class3_fptr;
991 
992     ps_codec->apf_sao_chroma[0] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class0_chroma_fptr;
993     ps_codec->apf_sao_chroma[1] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class1_chroma_fptr;
994     ps_codec->apf_sao_chroma[2] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class2_chroma_fptr;
995     ps_codec->apf_sao_chroma[3] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class3_chroma_fptr;
996 }
997 /**
998 *******************************************************************************
999 *
1000 * @brief
1001 *  Initialize the context. This will be called by  create and during
1002 * reset
1003 *
1004 * @par Description:
1005 *  Initializes the context
1006 *
1007 * @param[in] ps_codec
1008 *  Codec context pointer
1009 *
1010 * @returns  Status
1011 *
1012 * @remarks
1013 *
1014 *
1015 *******************************************************************************
1016 */
ihevcd_init(codec_t * ps_codec)1017 WORD32 ihevcd_init(codec_t *ps_codec)
1018 {
1019     WORD32 status = IV_SUCCESS;
1020     WORD32 i;
1021 
1022     /* Free any dynamic buffers that are allocated */
1023     ihevcd_free_dynamic_bufs(ps_codec);
1024 
1025     ps_codec->u4_allocate_dynamic_done = 0;
1026     ps_codec->i4_num_disp_bufs = 1;
1027     ps_codec->i4_flush_mode = 0;
1028 
1029     ps_codec->i4_ht = ps_codec->i4_disp_ht = 0;
1030     ps_codec->i4_wd = ps_codec->i4_disp_wd = 0;
1031     ps_codec->i4_strd = 0;
1032     ps_codec->i4_disp_strd = 0;
1033     ps_codec->i4_num_cores = 1;
1034 
1035     ps_codec->u4_pic_cnt = 0;
1036     ps_codec->u4_disp_cnt = 0;
1037 
1038     ps_codec->i4_header_mode = 0;
1039     ps_codec->i4_header_in_slice_mode = 0;
1040     ps_codec->i4_sps_done = 0;
1041     ps_codec->i4_pps_done = 0;
1042     ps_codec->i4_init_done   = 1;
1043     ps_codec->i4_first_pic_done = 0;
1044     ps_codec->s_parse.i4_first_pic_init = 0;
1045     ps_codec->i4_error_code = 0;
1046     ps_codec->i4_reset_flag = 0;
1047     ps_codec->i4_cra_as_first_pic = 1;
1048     ps_codec->i4_rasl_output_flag = 0;
1049 
1050     ps_codec->i4_prev_poc_msb = 0;
1051     ps_codec->i4_prev_poc_lsb = -1;
1052     ps_codec->i4_max_prev_poc_lsb = -1;
1053     ps_codec->s_parse.i4_abs_pic_order_cnt = -1;
1054 
1055     /* Set ref chroma format by default to 420SP UV interleaved */
1056     ps_codec->e_ref_chroma_fmt = IV_YUV_420SP_UV;
1057 
1058     /* If the codec is in shared mode and required format is 420 SP VU interleaved then change
1059      * reference buffers chroma format
1060      */
1061     if(IV_YUV_420SP_VU == ps_codec->e_chroma_fmt)
1062     {
1063         ps_codec->e_ref_chroma_fmt = IV_YUV_420SP_VU;
1064     }
1065 
1066 
1067 
1068     ps_codec->i4_disable_deblk_pic = 0;
1069 
1070     ps_codec->i4_degrade_pic_cnt    = 0;
1071     ps_codec->i4_degrade_pics       = 0;
1072     ps_codec->i4_degrade_type       = 0;
1073     ps_codec->i4_disable_sao_pic    = 0;
1074     ps_codec->i4_fullpel_inter_pred = 0;
1075     ps_codec->u4_enable_fmt_conv_ahead = 0;
1076     ps_codec->i4_share_disp_buf_cnt = 0;
1077 
1078     {
1079         sps_t *ps_sps = ps_codec->ps_sps_base;
1080         pps_t *ps_pps = ps_codec->ps_pps_base;
1081 
1082         for(i = 0; i < MAX_SPS_CNT; i++)
1083         {
1084             ps_sps->i1_sps_valid = 0;
1085             ps_sps++;
1086         }
1087 
1088         for(i = 0; i < MAX_PPS_CNT; i++)
1089         {
1090             ps_pps->i1_pps_valid = 0;
1091             ps_pps++;
1092         }
1093     }
1094 
1095     ihevcd_set_default_params(ps_codec);
1096     /* Initialize MV Bank buffer manager */
1097     ihevc_buf_mgr_init((buf_mgr_t *)ps_codec->pv_mv_buf_mgr);
1098 
1099     /* Initialize Picture buffer manager */
1100     ihevc_buf_mgr_init((buf_mgr_t *)ps_codec->pv_pic_buf_mgr);
1101 
1102     ps_codec->ps_pic_buf = (pic_buf_t *)ps_codec->pv_pic_buf_base;
1103 
1104     memset(ps_codec->ps_pic_buf, 0, BUF_MGR_MAX_CNT  * sizeof(pic_buf_t));
1105 
1106 
1107 
1108     /* Initialize display buffer manager */
1109     ihevc_disp_mgr_init((disp_mgr_t *)ps_codec->pv_disp_buf_mgr);
1110 
1111     /* Initialize dpb manager */
1112     ihevc_dpb_mgr_init((dpb_mgr_t *)ps_codec->pv_dpb_mgr);
1113 
1114     ps_codec->e_processor_soc = SOC_GENERIC;
1115     /* The following can be over-ridden using soc parameter as a hack */
1116     ps_codec->u4_nctb = 0x7FFFFFFF;
1117     ihevcd_init_arch(ps_codec);
1118 
1119     ihevcd_init_function_ptr(ps_codec);
1120 
1121     ihevcd_update_function_ptr(ps_codec);
1122 
1123     return status;
1124 }
1125 
1126 /**
1127 *******************************************************************************
1128 *
1129 * @brief
1130 *  Allocate static memory for the codec
1131 *
1132 * @par Description:
1133 *  Allocates static memory for the codec
1134 *
1135 * @param[in] pv_api_ip
1136 *  Pointer to input argument structure
1137 *
1138 * @param[out] pv_api_op
1139 *  Pointer to output argument structure
1140 *
1141 * @returns  Status
1142 *
1143 * @remarks
1144 *
1145 *
1146 *******************************************************************************
1147 */
ihevcd_allocate_static_bufs(iv_obj_t ** pps_codec_obj,ihevcd_cxa_create_ip_t * ps_create_ip,ihevcd_cxa_create_op_t * ps_create_op)1148 WORD32 ihevcd_allocate_static_bufs(iv_obj_t **pps_codec_obj,
1149                                    ihevcd_cxa_create_ip_t *ps_create_ip,
1150                                    ihevcd_cxa_create_op_t *ps_create_op)
1151 {
1152     WORD32 size;
1153     void *pv_buf;
1154     UWORD8 *pu1_buf;
1155     WORD32 i;
1156     codec_t *ps_codec;
1157     IV_API_CALL_STATUS_T status = IV_SUCCESS;
1158     void *(*pf_aligned_alloc)(void *pv_mem_ctxt, WORD32 alignment, WORD32 size);
1159     void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
1160     void *pv_mem_ctxt;
1161 
1162     /* Request memory for HEVCD object */
1163     ps_create_op->s_ivd_create_op_t.pv_handle = NULL;
1164 
1165     pf_aligned_alloc = ps_create_ip->s_ivd_create_ip_t.pf_aligned_alloc;
1166     pf_aligned_free = ps_create_ip->s_ivd_create_ip_t.pf_aligned_free;
1167     pv_mem_ctxt  = ps_create_ip->s_ivd_create_ip_t.pv_mem_ctxt;
1168 
1169 
1170     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, sizeof(iv_obj_t));
1171     RETURN_IF((NULL == pv_buf), IV_FAIL);
1172     memset(pv_buf, 0, sizeof(iv_obj_t));
1173     *pps_codec_obj = (iv_obj_t *)pv_buf;
1174     ps_create_op->s_ivd_create_op_t.pv_handle = *pps_codec_obj;
1175 
1176 
1177     (*pps_codec_obj)->pv_codec_handle = NULL;
1178     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, sizeof(codec_t));
1179     RETURN_IF((NULL == pv_buf), IV_FAIL);
1180     (*pps_codec_obj)->pv_codec_handle = (codec_t *)pv_buf;
1181     ps_codec = (codec_t *)pv_buf;
1182 
1183     memset(ps_codec, 0, sizeof(codec_t));
1184 
1185 #ifndef LOGO_EN
1186     ps_codec->i4_share_disp_buf = ps_create_ip->s_ivd_create_ip_t.u4_share_disp_buf;
1187 #else
1188     ps_codec->i4_share_disp_buf = 0;
1189 #endif
1190 
1191     /* Shared display mode is supported only for 420SP and 420P formats */
1192     if((ps_create_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420P) &&
1193        (ps_create_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420SP_UV) &&
1194        (ps_create_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420SP_VU))
1195     {
1196         ps_codec->i4_share_disp_buf = 0;
1197     }
1198 
1199     ps_codec->e_chroma_fmt = ps_create_ip->s_ivd_create_ip_t.e_output_format;
1200 
1201     ps_codec->pf_aligned_alloc = pf_aligned_alloc;
1202     ps_codec->pf_aligned_free = pf_aligned_free;
1203     ps_codec->pv_mem_ctxt = pv_mem_ctxt;
1204 
1205     /* Request memory to hold thread handles for each processing thread */
1206     size = MAX_PROCESS_THREADS * ithread_get_handle_size();
1207     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1208     RETURN_IF((NULL == pv_buf), IV_FAIL);
1209     memset(pv_buf, 0, size);
1210 
1211     for(i = 0; i < MAX_PROCESS_THREADS; i++)
1212     {
1213         WORD32 handle_size = ithread_get_handle_size();
1214         ps_codec->apv_process_thread_handle[i] =
1215                         (UWORD8 *)pv_buf + (i * handle_size);
1216     }
1217 
1218 #ifdef KEEP_THREADS_ACTIVE
1219     /* Request memory to hold mutex (start/done) for each processing thread */
1220     size = 2 * MAX_PROCESS_THREADS * ithread_get_mutex_lock_size();
1221     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1222     RETURN_IF((NULL == pv_buf), IV_FAIL);
1223     memset(pv_buf, 0, size);
1224 
1225     for(i = 0; i < MAX_PROCESS_THREADS; i++)
1226     {
1227         WORD32 ret;
1228         WORD32 mutex_size = ithread_get_mutex_lock_size();
1229         ps_codec->apv_proc_start_mutex[i] =
1230                         (UWORD8 *)pv_buf + (2 * i * mutex_size);
1231         ps_codec->apv_proc_done_mutex[i] =
1232                         (UWORD8 *)pv_buf + ((2 * i + 1) * mutex_size);
1233 
1234         ret = ithread_mutex_init(ps_codec->apv_proc_start_mutex[i]);
1235         RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1236 
1237         ret = ithread_mutex_init(ps_codec->apv_proc_done_mutex[i]);
1238         RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1239     }
1240 
1241     size = 2 * MAX_PROCESS_THREADS * ithread_get_cond_struct_size();
1242     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1243     RETURN_IF((NULL == pv_buf), IV_FAIL);
1244     memset(pv_buf, 0, size);
1245 
1246     for(i = 0; i < MAX_PROCESS_THREADS; i++)
1247     {
1248         WORD32 ret;
1249         WORD32 cond_size = ithread_get_cond_struct_size();
1250         ps_codec->apv_proc_start_condition[i] =
1251                         (UWORD8 *)pv_buf + (2 * i * cond_size);
1252         ps_codec->apv_proc_done_condition[i] =
1253                         (UWORD8 *)pv_buf + ((2 * i + 1) * cond_size);
1254 
1255         ret = ithread_cond_init(ps_codec->apv_proc_start_condition[i]);
1256         RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1257 
1258         ret = ithread_cond_init(ps_codec->apv_proc_done_condition[i]);
1259         RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1260     }
1261 
1262 #endif
1263 
1264     /* Request memory for static bitstream buffer which holds bitstream after emulation prevention */
1265     size = MIN_BITSBUF_SIZE;
1266     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size + 16); //Alloc extra for parse optimization
1267     RETURN_IF((NULL == pv_buf), IV_FAIL);
1268     memset(pv_buf, 0, size + 16);
1269     ps_codec->pu1_bitsbuf_static = pv_buf;
1270     ps_codec->u4_bitsbuf_size_static = size;
1271 
1272     /* size for holding display manager context */
1273     size = sizeof(buf_mgr_t);
1274     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1275     RETURN_IF((NULL == pv_buf), IV_FAIL);
1276     memset(pv_buf, 0, size);
1277     ps_codec->pv_disp_buf_mgr = pv_buf;
1278 
1279     /* size for holding dpb manager context */
1280     size = sizeof(dpb_mgr_t);
1281     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1282     RETURN_IF((NULL == pv_buf), IV_FAIL);
1283     memset(pv_buf, 0, size);
1284     ps_codec->pv_dpb_mgr = pv_buf;
1285 
1286     /* size for holding buffer manager context */
1287     size = sizeof(buf_mgr_t);
1288     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1289     RETURN_IF((NULL == pv_buf), IV_FAIL);
1290     memset(pv_buf, 0, size);
1291     ps_codec->pv_pic_buf_mgr = pv_buf;
1292 
1293     /* size for holding mv buffer manager context */
1294     size = sizeof(buf_mgr_t);
1295     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1296     RETURN_IF((NULL == pv_buf), IV_FAIL);
1297     memset(pv_buf, 0, size);
1298     ps_codec->pv_mv_buf_mgr = pv_buf;
1299 
1300     size = MAX_VPS_CNT * sizeof(vps_t);
1301     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1302     RETURN_IF((NULL == pv_buf), IV_FAIL);
1303     memset(pv_buf, 0, size);
1304     ps_codec->ps_vps_base = pv_buf;
1305     ps_codec->s_parse.ps_vps_base = ps_codec->ps_vps_base;
1306 
1307     size = MAX_SPS_CNT * sizeof(sps_t);
1308     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1309     RETURN_IF((NULL == pv_buf), IV_FAIL);
1310     memset(pv_buf, 0, size);
1311     ps_codec->ps_sps_base = pv_buf;
1312     ps_codec->s_parse.ps_sps_base = ps_codec->ps_sps_base;
1313 
1314     size = MAX_PPS_CNT * sizeof(pps_t);
1315     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1316     RETURN_IF((NULL == pv_buf), IV_FAIL);
1317     memset(pv_buf, 0, size);
1318     ps_codec->ps_pps_base = pv_buf;
1319     ps_codec->s_parse.ps_pps_base = ps_codec->ps_pps_base;
1320 
1321     size = MAX_SLICE_HDR_CNT * sizeof(slice_header_t);
1322     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1323     RETURN_IF((NULL == pv_buf), IV_FAIL);
1324     memset(pv_buf, 0, size);
1325     ps_codec->ps_slice_hdr_base = (slice_header_t *)pv_buf;
1326     ps_codec->s_parse.ps_slice_hdr_base = ps_codec->ps_slice_hdr_base;
1327 
1328 
1329     SCALING_MAT_SIZE(size)
1330     size = (MAX_SPS_CNT + MAX_PPS_CNT) * size * sizeof(WORD16);
1331     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1332     RETURN_IF((NULL == pv_buf), IV_FAIL);
1333     memset(pv_buf, 0, size);
1334     ps_codec->pi2_scaling_mat = (WORD16 *)pv_buf;
1335 
1336 
1337     /* Size for holding pic_buf_t for each reference picture
1338      * Since this is only a structure allocation and not actual buffer allocation,
1339      * it is allocated for BUF_MGR_MAX_CNT entries
1340      */
1341     size = BUF_MGR_MAX_CNT * sizeof(pic_buf_t);
1342     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1343     RETURN_IF((NULL == pv_buf), IV_FAIL);
1344     memset(pv_buf, 0, size);
1345     ps_codec->pv_pic_buf_base = (UWORD8 *)pv_buf;
1346 
1347     /* TO hold scratch buffers needed for each SAO context */
1348     size = 4 * MAX_CTB_SIZE * MAX_CTB_SIZE;
1349 
1350     /* 2 temporary buffers*/
1351     size *= 2;
1352     size *= MAX_PROCESS_THREADS;
1353 
1354     pu1_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1355     RETURN_IF((NULL == pu1_buf), IV_FAIL);
1356     memset(pu1_buf, 0, size);
1357 
1358     for(i = 0; i < MAX_PROCESS_THREADS; i++)
1359     {
1360         ps_codec->as_process[i].s_sao_ctxt.pu1_tmp_buf_luma = (UWORD8 *)pu1_buf;
1361         pu1_buf += 4 * MAX_CTB_SIZE * MAX_CTB_SIZE * sizeof(UWORD8);
1362 
1363         ps_codec->as_process[i].s_sao_ctxt.pu1_tmp_buf_chroma = (UWORD8 *)pu1_buf;
1364         pu1_buf += 4 * MAX_CTB_SIZE * MAX_CTB_SIZE * sizeof(UWORD8);
1365     }
1366 
1367     /* Allocate intra pred modes buffer */
1368     /* 8 bits per 4x4 */
1369     /* 16 bytes each for top and left 64 pixels and 16 bytes for default mode */
1370     size =  3 * 16 * sizeof(UWORD8);
1371     pu1_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1372     RETURN_IF((NULL == pu1_buf), IV_FAIL);
1373     memset(pu1_buf, 0, size);
1374     ps_codec->s_parse.pu1_luma_intra_pred_mode_left = pu1_buf;
1375     ps_codec->s_parse.pu1_luma_intra_pred_mode_top  = pu1_buf + 16;
1376 
1377     {
1378         WORD32 inter_pred_tmp_buf_size, ntaps_luma;
1379         WORD32 pic_pu_idx_map_size;
1380 
1381         /* Max inter pred size */
1382         ntaps_luma = 8;
1383         inter_pred_tmp_buf_size = sizeof(WORD16) * (MAX_CTB_SIZE + ntaps_luma) * MAX_CTB_SIZE;
1384 
1385         inter_pred_tmp_buf_size = ALIGN64(inter_pred_tmp_buf_size);
1386 
1387         /* To hold pu_index w.r.t. frame level pu_t array for a CTB */
1388         pic_pu_idx_map_size = sizeof(WORD32) * (18 * 18);
1389         pic_pu_idx_map_size = ALIGN64(pic_pu_idx_map_size);
1390 
1391         size =  inter_pred_tmp_buf_size * 2;
1392         size += pic_pu_idx_map_size;
1393         size *= MAX_PROCESS_THREADS;
1394 
1395         pu1_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1396         RETURN_IF((NULL == pu1_buf), IV_FAIL);
1397         memset(pu1_buf, 0, size);
1398 
1399         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1400         {
1401             ps_codec->as_process[i].pi2_inter_pred_tmp_buf1 = (WORD16 *)pu1_buf;
1402             pu1_buf += inter_pred_tmp_buf_size;
1403 
1404             ps_codec->as_process[i].pi2_inter_pred_tmp_buf2 = (WORD16 *)pu1_buf;
1405             pu1_buf += inter_pred_tmp_buf_size;
1406 
1407             /* Inverse transform intermediate and inverse scan output buffers reuse inter pred scratch buffers */
1408             ps_codec->as_process[i].pi2_itrans_intrmd_buf =
1409                             ps_codec->as_process[i].pi2_inter_pred_tmp_buf2;
1410             ps_codec->as_process[i].pi2_invscan_out =
1411                             ps_codec->as_process[i].pi2_inter_pred_tmp_buf1;
1412 
1413             ps_codec->as_process[i].pu4_pic_pu_idx_map = (UWORD32 *)pu1_buf;
1414             ps_codec->as_process[i].s_bs_ctxt.pu4_pic_pu_idx_map =
1415                             (UWORD32 *)pu1_buf;
1416             pu1_buf += pic_pu_idx_map_size;
1417 
1418             //   ps_codec->as_process[i].pi2_inter_pred_tmp_buf3 = (WORD16 *)pu1_buf;
1419             //   pu1_buf += inter_pred_tmp_buf_size;
1420 
1421             ps_codec->as_process[i].i4_inter_pred_tmp_buf_strd = MAX_CTB_SIZE;
1422 
1423         }
1424     }
1425     /* Initialize pointers in PPS structures */
1426     {
1427         sps_t *ps_sps = ps_codec->ps_sps_base;
1428         pps_t *ps_pps = ps_codec->ps_pps_base;
1429         WORD16 *pi2_scaling_mat =  ps_codec->pi2_scaling_mat;
1430         WORD32 scaling_mat_size;
1431 
1432         SCALING_MAT_SIZE(scaling_mat_size);
1433 
1434         for(i = 0; i < MAX_SPS_CNT; i++)
1435         {
1436             ps_sps->pi2_scaling_mat  = pi2_scaling_mat;
1437             pi2_scaling_mat += scaling_mat_size;
1438             ps_sps++;
1439         }
1440 
1441         for(i = 0; i < MAX_PPS_CNT; i++)
1442         {
1443             ps_pps->pi2_scaling_mat  = pi2_scaling_mat;
1444             pi2_scaling_mat += scaling_mat_size;
1445             ps_pps++;
1446         }
1447     }
1448 
1449     return (status);
1450 }
1451 
1452 /**
1453 *******************************************************************************
1454 *
1455 * @brief
1456 *  Free static memory for the codec
1457 *
1458 * @par Description:
1459 *  Free static memory for the codec
1460 *
1461 * @param[in] ps_codec
1462 *  Pointer to codec context
1463 *
1464 * @returns  Status
1465 *
1466 * @remarks
1467 *
1468 *
1469 *******************************************************************************
1470 */
ihevcd_free_static_bufs(iv_obj_t * ps_codec_obj)1471 WORD32 ihevcd_free_static_bufs(iv_obj_t *ps_codec_obj)
1472 {
1473     codec_t *ps_codec;
1474 
1475     void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
1476     void *pv_mem_ctxt;
1477 
1478     ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
1479     pf_aligned_free = ps_codec->pf_aligned_free;
1480     pv_mem_ctxt = ps_codec->pv_mem_ctxt;
1481 
1482 #ifdef KEEP_THREADS_ACTIVE
1483     /* Wait for threads */
1484     ps_codec->i4_break_threads = 1;
1485     for(int i = 0; i < MAX_PROCESS_THREADS; i++)
1486     {
1487         WORD32 ret;
1488         if(ps_codec->ai4_process_thread_created[i])
1489         {
1490             ret = ithread_mutex_lock(ps_codec->apv_proc_start_mutex[i]);
1491             RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1492 
1493             ps_codec->ai4_process_start[i] = 1;
1494             ret = ithread_cond_signal(ps_codec->apv_proc_start_condition[i]);
1495             RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1496 
1497             ret = ithread_mutex_unlock(ps_codec->apv_proc_start_mutex[i]);
1498             RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1499 
1500             ithread_join(ps_codec->apv_process_thread_handle[i], NULL);
1501 
1502             ps_codec->ai4_process_thread_created[i] = 0;
1503         }
1504         ret = ithread_cond_destroy(ps_codec->apv_proc_start_condition[i]);
1505         RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1506 
1507         ret = ithread_cond_destroy(ps_codec->apv_proc_done_condition[i]);
1508         RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1509 
1510         ret = ithread_mutex_destroy(ps_codec->apv_proc_start_mutex[i]);
1511         RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1512 
1513         ret = ithread_mutex_destroy(ps_codec->apv_proc_done_mutex[i]);
1514         RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1515     }
1516     ALIGNED_FREE(ps_codec, ps_codec->apv_proc_start_mutex[0]);
1517     ALIGNED_FREE(ps_codec, ps_codec->apv_proc_start_condition[0]);
1518 #endif
1519 
1520     ALIGNED_FREE(ps_codec, ps_codec->apv_process_thread_handle[0]);
1521     ALIGNED_FREE(ps_codec, ps_codec->pu1_bitsbuf_static);
1522 
1523     ALIGNED_FREE(ps_codec, ps_codec->pv_disp_buf_mgr);
1524     ALIGNED_FREE(ps_codec, ps_codec->pv_dpb_mgr);
1525     ALIGNED_FREE(ps_codec, ps_codec->pv_pic_buf_mgr);
1526     ALIGNED_FREE(ps_codec, ps_codec->pv_mv_buf_mgr);
1527     ALIGNED_FREE(ps_codec, ps_codec->ps_vps_base);
1528     ALIGNED_FREE(ps_codec, ps_codec->ps_sps_base);
1529     ALIGNED_FREE(ps_codec, ps_codec->ps_pps_base);
1530     ALIGNED_FREE(ps_codec, ps_codec->ps_slice_hdr_base);
1531     ALIGNED_FREE(ps_codec, ps_codec->pi2_scaling_mat);
1532     ALIGNED_FREE(ps_codec, ps_codec->pv_pic_buf_base);
1533     ALIGNED_FREE(ps_codec, ps_codec->s_parse.pu1_luma_intra_pred_mode_left);
1534     ALIGNED_FREE(ps_codec, ps_codec->as_process[0].s_sao_ctxt.pu1_tmp_buf_luma);
1535     ALIGNED_FREE(ps_codec, ps_codec->as_process[0].pi2_inter_pred_tmp_buf1);
1536     ALIGNED_FREE(ps_codec, ps_codec_obj->pv_codec_handle);
1537 
1538     if(ps_codec_obj)
1539     {
1540         pf_aligned_free(pv_mem_ctxt, ps_codec_obj);
1541     }
1542 
1543     return IV_SUCCESS;
1544 
1545 }
1546 
1547 
1548 /**
1549 *******************************************************************************
1550 *
1551 * @brief
1552 *  Allocate dynamic memory for the codec
1553 *
1554 * @par Description:
1555 *  Allocates dynamic memory for the codec
1556 *
1557 * @param[in] ps_codec
1558 *  Pointer to codec context
1559 *
1560 * @returns  Status
1561 *
1562 * @remarks
1563 *
1564 *
1565 *******************************************************************************
1566 */
ihevcd_allocate_dynamic_bufs(codec_t * ps_codec)1567 WORD32 ihevcd_allocate_dynamic_bufs(codec_t *ps_codec)
1568 {
1569     WORD32 max_tile_cols, max_tile_rows;
1570     WORD32 max_ctb_rows, max_ctb_cols;
1571     WORD32 max_num_cu_cols;
1572     WORD32 max_num_cu_rows;
1573     WORD32 max_num_4x4_cols;
1574     WORD32 max_ctb_cnt;
1575     WORD32 wd;
1576     WORD32 ht;
1577     WORD32 i;
1578     WORD32 max_dpb_size;
1579     void *pv_mem_ctxt = ps_codec->pv_mem_ctxt;
1580     void *pv_buf;
1581     UWORD8 *pu1_buf;
1582     WORD32 size;
1583 
1584     wd = ALIGN64(ps_codec->i4_wd);
1585     ht = ALIGN64(ps_codec->i4_ht);
1586 
1587     max_tile_cols = (wd + MIN_TILE_WD - 1) / MIN_TILE_WD;
1588     max_tile_rows = (ht + MIN_TILE_HT - 1) / MIN_TILE_HT;
1589     max_ctb_rows  = ht / MIN_CTB_SIZE;
1590     max_ctb_cols  = wd / MIN_CTB_SIZE;
1591     max_ctb_cnt   = max_ctb_rows * max_ctb_cols;
1592     max_num_cu_cols = wd / MIN_CU_SIZE;
1593     max_num_cu_rows = ht / MIN_CU_SIZE;
1594     max_num_4x4_cols = wd / 4;
1595 
1596     /* Allocate tile structures */
1597     size = max_tile_cols * max_tile_rows;
1598     size *= sizeof(tile_t);
1599     size *= MAX_PPS_CNT;
1600 
1601     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1602     RETURN_IF((NULL == pv_buf), IV_FAIL);
1603     memset(pv_buf, 0, size);
1604     ps_codec->ps_tile = (tile_t *)pv_buf;
1605 
1606 
1607     /* Allocate memory to hold entry point offsets */
1608     /* One entry point per tile */
1609     size = max_tile_cols * max_tile_rows;
1610 
1611     /* One entry point per row of CTBs */
1612     /*********************************************************************/
1613     /* Only tiles or entropy sync is enabled at a time in main           */
1614     /* profile, but since memory required does not increase too much,    */
1615     /* this allocation is done to handle both cases                      */
1616     /*********************************************************************/
1617     size  += max_ctb_rows;
1618     size *= sizeof(WORD32);
1619 
1620     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1621     RETURN_IF((NULL == pv_buf), IV_FAIL);
1622     memset(pv_buf, 0, size);
1623     ps_codec->pi4_entry_ofst = (WORD32 *)pv_buf;
1624 
1625     /* Allocate parse skip flag buffer */
1626     /* 1 bit per 8x8 */
1627     size = max_num_cu_cols / 8;
1628     size = ALIGN4(size);
1629     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1630     RETURN_IF((NULL == pv_buf), IV_FAIL);
1631     memset(pv_buf, 0, size);
1632     ps_codec->s_parse.pu4_skip_cu_top = (UWORD32 *)pv_buf;
1633 
1634     /* Allocate parse coding tree depth buffer */
1635     /* 2 bits per 8x8 */
1636     size =  max_num_cu_cols / 4;
1637     size = ALIGN4(size);
1638     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1639     RETURN_IF((NULL == pv_buf), IV_FAIL);
1640     memset(pv_buf, 0, size);
1641     ps_codec->s_parse.pu4_ct_depth_top = (UWORD32 *)pv_buf;
1642 
1643     /* Allocate intra flag buffer */
1644     /* 1 bit per 8x8 */
1645     size =  max_num_cu_cols * max_num_cu_rows / 8;
1646     size = ALIGN4(size);
1647     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1648     RETURN_IF((NULL == pv_buf), IV_FAIL);
1649     memset(pv_buf, 0, size);
1650     ps_codec->pu1_pic_intra_flag = (UWORD8 *)pv_buf;
1651     ps_codec->s_parse.pu1_pic_intra_flag = ps_codec->pu1_pic_intra_flag;
1652 
1653     /* Allocate transquant bypass flag buffer */
1654     /* 1 bit per 8x8 */
1655     /* Extra row and column are allocated for easy processing of top and left blocks while loop filtering */
1656     size =  ((max_num_cu_cols + 8) * (max_num_cu_rows + 8)) / 8;
1657     size = ALIGN4(size);
1658     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1659     RETURN_IF((NULL == pv_buf), IV_FAIL);
1660     memset(pv_buf, 1, size);
1661     {
1662         WORD32 loop_filter_strd = (wd + 63) >> 6;
1663         ps_codec->pu1_pic_no_loop_filter_flag_base = pv_buf;
1664         /* The offset is added for easy processing of top and left blocks while loop filtering */
1665         ps_codec->pu1_pic_no_loop_filter_flag = (UWORD8 *)pv_buf + loop_filter_strd + 1;
1666         ps_codec->s_parse.pu1_pic_no_loop_filter_flag = ps_codec->pu1_pic_no_loop_filter_flag;
1667         ps_codec->s_parse.s_deblk_ctxt.pu1_pic_no_loop_filter_flag = ps_codec->pu1_pic_no_loop_filter_flag;
1668         ps_codec->s_parse.s_sao_ctxt.pu1_pic_no_loop_filter_flag = ps_codec->pu1_pic_no_loop_filter_flag;
1669     }
1670 
1671     /* Initialize pointers in PPS structures */
1672     {
1673         pps_t *ps_pps = ps_codec->ps_pps_base;
1674         tile_t *ps_tile =  ps_codec->ps_tile;
1675 
1676         for(i = 0; i < MAX_PPS_CNT; i++)
1677         {
1678             ps_pps->ps_tile = ps_tile;
1679             ps_tile += (max_tile_cols * max_tile_rows);
1680             ps_pps++;
1681         }
1682 
1683     }
1684 
1685     /* Allocate memory for job queue */
1686 
1687     /* One job per row of CTBs */
1688     size  = max_ctb_rows;
1689 
1690     /* One each tile a row of CTBs, num_jobs has to incremented */
1691     size  *= max_tile_cols;
1692 
1693     /* One format convert/frame copy job per row of CTBs for non-shared mode*/
1694     size  += max_ctb_rows;
1695 
1696     size *= sizeof(proc_job_t);
1697 
1698     size += ihevcd_jobq_ctxt_size();
1699     size = ALIGN4(size);
1700 
1701     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1702     RETURN_IF((NULL == pv_buf), IV_FAIL);
1703     memset(pv_buf, 0, size);
1704     ps_codec->pv_proc_jobq_buf = pv_buf;
1705     ps_codec->i4_proc_jobq_buf_size = size;
1706 
1707     size =  max_ctb_cnt;
1708     size = ALIGN4(size);
1709     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1710     RETURN_IF((NULL == pv_buf), IV_FAIL);
1711     memset(pv_buf, 0, size);
1712     ps_codec->pu1_parse_map = (UWORD8 *)pv_buf;
1713 
1714     size =  max_ctb_cnt;
1715     size = ALIGN4(size);
1716     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1717     RETURN_IF((NULL == pv_buf), IV_FAIL);
1718     memset(pv_buf, 0, size);
1719     ps_codec->pu1_proc_map = (UWORD8 *)pv_buf;
1720 
1721     /** Holds top and left neighbor's pu idx into picture level pu array */
1722     /* Only one top row is enough but left has to be replicated for each process context */
1723     size =  (max_num_4x4_cols  /* left */ + MAX_PROCESS_THREADS * (MAX_CTB_SIZE / 4)/* top */ + 1/* top right */) * sizeof(WORD32);
1724     size = ALIGN4(size);
1725     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1726     RETURN_IF((NULL == pv_buf), IV_FAIL);
1727     memset(pv_buf, 0, size);
1728 
1729     for(i = 0; i < MAX_PROCESS_THREADS; i++)
1730     {
1731         UWORD32 *pu4_buf = (UWORD32 *)pv_buf;
1732         ps_codec->as_process[i].pu4_pic_pu_idx_left = pu4_buf + i * (MAX_CTB_SIZE / 4);
1733         memset(ps_codec->as_process[i].pu4_pic_pu_idx_left, 0, sizeof(UWORD32) * MAX_CTB_SIZE / 4);
1734         ps_codec->as_process[i].pu4_pic_pu_idx_top = pu4_buf + MAX_PROCESS_THREADS * (MAX_CTB_SIZE / 4);
1735     }
1736     memset(ps_codec->as_process[0].pu4_pic_pu_idx_top, 0, sizeof(UWORD32) * (wd / 4 + 1));
1737 
1738     {
1739         /* To hold SAO left buffer for luma */
1740         size  = sizeof(UWORD8) * (MAX(ht, wd));
1741 
1742         /* To hold SAO left buffer for chroma */
1743         size += sizeof(UWORD8) * (MAX(ht, wd));
1744 
1745         /* To hold SAO top buffer for luma */
1746         size += sizeof(UWORD8) * wd;
1747 
1748         /* To hold SAO top buffer for chroma */
1749         size += sizeof(UWORD8) * wd;
1750 
1751         /* To hold SAO top left luma pixel value for last output ctb in a row*/
1752         size += sizeof(UWORD8) * max_ctb_rows;
1753 
1754         /* To hold SAO top left chroma pixel value last output ctb in a row*/
1755         size += sizeof(UWORD8) * max_ctb_rows * 2;
1756 
1757         /* To hold SAO top left pixel luma for current ctb - column array*/
1758         size += sizeof(UWORD8) * max_ctb_rows;
1759 
1760         /* To hold SAO top left pixel chroma for current ctb-column array*/
1761         size += sizeof(UWORD8) * max_ctb_rows * 2;
1762 
1763         /* To hold SAO top right pixel luma pixel value last output ctb in a row*/
1764         size += sizeof(UWORD8) * max_ctb_cols;
1765 
1766         /* To hold SAO top right pixel chroma pixel value last output ctb in a row*/
1767         size += sizeof(UWORD8) * max_ctb_cols * 2;
1768 
1769         /*To hold SAO botton bottom left pixels for luma*/
1770         size += sizeof(UWORD8) * max_ctb_rows;
1771 
1772         /*To hold SAO botton bottom left pixels for luma*/
1773         size += sizeof(UWORD8) * max_ctb_rows * 2;
1774         size = ALIGN64(size);
1775 
1776         pu1_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1777         RETURN_IF((NULL == pu1_buf), IV_FAIL);
1778         memset(pu1_buf, 0, size);
1779 
1780         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1781         {
1782             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_left_luma = (UWORD8 *)pu1_buf;
1783         }
1784         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_left_luma = (UWORD8 *)pu1_buf;
1785         pu1_buf += MAX(ht, wd);
1786 
1787         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1788         {
1789             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_left_chroma = (UWORD8 *)pu1_buf;
1790         }
1791         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_left_chroma = (UWORD8 *)pu1_buf;
1792         pu1_buf += MAX(ht, wd);
1793         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1794         {
1795             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_luma = (UWORD8 *)pu1_buf;
1796         }
1797         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_luma = (UWORD8 *)pu1_buf;
1798         pu1_buf += wd;
1799 
1800         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1801         {
1802             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_chroma = (UWORD8 *)pu1_buf;
1803         }
1804         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_chroma = (UWORD8 *)pu1_buf;
1805         pu1_buf += wd;
1806         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1807         {
1808             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_luma_top_left_ctb = (UWORD8 *)pu1_buf;
1809         }
1810         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_luma_top_left_ctb = (UWORD8 *)pu1_buf;
1811         pu1_buf += ht / MIN_CTB_SIZE;
1812 
1813         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1814         {
1815             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_chroma_top_left_ctb = (UWORD8 *)pu1_buf;
1816         }
1817         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_chroma_top_left_ctb = (UWORD8 *)pu1_buf;
1818         pu1_buf += (ht / MIN_CTB_SIZE) * 2;
1819 
1820         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1821         {
1822             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_luma_curr_ctb = (UWORD8 *)pu1_buf;
1823         }
1824         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_luma_curr_ctb = (UWORD8 *)pu1_buf;
1825         pu1_buf += ht / MIN_CTB_SIZE;
1826 
1827         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1828         {
1829             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_chroma_curr_ctb = (UWORD8 *)pu1_buf;
1830         }
1831         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_chroma_curr_ctb = (UWORD8 *)pu1_buf;
1832 
1833         pu1_buf += (ht / MIN_CTB_SIZE) * 2;
1834         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1835         {
1836             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_luma_top_right = (UWORD8 *)pu1_buf;
1837         }
1838         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_luma_top_right = (UWORD8 *)pu1_buf;
1839 
1840         pu1_buf += wd / MIN_CTB_SIZE;
1841         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1842         {
1843             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_chroma_top_right = (UWORD8 *)pu1_buf;
1844         }
1845         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_chroma_top_right = (UWORD8 *)pu1_buf;
1846 
1847         pu1_buf += (wd / MIN_CTB_SIZE) * 2;
1848 
1849         /*Per CTB, Store 1 value for luma , 2 values for chroma*/
1850         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1851         {
1852             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_luma_bot_left = (UWORD8 *)pu1_buf;
1853         }
1854         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_luma_bot_left = (UWORD8 *)pu1_buf;
1855 
1856         pu1_buf += (ht / MIN_CTB_SIZE);
1857 
1858         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1859         {
1860             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_chroma_bot_left = (UWORD8 *)pu1_buf;
1861         }
1862         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_chroma_bot_left = (UWORD8 *)pu1_buf;
1863 
1864         pu1_buf += (ht / MIN_CTB_SIZE) * 2;
1865     }
1866 
1867 
1868     {
1869         UWORD8 *pu1_buf = (UWORD8 *)pv_buf;
1870         WORD32 vert_bs_size, horz_bs_size;
1871         WORD32 qp_const_flag_size;
1872         WORD32 qp_size;
1873         WORD32 num_8x8;
1874 
1875         /* Max Number of vertical edges */
1876         vert_bs_size = wd / 8 + 2 * MAX_CTB_SIZE / 8;
1877 
1878         /* Max Number of horizontal edges - extra MAX_CTB_SIZE / 8 to handle the last 4 rows separately(shifted CTB processing) */
1879         vert_bs_size *= (ht + MAX_CTB_SIZE) / MIN_TU_SIZE;
1880 
1881         /* Number of bytes */
1882         vert_bs_size /= 8;
1883 
1884         /* Two bits per edge */
1885         vert_bs_size *= 2;
1886 
1887         /* Max Number of horizontal edges */
1888         horz_bs_size = ht / 8 + MAX_CTB_SIZE / 8;
1889 
1890         /* Max Number of vertical edges - extra MAX_CTB_SIZE / 8 to handle the last 4 columns separately(shifted CTB processing) */
1891         horz_bs_size *= (wd + MAX_CTB_SIZE) / MIN_TU_SIZE;
1892 
1893         /* Number of bytes */
1894         horz_bs_size /= 8;
1895 
1896         /* Two bits per edge */
1897         horz_bs_size *= 2;
1898 
1899         /* Max CTBs in a row */
1900         qp_const_flag_size = wd / MIN_CTB_SIZE + 1 /* The last ctb row deblk is done in last ctb + 1 row.*/;
1901 
1902         /* Max CTBs in a column */
1903         qp_const_flag_size *= ht / MIN_CTB_SIZE;
1904 
1905         /* Number of bytes */
1906         qp_const_flag_size /= 8;
1907 
1908         /* QP changes at CU level - So store at 8x8 level */
1909         num_8x8 = (ht * wd) / (MIN_CU_SIZE * MIN_CU_SIZE);
1910         qp_size = num_8x8;
1911 
1912         /* To hold vertical boundary strength */
1913         size += vert_bs_size;
1914 
1915         /* To hold horizontal boundary strength */
1916         size += horz_bs_size;
1917 
1918         /* To hold QP */
1919         size += qp_size;
1920 
1921         /* To hold QP const in CTB flags */
1922         size += qp_const_flag_size;
1923 
1924         pu1_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1925         RETURN_IF((NULL == pu1_buf), IV_FAIL);
1926 
1927         memset(pu1_buf, 0, size);
1928 
1929         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1930         {
1931             ps_codec->as_process[i].s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
1932             ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
1933             ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
1934             pu1_buf += vert_bs_size;
1935 
1936             ps_codec->as_process[i].s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
1937             ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
1938             ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
1939             pu1_buf += horz_bs_size;
1940 
1941             ps_codec->as_process[i].s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
1942             ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
1943             ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
1944             pu1_buf += qp_size;
1945 
1946             ps_codec->as_process[i].s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
1947             ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
1948             ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
1949             pu1_buf += qp_const_flag_size;
1950 
1951             pu1_buf -= (vert_bs_size + horz_bs_size + qp_size + qp_const_flag_size);
1952         }
1953         ps_codec->s_parse.s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
1954         pu1_buf += vert_bs_size;
1955 
1956         ps_codec->s_parse.s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
1957         pu1_buf += horz_bs_size;
1958 
1959         ps_codec->s_parse.s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
1960         pu1_buf += qp_size;
1961 
1962         ps_codec->s_parse.s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
1963         pu1_buf += qp_const_flag_size;
1964 
1965     }
1966 
1967     /* Max CTBs in a row */
1968     size  = wd / MIN_CTB_SIZE;
1969     /* Max CTBs in a column */
1970     size *= (ht / MIN_CTB_SIZE + 2) /* Top row and bottom row extra. This ensures accessing left,top in first row
1971                                               and right in last row will not result in invalid access*/;
1972 
1973     size *= sizeof(UWORD16);
1974     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1975     RETURN_IF((NULL == pv_buf), IV_FAIL);
1976     memset(pv_buf, 0, size);
1977 
1978     ps_codec->pu1_tile_idx_base = pv_buf;
1979     for(i = 0; i < MAX_PROCESS_THREADS; i++)
1980     {
1981         ps_codec->as_process[i].pu1_tile_idx = (UWORD16 *)pv_buf + wd / MIN_CTB_SIZE /* Offset 1 row */;
1982     }
1983 
1984     /* 4 bytes per color component per CTB */
1985     size = 3 * 4;
1986 
1987     /* MAX number of CTBs in a row */
1988     size *= wd / MIN_CTB_SIZE;
1989 
1990     /* MAX number of CTBs in a column */
1991     size *= ht / MIN_CTB_SIZE;
1992     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1993     RETURN_IF((NULL == pv_buf), IV_FAIL);
1994     memset(pv_buf, 0, size);
1995 
1996     ps_codec->s_parse.ps_pic_sao = (sao_t *)pv_buf;
1997     ps_codec->s_parse.s_sao_ctxt.ps_pic_sao = (sao_t *)pv_buf;
1998     for(i = 0; i < MAX_PROCESS_THREADS; i++)
1999     {
2000         ps_codec->as_process[i].s_sao_ctxt.ps_pic_sao = ps_codec->s_parse.ps_pic_sao;
2001     }
2002 
2003     /* Only if width * height * 3 / 2 is greater than MIN_BITSBUF_SIZE,
2004     then allocate dynamic bistream buffer */
2005     ps_codec->pu1_bitsbuf_dynamic = NULL;
2006     size = wd * ht;
2007     if(size > MIN_BITSBUF_SIZE)
2008     {
2009         pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size + 16); //Alloc extra for parse optimization
2010         RETURN_IF((NULL == pv_buf), IV_FAIL);
2011         memset(pv_buf, 0, size + 16);
2012         ps_codec->pu1_bitsbuf_dynamic = pv_buf;
2013         ps_codec->u4_bitsbuf_size_dynamic = size;
2014     }
2015 
2016     size = ihevcd_get_tu_data_size(wd * ht);
2017     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2018     RETURN_IF((NULL == pv_buf), IV_FAIL);
2019     memset(pv_buf, 0, size);
2020     ps_codec->pv_tu_data = pv_buf;
2021 
2022     {
2023         sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
2024 
2025 
2026         /* Allocate for pu_map, pu_t and pic_pu_idx for each MV bank */
2027         /* Note: Number of luma samples is not max_wd * max_ht here, instead it is
2028          * set to maximum number of luma samples allowed at the given level.
2029          * This is done to ensure that any stream with width and height lesser
2030          * than max_wd and max_ht is supported. Number of buffers required can be greater
2031          * for lower width and heights at a given level and this increased number of buffers
2032          * might require more memory than what max_wd and max_ht buffer would have required
2033          * Also note one extra buffer is allocted to store current pictures MV bank
2034          * In case of asynchronous parsing and processing, number of buffers should increase here
2035          * based on when parsing and processing threads are synchronized
2036          */
2037         max_dpb_size = ps_sps->ai1_sps_max_dec_pic_buffering[ps_sps->i1_sps_max_sub_layers - 1];
2038         /* Size for holding mv_buf_t for each MV Bank
2039          * One extra MV Bank is needed to hold current pics MV bank.
2040          */
2041         size = (max_dpb_size + 1) * sizeof(mv_buf_t);
2042 
2043         size += (max_dpb_size + 1) *
2044                         ihevcd_get_pic_mv_bank_size(wd * ht);
2045 
2046         pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2047         RETURN_IF((NULL == pv_buf), IV_FAIL);
2048         memset(pv_buf, 0, size);
2049 
2050         ps_codec->pv_mv_bank_buf_base = pv_buf;
2051         ps_codec->i4_total_mv_bank_size = size;
2052 
2053     }
2054 
2055     /* In case of non-shared mode allocate for reference picture buffers */
2056     /* In case of shared and 420p output, allocate for chroma samples */
2057     if(0 == ps_codec->i4_share_disp_buf)
2058     {
2059         /* Number of buffers is doubled in order to return one frame at a time instead of sending
2060          * multiple outputs during dpb full case.
2061          * Also note one extra buffer is allocted to store current picture
2062          * In case of asynchronous parsing and processing, number of buffers should increase here
2063          * based on when parsing and processing threads are synchronized
2064          */
2065         size = ihevcd_get_total_pic_buf_size(ps_codec, wd, ht);
2066         pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2067         RETURN_IF((NULL == pv_buf), IV_FAIL);
2068         memset(pv_buf, 0, size);
2069 
2070         ps_codec->i4_total_pic_buf_size = size;
2071         ps_codec->pu1_ref_pic_buf_base = (UWORD8 *)pv_buf;
2072     }
2073 
2074     ps_codec->pv_proc_jobq = ihevcd_jobq_init(ps_codec->pv_proc_jobq_buf, ps_codec->i4_proc_jobq_buf_size);
2075     RETURN_IF((ps_codec->pv_proc_jobq == NULL), IV_FAIL);
2076 
2077     /* Update the jobq context to all the threads */
2078     ps_codec->s_parse.pv_proc_jobq = ps_codec->pv_proc_jobq;
2079     for(i = 0; i < MAX_PROCESS_THREADS; i++)
2080     {
2081         ps_codec->as_process[i].pv_proc_jobq = ps_codec->pv_proc_jobq;
2082         ps_codec->as_process[i].i4_id = i;
2083         ps_codec->as_process[i].ps_codec = ps_codec;
2084 
2085         /* Set the following to zero assuming it is a single core solution
2086          * When threads are launched these will be set appropriately
2087          */
2088         ps_codec->as_process[i].i4_check_parse_status = 0;
2089         ps_codec->as_process[i].i4_check_proc_status = 0;
2090     }
2091 
2092     ps_codec->u4_allocate_dynamic_done = 1;
2093 
2094     return IV_SUCCESS;
2095 }
2096 
2097 /**
2098 *******************************************************************************
2099 *
2100 * @brief
2101 *  Free dynamic memory for the codec
2102 *
2103 * @par Description:
2104 *  Free dynamic memory for the codec
2105 *
2106 * @param[in] ps_codec
2107 *  Pointer to codec context
2108 *
2109 * @returns  Status
2110 *
2111 * @remarks
2112 *
2113 *
2114 *******************************************************************************
2115 */
ihevcd_free_dynamic_bufs(codec_t * ps_codec)2116 WORD32 ihevcd_free_dynamic_bufs(codec_t *ps_codec)
2117 {
2118 
2119     if(ps_codec->pv_proc_jobq)
2120     {
2121         ihevcd_jobq_deinit(ps_codec->pv_proc_jobq);
2122         ps_codec->pv_proc_jobq = NULL;
2123     }
2124 
2125     ALIGNED_FREE(ps_codec, ps_codec->ps_tile);
2126     ALIGNED_FREE(ps_codec, ps_codec->pi4_entry_ofst);
2127     ALIGNED_FREE(ps_codec, ps_codec->s_parse.pu4_skip_cu_top);
2128     ALIGNED_FREE(ps_codec, ps_codec->s_parse.pu4_ct_depth_top);
2129     ALIGNED_FREE(ps_codec, ps_codec->pu1_pic_intra_flag);
2130     ALIGNED_FREE(ps_codec, ps_codec->pu1_pic_no_loop_filter_flag_base);
2131     ALIGNED_FREE(ps_codec, ps_codec->pv_proc_jobq_buf);
2132     ALIGNED_FREE(ps_codec, ps_codec->pu1_parse_map);
2133     ALIGNED_FREE(ps_codec, ps_codec->pu1_proc_map);
2134     ALIGNED_FREE(ps_codec, ps_codec->as_process[0].pu4_pic_pu_idx_left);
2135     ALIGNED_FREE(ps_codec, ps_codec->as_process[0].s_sao_ctxt.pu1_sao_src_left_luma);
2136     ALIGNED_FREE(ps_codec, ps_codec->as_process[0].s_bs_ctxt.pu4_pic_vert_bs);
2137     ALIGNED_FREE(ps_codec, ps_codec->pu1_tile_idx_base);
2138     ALIGNED_FREE(ps_codec, ps_codec->s_parse.ps_pic_sao);
2139     ALIGNED_FREE(ps_codec, ps_codec->pu1_bitsbuf_dynamic);
2140     ALIGNED_FREE(ps_codec, ps_codec->pv_tu_data);
2141     ALIGNED_FREE(ps_codec, ps_codec->pv_mv_bank_buf_base);
2142     ALIGNED_FREE(ps_codec, ps_codec->pu1_ref_pic_buf_base);
2143     ALIGNED_FREE(ps_codec, ps_codec->pu1_cur_chroma_ref_buf);
2144 
2145     ps_codec->u4_allocate_dynamic_done = 0;
2146     return IV_SUCCESS;
2147 }
2148 
2149 
2150 /**
2151 *******************************************************************************
2152 *
2153 * @brief
2154 *  Initializes from mem records passed to the codec
2155 *
2156 * @par Description:
2157 *  Initializes pointers based on mem records passed
2158 *
2159 * @param[in] ps_codec_obj
2160 *  Pointer to codec object at API level
2161 *
2162 * @param[in] pv_api_ip
2163 *  Pointer to input argument structure
2164 *
2165 * @param[out] pv_api_op
2166 *  Pointer to output argument structure
2167 *
2168 * @returns  Status
2169 *
2170 * @remarks
2171 *
2172 *
2173 *******************************************************************************
2174 */
ihevcd_create(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2175 WORD32 ihevcd_create(iv_obj_t *ps_codec_obj,
2176                            void *pv_api_ip,
2177                            void *pv_api_op)
2178 {
2179     ihevcd_cxa_create_ip_t *ps_create_ip;
2180     ihevcd_cxa_create_op_t *ps_create_op;
2181 
2182     WORD32 ret;
2183     codec_t *ps_codec;
2184     ps_create_ip = (ihevcd_cxa_create_ip_t *)pv_api_ip;
2185     ps_create_op = (ihevcd_cxa_create_op_t *)pv_api_op;
2186 
2187     ps_create_op->s_ivd_create_op_t.u4_error_code = 0;
2188     ps_codec_obj = NULL;
2189     ret = ihevcd_allocate_static_bufs(&ps_codec_obj, pv_api_ip, pv_api_op);
2190 
2191     /* If allocation of some buffer fails, then free buffers allocated till then */
2192     if(IV_FAIL == ret)
2193     {
2194         if(NULL != ps_codec_obj)
2195         {
2196             if(ps_codec_obj->pv_codec_handle)
2197             {
2198                 ihevcd_free_static_bufs(ps_codec_obj);
2199             }
2200             else
2201             {
2202                 void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
2203                 void *pv_mem_ctxt;
2204 
2205                 pf_aligned_free = ps_create_ip->s_ivd_create_ip_t.pf_aligned_free;
2206                 pv_mem_ctxt  = ps_create_ip->s_ivd_create_ip_t.pv_mem_ctxt;
2207                 pf_aligned_free(pv_mem_ctxt, ps_codec_obj);
2208             }
2209         }
2210         ps_create_op->s_ivd_create_op_t.u4_error_code = IVD_MEM_ALLOC_FAILED;
2211         ps_create_op->s_ivd_create_op_t.u4_error_code |= 1 << IVD_FATALERROR;
2212 
2213         return IV_FAIL;
2214     }
2215     ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
2216     ret = ihevcd_init(ps_codec);
2217 
2218     TRACE_INIT(NULL);
2219     STATS_INIT();
2220 
2221     return ret;
2222 }
2223 /**
2224 *******************************************************************************
2225 *
2226 * @brief
2227 *  Delete codec
2228 *
2229 * @par Description:
2230 *  Delete codec
2231 *
2232 * @param[in] ps_codec_obj
2233 *  Pointer to codec object at API level
2234 *
2235 * @param[in] pv_api_ip
2236 *  Pointer to input argument structure
2237 *
2238 * @param[out] pv_api_op
2239 *  Pointer to output argument structure
2240 *
2241 * @returns  Status
2242 *
2243 * @remarks
2244 *
2245 *
2246 *******************************************************************************
2247 */
ihevcd_delete(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2248 WORD32 ihevcd_delete(iv_obj_t *ps_codec_obj, void *pv_api_ip, void *pv_api_op)
2249 {
2250     codec_t *ps_dec;
2251     ihevcd_cxa_delete_ip_t *ps_ip = (ihevcd_cxa_delete_ip_t *)pv_api_ip;
2252     ihevcd_cxa_delete_op_t *ps_op = (ihevcd_cxa_delete_op_t *)pv_api_op;
2253 
2254     ps_dec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2255     UNUSED(ps_ip);
2256     ps_op->s_ivd_delete_op_t.u4_error_code = 0;
2257     ihevcd_free_dynamic_bufs(ps_dec);
2258     ihevcd_free_static_bufs(ps_codec_obj);
2259     return IV_SUCCESS;
2260 }
2261 
2262 
2263 /**
2264 *******************************************************************************
2265 *
2266 * @brief
2267 *  Passes display buffer from application to codec
2268 *
2269 * @par Description:
2270 *  Adds display buffer to the codec
2271 *
2272 * @param[in] ps_codec_obj
2273 *  Pointer to codec object at API level
2274 *
2275 * @param[in] pv_api_ip
2276 *  Pointer to input argument structure
2277 *
2278 * @param[out] pv_api_op
2279 *  Pointer to output argument structure
2280 *
2281 * @returns  Status
2282 *
2283 * @remarks
2284 *
2285 *
2286 *******************************************************************************
2287 */
ihevcd_set_display_frame(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2288 WORD32 ihevcd_set_display_frame(iv_obj_t *ps_codec_obj,
2289                                 void *pv_api_ip,
2290                                 void *pv_api_op)
2291 {
2292     WORD32 ret = IV_SUCCESS;
2293 
2294     ivd_set_display_frame_ip_t *ps_dec_disp_ip;
2295     ivd_set_display_frame_op_t *ps_dec_disp_op;
2296 
2297     WORD32 i;
2298 
2299     codec_t *ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2300 
2301     ps_dec_disp_ip = (ivd_set_display_frame_ip_t *)pv_api_ip;
2302     ps_dec_disp_op = (ivd_set_display_frame_op_t *)pv_api_op;
2303 
2304     ps_codec->i4_num_disp_bufs = 0;
2305     if(ps_codec->i4_share_disp_buf)
2306     {
2307         UWORD32 num_bufs = ps_dec_disp_ip->num_disp_bufs;
2308         pic_buf_t *ps_pic_buf;
2309         UWORD8 *pu1_buf;
2310         WORD32 buf_ret;
2311 
2312         UWORD8 *pu1_chroma_buf = NULL;
2313         num_bufs = MIN(num_bufs, BUF_MGR_MAX_CNT);
2314         ps_codec->i4_num_disp_bufs = num_bufs;
2315 
2316         ps_pic_buf = (pic_buf_t *)ps_codec->ps_pic_buf;
2317 
2318         /* If color format is 420P, then allocate chroma buffers to hold semiplanar
2319          * chroma data */
2320         if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2321         {
2322             WORD32 num_samples = ps_dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[1] << 1;
2323             WORD32 size = num_samples * num_bufs;
2324             void *pv_mem_ctxt = ps_codec->pv_mem_ctxt;
2325 
2326             pu1_chroma_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2327             RETURN_IF((NULL == pu1_chroma_buf), IV_FAIL);
2328             memset(pu1_chroma_buf, 0, size);
2329 
2330             ps_codec->pu1_cur_chroma_ref_buf = pu1_chroma_buf;
2331         }
2332         for(i = 0; i < (WORD32)num_bufs; i++)
2333         {
2334             /* Stride is not available in some cases here.
2335                So store base pointers to buffer manager now,
2336                and update these pointers once header is decoded */
2337             pu1_buf =  ps_dec_disp_ip->s_disp_buffer[i].pu1_bufs[0];
2338             ps_pic_buf->pu1_luma = pu1_buf;
2339 
2340             if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2341             {
2342                 pu1_buf = pu1_chroma_buf;
2343                 pu1_chroma_buf += ps_dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[1] << 1;
2344             }
2345             else
2346             {
2347                 /* For YUV 420SP case use display buffer itself as chroma ref buffer */
2348                 pu1_buf =  ps_dec_disp_ip->s_disp_buffer[i].pu1_bufs[1];
2349             }
2350 
2351             ps_pic_buf->pu1_chroma = pu1_buf;
2352 
2353             buf_ret = ihevc_buf_mgr_add((buf_mgr_t *)ps_codec->pv_pic_buf_mgr, ps_pic_buf, i);
2354 
2355             if(0 != buf_ret)
2356             {
2357                 ps_codec->i4_error_code = IHEVCD_BUF_MGR_ERROR;
2358                 return IHEVCD_BUF_MGR_ERROR;
2359             }
2360 
2361             /* Mark pic buf as needed for display */
2362             /* This ensures that till the buffer is explicitly passed to the codec,
2363              * application owns the buffer. Decoder is allowed to use a buffer only
2364              * when application sends it through fill this buffer call in OMX
2365              */
2366             ihevc_buf_mgr_set_status((buf_mgr_t *)ps_codec->pv_pic_buf_mgr, i, BUF_MGR_DISP);
2367 
2368             ps_pic_buf++;
2369 
2370             /* Store display buffers in codec context. Needed for 420p output */
2371             memcpy(&ps_codec->s_disp_buffer[ps_codec->i4_share_disp_buf_cnt],
2372                    &ps_dec_disp_ip->s_disp_buffer[i],
2373                    sizeof(ps_dec_disp_ip->s_disp_buffer[i]));
2374 
2375             ps_codec->i4_share_disp_buf_cnt++;
2376 
2377         }
2378     }
2379 
2380     ps_dec_disp_op->u4_error_code = 0;
2381     return ret;
2382 
2383 }
2384 
2385 /**
2386 *******************************************************************************
2387 *
2388 * @brief
2389 *  Sets the decoder in flush mode. Decoder will come out of  flush only
2390 * after returning all the buffers or at reset
2391 *
2392 * @par Description:
2393 *  Sets the decoder in flush mode
2394 *
2395 * @param[in] ps_codec_obj
2396 *  Pointer to codec object at API level
2397 *
2398 * @param[in] pv_api_ip
2399 *  Pointer to input argument structure
2400 *
2401 * @param[out] pv_api_op
2402 *  Pointer to output argument structure
2403 *
2404 * @returns  Status
2405 *
2406 * @remarks
2407 *
2408 *
2409 *******************************************************************************
2410 */
ihevcd_set_flush_mode(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2411 WORD32 ihevcd_set_flush_mode(iv_obj_t *ps_codec_obj,
2412                              void *pv_api_ip,
2413                              void *pv_api_op)
2414 {
2415 
2416     codec_t *ps_codec;
2417     ivd_ctl_flush_op_t *ps_ctl_op = (ivd_ctl_flush_op_t *)pv_api_op;
2418     UNUSED(pv_api_ip);
2419     ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2420 
2421     /* Signal flush frame control call */
2422     ps_codec->i4_flush_mode = 1;
2423 
2424     ps_ctl_op->u4_error_code = 0;
2425 
2426     /* Set pic count to zero, so that decoder starts buffering again */
2427     /* once it comes out of flush mode */
2428     ps_codec->u4_pic_cnt = 0;
2429     ps_codec->u4_disp_cnt = 0;
2430     return IV_SUCCESS;
2431 
2432 
2433 }
2434 
2435 /**
2436 *******************************************************************************
2437 *
2438 * @brief
2439 *  Gets decoder status and buffer requirements
2440 *
2441 * @par Description:
2442 *  Gets the decoder status
2443 *
2444 * @param[in] ps_codec_obj
2445 *  Pointer to codec object at API level
2446 *
2447 * @param[in] pv_api_ip
2448 *  Pointer to input argument structure
2449 *
2450 * @param[out] pv_api_op
2451 *  Pointer to output argument structure
2452 *
2453 * @returns  Status
2454 *
2455 * @remarks
2456 *
2457 *
2458 *******************************************************************************
2459 */
2460 
ihevcd_get_status(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2461 WORD32 ihevcd_get_status(iv_obj_t *ps_codec_obj,
2462                          void *pv_api_ip,
2463                          void *pv_api_op)
2464 {
2465 
2466     WORD32 i;
2467     codec_t *ps_codec;
2468     WORD32 wd, ht;
2469     ivd_ctl_getstatus_op_t *ps_ctl_op = (ivd_ctl_getstatus_op_t *)pv_api_op;
2470 
2471     UNUSED(pv_api_ip);
2472 
2473     ps_ctl_op->u4_error_code = 0;
2474 
2475     ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2476 
2477     ps_ctl_op->u4_min_num_in_bufs = MIN_IN_BUFS;
2478     if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2479         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420;
2480     else if(ps_codec->e_chroma_fmt == IV_YUV_422ILE)
2481         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_422ILE;
2482     else if(ps_codec->e_chroma_fmt == IV_RGB_565)
2483         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGB565;
2484     else if(ps_codec->e_chroma_fmt == IV_RGBA_8888)
2485         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGBA8888;
2486     else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2487                     || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2488         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420SP;
2489 
2490     ps_ctl_op->u4_num_disp_bufs = 1;
2491 
2492     for(i = 0; i < (WORD32)ps_ctl_op->u4_min_num_in_bufs; i++)
2493     {
2494         wd = ALIGN64(ps_codec->i4_wd);
2495         ht = ALIGN64(ps_codec->i4_ht);
2496         ps_ctl_op->u4_min_in_buf_size[i] = MAX((wd * ht), MIN_BITSBUF_SIZE);
2497     }
2498 
2499     wd = ps_codec->i4_wd;
2500     ht = ps_codec->i4_ht;
2501 
2502     if(ps_codec->i4_sps_done)
2503     {
2504         if(0 == ps_codec->i4_share_disp_buf)
2505         {
2506             wd = ps_codec->i4_disp_wd;
2507             ht = ps_codec->i4_disp_ht;
2508 
2509         }
2510         else
2511         {
2512             wd = ps_codec->i4_disp_strd;
2513             ht = ps_codec->i4_ht + PAD_HT;
2514         }
2515     }
2516 
2517     if(ps_codec->i4_disp_strd > wd)
2518         wd = ps_codec->i4_disp_strd;
2519 
2520     if(0 == ps_codec->i4_share_disp_buf)
2521         ps_ctl_op->u4_num_disp_bufs = 1;
2522     else
2523     {
2524         if(ps_codec->i4_sps_done)
2525         {
2526             sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
2527             WORD32 reorder_pic_cnt, ref_pic_cnt;
2528             reorder_pic_cnt = 0;
2529             if(ps_codec->e_frm_out_mode != IVD_DECODE_FRAME_OUT)
2530                 reorder_pic_cnt = ps_sps->ai1_sps_max_num_reorder_pics[ps_sps->i1_sps_max_sub_layers - 1];
2531             ref_pic_cnt = ps_sps->ai1_sps_max_dec_pic_buffering[ps_sps->i1_sps_max_sub_layers - 1];
2532 
2533             ps_ctl_op->u4_num_disp_bufs = reorder_pic_cnt;
2534 
2535             ps_ctl_op->u4_num_disp_bufs += ref_pic_cnt + 1;
2536         }
2537         else
2538         {
2539             ps_ctl_op->u4_num_disp_bufs = MAX_REF_CNT;
2540         }
2541 
2542         ps_ctl_op->u4_num_disp_bufs = MIN(
2543                         ps_ctl_op->u4_num_disp_bufs, 32);
2544     }
2545 
2546     /*!*/
2547     if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2548     {
2549         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2550         ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 2;
2551         ps_ctl_op->u4_min_out_buf_size[2] = (wd * ht) >> 2;
2552     }
2553     else if(ps_codec->e_chroma_fmt == IV_YUV_422ILE)
2554     {
2555         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 2;
2556         ps_ctl_op->u4_min_out_buf_size[1] =
2557                         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2558     }
2559     else if(ps_codec->e_chroma_fmt == IV_RGB_565)
2560     {
2561         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 2;
2562         ps_ctl_op->u4_min_out_buf_size[1] =
2563                         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2564     }
2565     else if(ps_codec->e_chroma_fmt == IV_RGBA_8888)
2566     {
2567         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 4;
2568         ps_ctl_op->u4_min_out_buf_size[1] =
2569                         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2570     }
2571     else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2572                     || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2573     {
2574         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2575         ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 1;
2576         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2577     }
2578     ps_ctl_op->u4_pic_ht = ht;
2579     ps_ctl_op->u4_pic_wd = wd;
2580     ps_ctl_op->u4_frame_rate = 30000;
2581     ps_ctl_op->u4_bit_rate = 1000000;
2582     ps_ctl_op->e_content_type = IV_PROGRESSIVE;
2583     ps_ctl_op->e_output_chroma_format = ps_codec->e_chroma_fmt;
2584     ps_codec->i4_num_disp_bufs = ps_ctl_op->u4_num_disp_bufs;
2585 
2586     if(ps_ctl_op->u4_size == sizeof(ihevcd_cxa_ctl_getstatus_op_t))
2587     {
2588         ihevcd_cxa_ctl_getstatus_op_t *ps_ext_ctl_op = (ihevcd_cxa_ctl_getstatus_op_t *)ps_ctl_op;
2589         ps_ext_ctl_op->u4_coded_pic_wd = ps_codec->i4_wd;
2590         ps_ext_ctl_op->u4_coded_pic_wd = ps_codec->i4_ht;
2591     }
2592     return IV_SUCCESS;
2593 }
2594 /**
2595 *******************************************************************************
2596 *
2597 * @brief
2598 *  Gets decoder buffer requirements
2599 *
2600 * @par Description:
2601 *  Gets the decoder buffer requirements. If called before  header decoder,
2602 * buffer requirements are based on max_wd  and max_ht else actual width and
2603 * height will be used
2604 *
2605 * @param[in] ps_codec_obj
2606 *  Pointer to codec object at API level
2607 *
2608 * @param[in] pv_api_ip
2609 *  Pointer to input argument structure
2610 *
2611 * @param[out] pv_api_op
2612 *  Pointer to output argument structure
2613 *
2614 * @returns  Status
2615 *
2616 * @remarks
2617 *
2618 *
2619 *******************************************************************************
2620 */
ihevcd_get_buf_info(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2621 WORD32 ihevcd_get_buf_info(iv_obj_t *ps_codec_obj,
2622                            void *pv_api_ip,
2623                            void *pv_api_op)
2624 {
2625 
2626     codec_t *ps_codec;
2627     UWORD32 i = 0;
2628     WORD32 wd, ht;
2629     ivd_ctl_getbufinfo_op_t *ps_ctl_op =
2630                     (ivd_ctl_getbufinfo_op_t *)pv_api_op;
2631 
2632     UNUSED(pv_api_ip);
2633     ps_ctl_op->u4_error_code = 0;
2634 
2635     ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2636 
2637     ps_ctl_op->u4_min_num_in_bufs = MIN_IN_BUFS;
2638     if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2639         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420;
2640     else if(ps_codec->e_chroma_fmt == IV_YUV_422ILE)
2641         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_422ILE;
2642     else if(ps_codec->e_chroma_fmt == IV_RGB_565)
2643         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGB565;
2644     else if(ps_codec->e_chroma_fmt == IV_RGBA_8888)
2645         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGBA8888;
2646     else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2647                     || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2648         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420SP;
2649 
2650     ps_ctl_op->u4_num_disp_bufs = 1;
2651 
2652     for(i = 0; i < ps_ctl_op->u4_min_num_in_bufs; i++)
2653     {
2654         wd = ALIGN64(ps_codec->i4_wd);
2655         ht = ALIGN64(ps_codec->i4_ht);
2656 
2657         ps_ctl_op->u4_min_in_buf_size[i] = MAX((wd * ht), MIN_BITSBUF_SIZE);
2658     }
2659 
2660     wd = 0;
2661     ht = 0;
2662 
2663     if(ps_codec->i4_sps_done)
2664     {
2665         if(0 == ps_codec->i4_share_disp_buf)
2666         {
2667             wd = ps_codec->i4_disp_wd;
2668             ht = ps_codec->i4_disp_ht;
2669 
2670         }
2671         else
2672         {
2673             wd = ps_codec->i4_disp_strd;
2674             ht = ps_codec->i4_ht + PAD_HT;
2675         }
2676     }
2677     else
2678     {
2679         if(1 == ps_codec->i4_share_disp_buf)
2680         {
2681             wd = ALIGN32(wd + PAD_WD);
2682             ht += PAD_HT;
2683         }
2684     }
2685 
2686     if(ps_codec->i4_disp_strd > wd)
2687         wd = ps_codec->i4_disp_strd;
2688 
2689     if(0 == ps_codec->i4_share_disp_buf)
2690         ps_ctl_op->u4_num_disp_bufs = 1;
2691     else
2692     {
2693         if(ps_codec->i4_sps_done)
2694         {
2695             sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
2696             WORD32 reorder_pic_cnt, ref_pic_cnt;
2697             reorder_pic_cnt = 0;
2698             if(ps_codec->e_frm_out_mode != IVD_DECODE_FRAME_OUT)
2699                 reorder_pic_cnt = ps_sps->ai1_sps_max_num_reorder_pics[ps_sps->i1_sps_max_sub_layers - 1];
2700             ref_pic_cnt = ps_sps->ai1_sps_max_dec_pic_buffering[ps_sps->i1_sps_max_sub_layers - 1];
2701 
2702             ps_ctl_op->u4_num_disp_bufs = reorder_pic_cnt;
2703 
2704             ps_ctl_op->u4_num_disp_bufs += ref_pic_cnt + 1;
2705         }
2706         else
2707         {
2708             ps_ctl_op->u4_num_disp_bufs = MAX_REF_CNT;
2709         }
2710 
2711         ps_ctl_op->u4_num_disp_bufs = MIN(
2712                         ps_ctl_op->u4_num_disp_bufs, 32);
2713 
2714     }
2715 
2716     /*!*/
2717     if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2718     {
2719         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2720         ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 2;
2721         ps_ctl_op->u4_min_out_buf_size[2] = (wd * ht) >> 2;
2722     }
2723     else if(ps_codec->e_chroma_fmt == IV_YUV_422ILE)
2724     {
2725         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 2;
2726         ps_ctl_op->u4_min_out_buf_size[1] =
2727                         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2728     }
2729     else if(ps_codec->e_chroma_fmt == IV_RGB_565)
2730     {
2731         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 2;
2732         ps_ctl_op->u4_min_out_buf_size[1] =
2733                         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2734     }
2735     else if(ps_codec->e_chroma_fmt == IV_RGBA_8888)
2736     {
2737         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 4;
2738         ps_ctl_op->u4_min_out_buf_size[1] =
2739                         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2740     }
2741     else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2742                     || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2743     {
2744         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2745         ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 1;
2746         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2747     }
2748     ps_codec->i4_num_disp_bufs = ps_ctl_op->u4_num_disp_bufs;
2749 
2750     return IV_SUCCESS;
2751 }
2752 
2753 
2754 /**
2755 *******************************************************************************
2756 *
2757 * @brief
2758 *  Sets dynamic parameters
2759 *
2760 * @par Description:
2761 *  Sets dynamic parameters. Note Frame skip, decode header  mode are dynamic
2762 *  Dynamic change in stride is not  supported
2763 *
2764 * @param[in] ps_codec_obj
2765 *  Pointer to codec object at API level
2766 *
2767 * @param[in] pv_api_ip
2768 *  Pointer to input argument structure
2769 *
2770 * @param[out] pv_api_op
2771 *  Pointer to output argument structure
2772 *
2773 * @returns  Status
2774 *
2775 * @remarks
2776 *
2777 *
2778 *******************************************************************************
2779 */
ihevcd_set_params(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2780 WORD32 ihevcd_set_params(iv_obj_t *ps_codec_obj,
2781                          void *pv_api_ip,
2782                          void *pv_api_op)
2783 {
2784 
2785     codec_t *ps_codec;
2786     WORD32 ret = IV_SUCCESS;
2787     WORD32 strd;
2788     ivd_ctl_set_config_ip_t *s_ctl_dynparams_ip =
2789                     (ivd_ctl_set_config_ip_t *)pv_api_ip;
2790     ivd_ctl_set_config_op_t *s_ctl_dynparams_op =
2791                     (ivd_ctl_set_config_op_t *)pv_api_op;
2792 
2793     ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2794 
2795     s_ctl_dynparams_op->u4_error_code = 0;
2796 
2797     ps_codec->e_pic_skip_mode = s_ctl_dynparams_ip->e_frm_skip_mode;
2798 
2799     if(s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_NONE)
2800     {
2801 
2802         if((s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_P) &&
2803            (s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_B) &&
2804            (s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_PB))
2805         {
2806             s_ctl_dynparams_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
2807             ret = IV_FAIL;
2808         }
2809     }
2810 
2811     strd = ps_codec->i4_disp_strd;
2812     if(1 == ps_codec->i4_share_disp_buf)
2813     {
2814         strd = ps_codec->i4_strd;
2815     }
2816 
2817 
2818     {
2819         if((WORD32)s_ctl_dynparams_ip->u4_disp_wd >= ps_codec->i4_disp_wd)
2820         {
2821             strd = s_ctl_dynparams_ip->u4_disp_wd;
2822         }
2823         else if(0 == ps_codec->i4_sps_done)
2824         {
2825             strd = s_ctl_dynparams_ip->u4_disp_wd;
2826         }
2827         else if(s_ctl_dynparams_ip->u4_disp_wd == 0)
2828         {
2829             strd = ps_codec->i4_disp_strd;
2830         }
2831         else
2832         {
2833             strd = 0;
2834             s_ctl_dynparams_op->u4_error_code |= (1 << IVD_UNSUPPORTEDPARAM);
2835             s_ctl_dynparams_op->u4_error_code |= IHEVCD_INVALID_DISP_STRD;
2836             ret = IV_FAIL;
2837         }
2838     }
2839 
2840     ps_codec->i4_disp_strd = strd;
2841     if(1 == ps_codec->i4_share_disp_buf)
2842     {
2843         ps_codec->i4_strd = strd;
2844     }
2845 
2846     if(s_ctl_dynparams_ip->e_vid_dec_mode == IVD_DECODE_FRAME)
2847         ps_codec->i4_header_mode = 0;
2848     else if(s_ctl_dynparams_ip->e_vid_dec_mode == IVD_DECODE_HEADER)
2849         ps_codec->i4_header_mode = 1;
2850     else
2851     {
2852 
2853         s_ctl_dynparams_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
2854         ps_codec->i4_header_mode = 1;
2855         ret = IV_FAIL;
2856     }
2857 
2858     ps_codec->e_frm_out_mode = IVD_DISPLAY_FRAME_OUT;
2859 
2860     if((s_ctl_dynparams_ip->e_frm_out_mode != IVD_DECODE_FRAME_OUT) &&
2861        (s_ctl_dynparams_ip->e_frm_out_mode != IVD_DISPLAY_FRAME_OUT))
2862     {
2863         s_ctl_dynparams_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
2864         ret = IV_FAIL;
2865     }
2866     ps_codec->e_frm_out_mode = s_ctl_dynparams_ip->e_frm_out_mode;
2867 
2868     return ret;
2869 
2870 }
2871 /**
2872 *******************************************************************************
2873 *
2874 * @brief
2875 *  Resets the decoder state
2876 *
2877 * @par Description:
2878 *  Resets the decoder state by calling ihevcd_init()
2879 *
2880 * @param[in] ps_codec_obj
2881 *  Pointer to codec object at API level
2882 *
2883 * @param[in] pv_api_ip
2884 *  Pointer to input argument structure
2885 *
2886 * @param[out] pv_api_op
2887 *  Pointer to output argument structure
2888 *
2889 * @returns  Status
2890 *
2891 * @remarks
2892 *
2893 *
2894 *******************************************************************************
2895 */
ihevcd_reset(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2896 WORD32 ihevcd_reset(iv_obj_t *ps_codec_obj, void *pv_api_ip, void *pv_api_op)
2897 {
2898     codec_t *ps_codec;
2899     ivd_ctl_reset_op_t *s_ctl_reset_op = (ivd_ctl_reset_op_t *)pv_api_op;
2900     UNUSED(pv_api_ip);
2901     ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2902 
2903     if(ps_codec != NULL)
2904     {
2905         DEBUG("\nReset called \n");
2906         ihevcd_init(ps_codec);
2907     }
2908     else
2909     {
2910         DEBUG("\nReset called without Initializing the decoder\n");
2911         s_ctl_reset_op->u4_error_code = IHEVCD_INIT_NOT_DONE;
2912     }
2913 
2914     return IV_SUCCESS;
2915 }
2916 
2917 /**
2918 *******************************************************************************
2919 *
2920 * @brief
2921 *  Releases display buffer from application to codec  to signal to the codec
2922 * that it can write to this buffer  if required. Till release is called,
2923 * codec can not write  to this buffer
2924 *
2925 * @par Description:
2926 *  Marks the buffer as display done
2927 *
2928 * @param[in] ps_codec_obj
2929 *  Pointer to codec object at API level
2930 *
2931 * @param[in] pv_api_ip
2932 *  Pointer to input argument structure
2933 *
2934 * @param[out] pv_api_op
2935 *  Pointer to output argument structure
2936 *
2937 * @returns  Status
2938 *
2939 * @remarks
2940 *
2941 *
2942 *******************************************************************************
2943 */
2944 
ihevcd_rel_display_frame(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2945 WORD32 ihevcd_rel_display_frame(iv_obj_t *ps_codec_obj,
2946                                 void *pv_api_ip,
2947                                 void *pv_api_op)
2948 {
2949 
2950     ivd_rel_display_frame_ip_t *ps_dec_rel_disp_ip;
2951     ivd_rel_display_frame_op_t *ps_dec_rel_disp_op;
2952 
2953     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
2954 
2955     ps_dec_rel_disp_ip = (ivd_rel_display_frame_ip_t *)pv_api_ip;
2956     ps_dec_rel_disp_op = (ivd_rel_display_frame_op_t *)pv_api_op;
2957 
2958     UNUSED(ps_dec_rel_disp_op);
2959 
2960     if(0 == ps_codec->i4_share_disp_buf)
2961     {
2962         return IV_SUCCESS;
2963     }
2964 
2965     ihevc_buf_mgr_release((buf_mgr_t *)ps_codec->pv_pic_buf_mgr, ps_dec_rel_disp_ip->u4_disp_buf_id, BUF_MGR_DISP);
2966 
2967     return IV_SUCCESS;
2968 }
2969 /**
2970 *******************************************************************************
2971 *
2972 * @brief
2973 *  Sets degrade params
2974 *
2975 * @par Description:
2976 *  Sets degrade params.
2977 *  Refer to ihevcd_cxa_ctl_degrade_ip_t definition for details
2978 *
2979 * @param[in] ps_codec_obj
2980 *  Pointer to codec object at API level
2981 *
2982 * @param[in] pv_api_ip
2983 *  Pointer to input argument structure
2984 *
2985 * @param[out] pv_api_op
2986 *  Pointer to output argument structure
2987 *
2988 * @returns  Status
2989 *
2990 * @remarks
2991 *
2992 *
2993 *******************************************************************************
2994 */
2995 
ihevcd_set_degrade(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2996 WORD32 ihevcd_set_degrade(iv_obj_t *ps_codec_obj,
2997                           void *pv_api_ip,
2998                           void *pv_api_op)
2999 {
3000     ihevcd_cxa_ctl_degrade_ip_t *ps_ip;
3001     ihevcd_cxa_ctl_degrade_op_t *ps_op;
3002     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3003 
3004     ps_ip = (ihevcd_cxa_ctl_degrade_ip_t *)pv_api_ip;
3005     ps_op = (ihevcd_cxa_ctl_degrade_op_t *)pv_api_op;
3006 
3007     ps_codec->i4_degrade_type = ps_ip->i4_degrade_type;
3008     ps_codec->i4_nondegrade_interval = ps_ip->i4_nondegrade_interval;
3009     ps_codec->i4_degrade_pics = ps_ip->i4_degrade_pics;
3010 
3011     ps_op->u4_error_code = 0;
3012     ps_codec->i4_degrade_pic_cnt = 0;
3013 
3014     return IV_SUCCESS;
3015 }
3016 
3017 
3018 /**
3019 *******************************************************************************
3020 *
3021 * @brief
3022 *  Gets frame dimensions/offsets
3023 *
3024 * @par Description:
3025 *  Gets frame buffer chararacteristics such a x & y offsets  display and
3026 * buffer dimensions
3027 *
3028 * @param[in] ps_codec_obj
3029 *  Pointer to codec object at API level
3030 *
3031 * @param[in] pv_api_ip
3032 *  Pointer to input argument structure
3033 *
3034 * @param[out] pv_api_op
3035 *  Pointer to output argument structure
3036 *
3037 * @returns  Status
3038 *
3039 * @remarks
3040 *
3041 *
3042 *******************************************************************************
3043 */
3044 
ihevcd_get_frame_dimensions(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)3045 WORD32 ihevcd_get_frame_dimensions(iv_obj_t *ps_codec_obj,
3046                                    void *pv_api_ip,
3047                                    void *pv_api_op)
3048 {
3049     ihevcd_cxa_ctl_get_frame_dimensions_ip_t *ps_ip;
3050     ihevcd_cxa_ctl_get_frame_dimensions_op_t *ps_op;
3051     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3052     WORD32 disp_wd, disp_ht, buffer_wd, buffer_ht, x_offset, y_offset;
3053     ps_ip = (ihevcd_cxa_ctl_get_frame_dimensions_ip_t *)pv_api_ip;
3054     ps_op = (ihevcd_cxa_ctl_get_frame_dimensions_op_t *)pv_api_op;
3055     UNUSED(ps_ip);
3056     if(ps_codec->i4_sps_done)
3057     {
3058         disp_wd = ps_codec->i4_disp_wd;
3059         disp_ht = ps_codec->i4_disp_ht;
3060 
3061         if(0 == ps_codec->i4_share_disp_buf)
3062         {
3063             buffer_wd = disp_wd;
3064             buffer_ht = disp_ht;
3065         }
3066         else
3067         {
3068             buffer_wd = ps_codec->i4_strd;
3069             buffer_ht = ps_codec->i4_ht + PAD_HT;
3070         }
3071     }
3072     else
3073     {
3074 
3075         disp_wd = 0;
3076         disp_ht = 0;
3077 
3078         if(0 == ps_codec->i4_share_disp_buf)
3079         {
3080             buffer_wd = disp_wd;
3081             buffer_ht = disp_ht;
3082         }
3083         else
3084         {
3085             buffer_wd = ALIGN16(disp_wd) + PAD_WD;
3086             buffer_ht = ALIGN16(disp_ht) + PAD_HT;
3087 
3088         }
3089     }
3090     if(ps_codec->i4_strd > buffer_wd)
3091         buffer_wd = ps_codec->i4_strd;
3092 
3093     if(0 == ps_codec->i4_share_disp_buf)
3094     {
3095         x_offset = 0;
3096         y_offset = 0;
3097     }
3098     else
3099     {
3100         y_offset = PAD_TOP;
3101         x_offset = PAD_LEFT;
3102     }
3103 
3104     ps_op->u4_disp_wd[0] = disp_wd;
3105     ps_op->u4_disp_ht[0] = disp_ht;
3106     ps_op->u4_buffer_wd[0] = buffer_wd;
3107     ps_op->u4_buffer_ht[0] = buffer_ht;
3108     ps_op->u4_x_offset[0] = x_offset;
3109     ps_op->u4_y_offset[0] = y_offset;
3110 
3111     ps_op->u4_disp_wd[1] = ps_op->u4_disp_wd[2] = ((ps_op->u4_disp_wd[0] + 1)
3112                     >> 1);
3113     ps_op->u4_disp_ht[1] = ps_op->u4_disp_ht[2] = ((ps_op->u4_disp_ht[0] + 1)
3114                     >> 1);
3115     ps_op->u4_buffer_wd[1] = ps_op->u4_buffer_wd[2] = (ps_op->u4_buffer_wd[0]
3116                     >> 1);
3117     ps_op->u4_buffer_ht[1] = ps_op->u4_buffer_ht[2] = (ps_op->u4_buffer_ht[0]
3118                     >> 1);
3119     ps_op->u4_x_offset[1] = ps_op->u4_x_offset[2] = (ps_op->u4_x_offset[0]
3120                     >> 1);
3121     ps_op->u4_y_offset[1] = ps_op->u4_y_offset[2] = (ps_op->u4_y_offset[0]
3122                     >> 1);
3123 
3124     if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
3125                     || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
3126     {
3127         ps_op->u4_disp_wd[2] = 0;
3128         ps_op->u4_disp_ht[2] = 0;
3129         ps_op->u4_buffer_wd[2] = 0;
3130         ps_op->u4_buffer_ht[2] = 0;
3131         ps_op->u4_x_offset[2] = 0;
3132         ps_op->u4_y_offset[2] = 0;
3133 
3134         ps_op->u4_disp_wd[1] <<= 1;
3135         ps_op->u4_buffer_wd[1] <<= 1;
3136         ps_op->u4_x_offset[1] <<= 1;
3137     }
3138 
3139     return IV_SUCCESS;
3140 
3141 }
3142 
3143 
3144 /**
3145 *******************************************************************************
3146 *
3147 * @brief
3148 *  Gets vui parameters
3149 *
3150 * @par Description:
3151 *  Gets VUI parameters
3152 *
3153 * @param[in] ps_codec_obj
3154 *  Pointer to codec object at API level
3155 *
3156 * @param[in] pv_api_ip
3157 *  Pointer to input argument structure
3158 *
3159 * @param[out] pv_api_op
3160 *  Pointer to output argument structure
3161 *
3162 * @returns  Status
3163 *
3164 * @remarks
3165 *
3166 *
3167 *******************************************************************************
3168 */
ihevcd_get_vui_params(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)3169 WORD32 ihevcd_get_vui_params(iv_obj_t *ps_codec_obj,
3170                              void *pv_api_ip,
3171                              void *pv_api_op)
3172 {
3173     ihevcd_cxa_ctl_get_vui_params_ip_t *ps_ip;
3174     ihevcd_cxa_ctl_get_vui_params_op_t *ps_op;
3175     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3176     sps_t *ps_sps;
3177     vui_t *ps_vui;
3178     WORD32 i;
3179 
3180     ps_ip = (ihevcd_cxa_ctl_get_vui_params_ip_t *)pv_api_ip;
3181     ps_op = (ihevcd_cxa_ctl_get_vui_params_op_t *)pv_api_op;
3182 
3183     if(0 == ps_codec->i4_sps_done)
3184     {
3185         ps_op->u4_error_code = IHEVCD_VUI_PARAMS_NOT_FOUND;
3186         return IV_FAIL;
3187     }
3188 
3189     ps_sps = ps_codec->s_parse.ps_sps;
3190     if(0 == ps_sps->i1_sps_valid || 0 == ps_sps->i1_vui_parameters_present_flag)
3191     {
3192         WORD32 sps_idx = 0;
3193         ps_sps = ps_codec->ps_sps_base;
3194 
3195         while((0 == ps_sps->i1_sps_valid) || (0 == ps_sps->i1_vui_parameters_present_flag))
3196         {
3197             sps_idx++;
3198             ps_sps++;
3199 
3200             if(sps_idx == MAX_SPS_CNT - 1)
3201             {
3202                 ps_op->u4_error_code = IHEVCD_VUI_PARAMS_NOT_FOUND;
3203                 return IV_FAIL;
3204             }
3205         }
3206     }
3207 
3208     ps_vui = &ps_sps->s_vui_parameters;
3209     UNUSED(ps_ip);
3210 
3211     ps_op->u1_aspect_ratio_info_present_flag         =  ps_vui->u1_aspect_ratio_info_present_flag;
3212     ps_op->u1_aspect_ratio_idc                       =  ps_vui->u1_aspect_ratio_idc;
3213     ps_op->u2_sar_width                              =  ps_vui->u2_sar_width;
3214     ps_op->u2_sar_height                             =  ps_vui->u2_sar_height;
3215     ps_op->u1_overscan_info_present_flag             =  ps_vui->u1_overscan_info_present_flag;
3216     ps_op->u1_overscan_appropriate_flag              =  ps_vui->u1_overscan_appropriate_flag;
3217     ps_op->u1_video_signal_type_present_flag         =  ps_vui->u1_video_signal_type_present_flag;
3218     ps_op->u1_video_format                           =  ps_vui->u1_video_format;
3219     ps_op->u1_video_full_range_flag                  =  ps_vui->u1_video_full_range_flag;
3220     ps_op->u1_colour_description_present_flag        =  ps_vui->u1_colour_description_present_flag;
3221     ps_op->u1_colour_primaries                       =  ps_vui->u1_colour_primaries;
3222     ps_op->u1_transfer_characteristics               =  ps_vui->u1_transfer_characteristics;
3223     ps_op->u1_matrix_coefficients                    =  ps_vui->u1_matrix_coefficients;
3224     ps_op->u1_chroma_loc_info_present_flag           =  ps_vui->u1_chroma_loc_info_present_flag;
3225     ps_op->u1_chroma_sample_loc_type_top_field       =  ps_vui->u1_chroma_sample_loc_type_top_field;
3226     ps_op->u1_chroma_sample_loc_type_bottom_field    =  ps_vui->u1_chroma_sample_loc_type_bottom_field;
3227     ps_op->u1_neutral_chroma_indication_flag         =  ps_vui->u1_neutral_chroma_indication_flag;
3228     ps_op->u1_field_seq_flag                         =  ps_vui->u1_field_seq_flag;
3229     ps_op->u1_frame_field_info_present_flag          =  ps_vui->u1_frame_field_info_present_flag;
3230     ps_op->u1_default_display_window_flag            =  ps_vui->u1_default_display_window_flag;
3231     ps_op->u4_def_disp_win_left_offset               =  ps_vui->u4_def_disp_win_left_offset;
3232     ps_op->u4_def_disp_win_right_offset              =  ps_vui->u4_def_disp_win_right_offset;
3233     ps_op->u4_def_disp_win_top_offset                =  ps_vui->u4_def_disp_win_top_offset;
3234     ps_op->u4_def_disp_win_bottom_offset             =  ps_vui->u4_def_disp_win_bottom_offset;
3235     ps_op->u1_vui_hrd_parameters_present_flag        =  ps_vui->u1_vui_hrd_parameters_present_flag;
3236     ps_op->u1_vui_timing_info_present_flag           =  ps_vui->u1_vui_timing_info_present_flag;
3237     ps_op->u4_vui_num_units_in_tick                  =  ps_vui->u4_vui_num_units_in_tick;
3238     ps_op->u4_vui_time_scale                         =  ps_vui->u4_vui_time_scale;
3239     ps_op->u1_poc_proportional_to_timing_flag        =  ps_vui->u1_poc_proportional_to_timing_flag;
3240     ps_op->u4_num_ticks_poc_diff_one_minus1          =  ps_vui->u4_num_ticks_poc_diff_one_minus1;
3241     ps_op->u1_bitstream_restriction_flag             =  ps_vui->u1_bitstream_restriction_flag;
3242     ps_op->u1_tiles_fixed_structure_flag             =  ps_vui->u1_tiles_fixed_structure_flag;
3243     ps_op->u1_motion_vectors_over_pic_boundaries_flag =  ps_vui->u1_motion_vectors_over_pic_boundaries_flag;
3244     ps_op->u1_restricted_ref_pic_lists_flag          =  ps_vui->u1_restricted_ref_pic_lists_flag;
3245     ps_op->u4_min_spatial_segmentation_idc           =  ps_vui->u4_min_spatial_segmentation_idc;
3246     ps_op->u1_max_bytes_per_pic_denom                =  ps_vui->u1_max_bytes_per_pic_denom;
3247     ps_op->u1_max_bits_per_mincu_denom               =  ps_vui->u1_max_bits_per_mincu_denom;
3248     ps_op->u1_log2_max_mv_length_horizontal          =  ps_vui->u1_log2_max_mv_length_horizontal;
3249     ps_op->u1_log2_max_mv_length_vertical            =  ps_vui->u1_log2_max_mv_length_vertical;
3250 
3251 
3252     /* HRD parameters */
3253     ps_op->u1_timing_info_present_flag                         =    ps_vui->s_vui_hrd_parameters.u1_timing_info_present_flag;
3254     ps_op->u4_num_units_in_tick                                =    ps_vui->s_vui_hrd_parameters.u4_num_units_in_tick;
3255     ps_op->u4_time_scale                                       =    ps_vui->s_vui_hrd_parameters.u4_time_scale;
3256     ps_op->u1_nal_hrd_parameters_present_flag                  =    ps_vui->s_vui_hrd_parameters.u1_nal_hrd_parameters_present_flag;
3257     ps_op->u1_vcl_hrd_parameters_present_flag                  =    ps_vui->s_vui_hrd_parameters.u1_vcl_hrd_parameters_present_flag;
3258     ps_op->u1_cpbdpb_delays_present_flag                       =    ps_vui->s_vui_hrd_parameters.u1_cpbdpb_delays_present_flag;
3259     ps_op->u1_sub_pic_cpb_params_present_flag                  =    ps_vui->s_vui_hrd_parameters.u1_sub_pic_cpb_params_present_flag;
3260     ps_op->u1_tick_divisor_minus2                              =    ps_vui->s_vui_hrd_parameters.u1_tick_divisor_minus2;
3261     ps_op->u1_du_cpb_removal_delay_increment_length_minus1     =    ps_vui->s_vui_hrd_parameters.u1_du_cpb_removal_delay_increment_length_minus1;
3262     ps_op->u1_sub_pic_cpb_params_in_pic_timing_sei_flag        =    ps_vui->s_vui_hrd_parameters.u1_sub_pic_cpb_params_in_pic_timing_sei_flag;
3263     ps_op->u1_dpb_output_delay_du_length_minus1                =    ps_vui->s_vui_hrd_parameters.u1_dpb_output_delay_du_length_minus1;
3264     ps_op->u4_bit_rate_scale                                   =    ps_vui->s_vui_hrd_parameters.u4_bit_rate_scale;
3265     ps_op->u4_cpb_size_scale                                   =    ps_vui->s_vui_hrd_parameters.u4_cpb_size_scale;
3266     ps_op->u4_cpb_size_du_scale                                =    ps_vui->s_vui_hrd_parameters.u4_cpb_size_du_scale;
3267     ps_op->u1_initial_cpb_removal_delay_length_minus1          =    ps_vui->s_vui_hrd_parameters.u1_initial_cpb_removal_delay_length_minus1;
3268     ps_op->u1_au_cpb_removal_delay_length_minus1               =    ps_vui->s_vui_hrd_parameters.u1_au_cpb_removal_delay_length_minus1;
3269     ps_op->u1_dpb_output_delay_length_minus1                   =    ps_vui->s_vui_hrd_parameters.u1_dpb_output_delay_length_minus1;
3270 
3271     for(i = 0; i < 6; i++)
3272     {
3273         ps_op->au1_fixed_pic_rate_general_flag[i]                  =    ps_vui->s_vui_hrd_parameters.au1_fixed_pic_rate_general_flag[i];
3274         ps_op->au1_fixed_pic_rate_within_cvs_flag[i]               =    ps_vui->s_vui_hrd_parameters.au1_fixed_pic_rate_within_cvs_flag[i];
3275         ps_op->au2_elemental_duration_in_tc_minus1[i]              =    ps_vui->s_vui_hrd_parameters.au2_elemental_duration_in_tc_minus1[i];
3276         ps_op->au1_low_delay_hrd_flag[i]                           =    ps_vui->s_vui_hrd_parameters.au1_low_delay_hrd_flag[i];
3277         ps_op->au1_cpb_cnt_minus1[i]                               =    ps_vui->s_vui_hrd_parameters.au1_cpb_cnt_minus1[i];
3278     }
3279 
3280 
3281     return IV_SUCCESS;
3282 }
3283 
3284 /**
3285 *******************************************************************************
3286 *
3287 * @brief
3288 *  Gets SEI mastering display color volume parameters
3289 *
3290 * @par Description:
3291 *  Gets SEI mastering display color volume parameters
3292 *
3293 * @param[in] ps_codec_obj
3294 *  Pointer to codec object at API level
3295 *
3296 * @param[in] pv_api_ip
3297 *  Pointer to input argument structure
3298 *
3299 * @param[out] pv_api_op
3300 *  Pointer to output argument structure
3301 *
3302 * @returns  Status
3303 *
3304 * @remarks
3305 *
3306 *
3307 *******************************************************************************
3308 */
ihevcd_get_sei_mastering_params(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)3309 WORD32 ihevcd_get_sei_mastering_params(iv_obj_t *ps_codec_obj,
3310                              void *pv_api_ip,
3311                              void *pv_api_op)
3312 {
3313     ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *ps_ip;
3314     ihevcd_cxa_ctl_get_sei_mastering_params_op_t *ps_op;
3315     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3316     sei_params_t *ps_sei;
3317     mastering_dis_col_vol_sei_params_t *ps_mastering_dis_col_vol;
3318     WORD32 i;
3319 
3320     ps_ip = (ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *)pv_api_ip;
3321     ps_op = (ihevcd_cxa_ctl_get_sei_mastering_params_op_t *)pv_api_op;
3322     UNUSED(ps_ip);
3323     if(NULL == ps_codec->ps_disp_buf)
3324     {
3325         ps_op->u4_error_code = IHEVCD_SEI_MASTERING_PARAMS_NOT_FOUND;
3326         return IV_FAIL;
3327     }
3328     ps_sei = &ps_codec->ps_disp_buf->s_sei_params;
3329     if((0 == ps_sei->i4_sei_mastering_disp_colour_vol_params_present_flags)
3330                     || (0 == ps_sei->i1_sei_parameters_present_flag))
3331     {
3332         ps_op->u4_error_code = IHEVCD_SEI_MASTERING_PARAMS_NOT_FOUND;
3333         return IV_FAIL;
3334     }
3335 
3336     ps_mastering_dis_col_vol = &ps_sei->s_mastering_dis_col_vol_sei_params;
3337 
3338     for(i = 0; i < 3; i++)
3339     {
3340         ps_op->au2_display_primaries_x[i] =
3341                     ps_mastering_dis_col_vol->au2_display_primaries_x[i];
3342 
3343         ps_op->au2_display_primaries_y[i] =
3344                     ps_mastering_dis_col_vol->au2_display_primaries_y[i];
3345     }
3346 
3347     ps_op->u2_white_point_x = ps_mastering_dis_col_vol->u2_white_point_x;
3348 
3349     ps_op->u2_white_point_y = ps_mastering_dis_col_vol->u2_white_point_y;
3350 
3351     ps_op->u4_max_display_mastering_luminance =
3352                     ps_mastering_dis_col_vol->u4_max_display_mastering_luminance;
3353 
3354     ps_op->u4_min_display_mastering_luminance =
3355                     ps_mastering_dis_col_vol->u4_min_display_mastering_luminance;
3356 
3357     return IV_SUCCESS;
3358 }
3359 
3360 /**
3361 *******************************************************************************
3362 *
3363 * @brief
3364 *  Sets Processor type
3365 *
3366 * @par Description:
3367 *  Sets Processor type
3368 *
3369 * @param[in] ps_codec_obj
3370 *  Pointer to codec object at API level
3371 *
3372 * @param[in] pv_api_ip
3373 *  Pointer to input argument structure
3374 *
3375 * @param[out] pv_api_op
3376 *  Pointer to output argument structure
3377 *
3378 * @returns  Status
3379 *
3380 * @remarks
3381 *
3382 *
3383 *******************************************************************************
3384 */
3385 
ihevcd_set_processor(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)3386 WORD32 ihevcd_set_processor(iv_obj_t *ps_codec_obj,
3387                             void *pv_api_ip,
3388                             void *pv_api_op)
3389 {
3390     ihevcd_cxa_ctl_set_processor_ip_t *ps_ip;
3391     ihevcd_cxa_ctl_set_processor_op_t *ps_op;
3392     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3393 
3394     ps_ip = (ihevcd_cxa_ctl_set_processor_ip_t *)pv_api_ip;
3395     ps_op = (ihevcd_cxa_ctl_set_processor_op_t *)pv_api_op;
3396 
3397     ps_codec->e_processor_arch = (IVD_ARCH_T)ps_ip->u4_arch;
3398     ps_codec->e_processor_soc = (IVD_SOC_T)ps_ip->u4_soc;
3399 
3400     ihevcd_init_function_ptr(ps_codec);
3401 
3402     ihevcd_update_function_ptr(ps_codec);
3403 
3404     if(ps_codec->e_processor_soc && (ps_codec->e_processor_soc <= SOC_HISI_37X))
3405     {
3406         /* 8th bit indicates if format conversion is to be done ahead */
3407         if(ps_codec->e_processor_soc & 0x80)
3408             ps_codec->u4_enable_fmt_conv_ahead = 1;
3409 
3410         /* Lower 7 bit indicate NCTB - if non-zero */
3411         ps_codec->e_processor_soc &= 0x7F;
3412 
3413         if(ps_codec->e_processor_soc)
3414             ps_codec->u4_nctb = ps_codec->e_processor_soc;
3415 
3416 
3417     }
3418 
3419     if((ps_codec->e_processor_soc == SOC_HISI_37X) && (ps_codec->i4_num_cores == 2))
3420     {
3421         ps_codec->u4_nctb = 2;
3422     }
3423 
3424 
3425     ps_op->u4_error_code = 0;
3426     return IV_SUCCESS;
3427 }
3428 
3429 /**
3430 *******************************************************************************
3431 *
3432 * @brief
3433 *  Sets Number of cores that can be used in the codec. Codec uses these many
3434 * threads for decoding
3435 *
3436 * @par Description:
3437 *  Sets number of cores
3438 *
3439 * @param[in] ps_codec_obj
3440 *  Pointer to codec object at API level
3441 *
3442 * @param[in] pv_api_ip
3443 *  Pointer to input argument structure
3444 *
3445 * @param[out] pv_api_op
3446 *  Pointer to output argument structure
3447 *
3448 * @returns  Status
3449 *
3450 * @remarks
3451 *
3452 *
3453 *******************************************************************************
3454 */
3455 
ihevcd_set_num_cores(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)3456 WORD32 ihevcd_set_num_cores(iv_obj_t *ps_codec_obj,
3457                             void *pv_api_ip,
3458                             void *pv_api_op)
3459 {
3460     ihevcd_cxa_ctl_set_num_cores_ip_t *ps_ip;
3461     ihevcd_cxa_ctl_set_num_cores_op_t *ps_op;
3462     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3463 
3464     ps_ip = (ihevcd_cxa_ctl_set_num_cores_ip_t *)pv_api_ip;
3465     ps_op = (ihevcd_cxa_ctl_set_num_cores_op_t *)pv_api_op;
3466 
3467 #ifdef MULTICORE
3468     ps_codec->i4_num_cores = ps_ip->u4_num_cores;
3469 #else
3470     ps_codec->i4_num_cores = 1;
3471 #endif
3472     ps_op->u4_error_code = 0;
3473     return IV_SUCCESS;
3474 }
3475 /**
3476 *******************************************************************************
3477 *
3478 * @brief
3479 *  Codec control call
3480 *
3481 * @par Description:
3482 *  Codec control call which in turn calls appropriate calls  based on
3483 * subcommand
3484 *
3485 * @param[in] ps_codec_obj
3486 *  Pointer to codec object at API level
3487 *
3488 * @param[in] pv_api_ip
3489 *  Pointer to input argument structure
3490 *
3491 * @param[out] pv_api_op
3492 *  Pointer to output argument structure
3493 *
3494 * @returns  Status
3495 *
3496 * @remarks
3497 *
3498 *
3499 *******************************************************************************
3500 */
3501 
ihevcd_ctl(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)3502 WORD32 ihevcd_ctl(iv_obj_t *ps_codec_obj, void *pv_api_ip, void *pv_api_op)
3503 {
3504     ivd_ctl_set_config_ip_t *ps_ctl_ip;
3505     ivd_ctl_set_config_op_t *ps_ctl_op;
3506     WORD32 ret = 0;
3507     WORD32 subcommand;
3508     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3509 
3510     ps_ctl_ip = (ivd_ctl_set_config_ip_t *)pv_api_ip;
3511     ps_ctl_op = (ivd_ctl_set_config_op_t *)pv_api_op;
3512 
3513     if(ps_codec->i4_init_done != 1)
3514     {
3515         ps_ctl_op->u4_error_code |= 1 << IVD_FATALERROR;
3516         ps_ctl_op->u4_error_code |= IHEVCD_INIT_NOT_DONE;
3517         return IV_FAIL;
3518     }
3519     subcommand = ps_ctl_ip->e_sub_cmd;
3520 
3521     switch(subcommand)
3522     {
3523         case IVD_CMD_CTL_GETPARAMS:
3524             ret = ihevcd_get_status(ps_codec_obj, (void *)pv_api_ip,
3525                                     (void *)pv_api_op);
3526             break;
3527         case IVD_CMD_CTL_SETPARAMS:
3528             ret = ihevcd_set_params(ps_codec_obj, (void *)pv_api_ip,
3529                                     (void *)pv_api_op);
3530             break;
3531         case IVD_CMD_CTL_RESET:
3532             ret = ihevcd_reset(ps_codec_obj, (void *)pv_api_ip,
3533                                (void *)pv_api_op);
3534             break;
3535         case IVD_CMD_CTL_SETDEFAULT:
3536         {
3537             ivd_ctl_set_config_op_t *s_ctl_dynparams_op =
3538                             (ivd_ctl_set_config_op_t *)pv_api_op;
3539 
3540             ret = ihevcd_set_default_params(ps_codec);
3541             if(IV_SUCCESS == ret)
3542                 s_ctl_dynparams_op->u4_error_code = 0;
3543             break;
3544         }
3545         case IVD_CMD_CTL_FLUSH:
3546             ret = ihevcd_set_flush_mode(ps_codec_obj, (void *)pv_api_ip,
3547                                         (void *)pv_api_op);
3548             break;
3549         case IVD_CMD_CTL_GETBUFINFO:
3550             ret = ihevcd_get_buf_info(ps_codec_obj, (void *)pv_api_ip,
3551                                       (void *)pv_api_op);
3552             break;
3553         case IVD_CMD_CTL_GETVERSION:
3554         {
3555             ivd_ctl_getversioninfo_ip_t *ps_ip;
3556             ivd_ctl_getversioninfo_op_t *ps_op;
3557             IV_API_CALL_STATUS_T ret;
3558             ps_ip = (ivd_ctl_getversioninfo_ip_t *)pv_api_ip;
3559             ps_op = (ivd_ctl_getversioninfo_op_t *)pv_api_op;
3560 
3561             ps_op->u4_error_code = IV_SUCCESS;
3562 
3563             if((WORD32)ps_ip->u4_version_buffer_size <= 0)
3564             {
3565                 ps_op->u4_error_code = IHEVCD_CXA_VERS_BUF_INSUFFICIENT;
3566                 ret = IV_FAIL;
3567             }
3568             else
3569             {
3570                 ret = ihevcd_get_version((CHAR *)ps_ip->pv_version_buffer,
3571                                          ps_ip->u4_version_buffer_size);
3572                 if(ret != IV_SUCCESS)
3573                 {
3574                     ps_op->u4_error_code = IHEVCD_CXA_VERS_BUF_INSUFFICIENT;
3575                     ret = IV_FAIL;
3576                 }
3577             }
3578         }
3579             break;
3580         case IHEVCD_CXA_CMD_CTL_DEGRADE:
3581             ret = ihevcd_set_degrade(ps_codec_obj, (void *)pv_api_ip,
3582                             (void *)pv_api_op);
3583             break;
3584         case IHEVCD_CXA_CMD_CTL_SET_NUM_CORES:
3585             ret = ihevcd_set_num_cores(ps_codec_obj, (void *)pv_api_ip,
3586                                        (void *)pv_api_op);
3587             break;
3588         case IHEVCD_CXA_CMD_CTL_GET_BUFFER_DIMENSIONS:
3589             ret = ihevcd_get_frame_dimensions(ps_codec_obj, (void *)pv_api_ip,
3590                                               (void *)pv_api_op);
3591             break;
3592         case IHEVCD_CXA_CMD_CTL_GET_VUI_PARAMS:
3593             ret = ihevcd_get_vui_params(ps_codec_obj, (void *)pv_api_ip,
3594                                         (void *)pv_api_op);
3595             break;
3596         case IHEVCD_CXA_CMD_CTL_GET_SEI_MASTERING_PARAMS:
3597             ret = ihevcd_get_sei_mastering_params(ps_codec_obj, (void *)pv_api_ip,
3598                                         (void *)pv_api_op);
3599             break;
3600         case IHEVCD_CXA_CMD_CTL_SET_PROCESSOR:
3601             ret = ihevcd_set_processor(ps_codec_obj, (void *)pv_api_ip,
3602                             (void *)pv_api_op);
3603             break;
3604         default:
3605             DEBUG("\nDo nothing\n");
3606             break;
3607     }
3608 
3609     return ret;
3610 }
3611 
3612 /**
3613 *******************************************************************************
3614 *
3615 * @brief
3616 *  Codecs entry point function. All the function calls to  the codec are
3617 * done using this function with different  values specified in command
3618 *
3619 * @par Description:
3620 *  Arguments are tested for validity and then based on the  command
3621 * appropriate function is called
3622 *
3623 * @param[in] ps_handle
3624 *  API level handle for codec
3625 *
3626 * @param[in] pv_api_ip
3627 *  Input argument structure
3628 *
3629 * @param[out] pv_api_op
3630 *  Output argument structure
3631 *
3632 * @returns  Status of the function corresponding to command
3633 *
3634 * @remarks
3635 *
3636 *
3637 *******************************************************************************
3638 */
ihevcd_cxa_api_function(iv_obj_t * ps_handle,void * pv_api_ip,void * pv_api_op)3639 IV_API_CALL_STATUS_T ihevcd_cxa_api_function(iv_obj_t *ps_handle,
3640                                              void *pv_api_ip,
3641                                              void *pv_api_op)
3642 {
3643     WORD32 command;
3644     UWORD32 *pu4_ptr_cmd;
3645     WORD32 ret = 0;
3646     IV_API_CALL_STATUS_T e_status;
3647     e_status = api_check_struct_sanity(ps_handle, pv_api_ip, pv_api_op);
3648 
3649     if(e_status != IV_SUCCESS)
3650     {
3651         DEBUG("error code = %d\n", *((UWORD32 *)pv_api_op + 1));
3652         return IV_FAIL;
3653     }
3654 
3655     pu4_ptr_cmd = (UWORD32 *)pv_api_ip;
3656     pu4_ptr_cmd++;
3657 
3658     command = *pu4_ptr_cmd;
3659 
3660     switch(command)
3661     {
3662         case IVD_CMD_CREATE:
3663             ret = ihevcd_create(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3664             break;
3665         case IVD_CMD_DELETE:
3666             ret = ihevcd_delete(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3667             break;
3668 
3669         case IVD_CMD_VIDEO_DECODE:
3670             ret = ihevcd_decode(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3671             break;
3672 
3673         case IVD_CMD_GET_DISPLAY_FRAME:
3674             //ret = ihevcd_get_display_frame(ps_handle,(void *)pv_api_ip,(void *)pv_api_op);
3675             break;
3676 
3677         case IVD_CMD_SET_DISPLAY_FRAME:
3678             ret = ihevcd_set_display_frame(ps_handle, (void *)pv_api_ip,
3679                                            (void *)pv_api_op);
3680 
3681             break;
3682 
3683         case IVD_CMD_REL_DISPLAY_FRAME:
3684             ret = ihevcd_rel_display_frame(ps_handle, (void *)pv_api_ip,
3685                                            (void *)pv_api_op);
3686             break;
3687 
3688         case IVD_CMD_VIDEO_CTL:
3689             ret = ihevcd_ctl(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3690             break;
3691         default:
3692             ret = IV_FAIL;
3693             break;
3694     }
3695 
3696     return (IV_API_CALL_STATUS_T)ret;
3697 }
3698 
3699