1 /*
2 * Copyright (c) 2017-2019, STMicroelectronics - All Rights Reserved
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <errno.h>
8
9 #include <libfdt.h>
10
11 #include <platform_def.h>
12
13 #include <common/debug.h>
14 #include <drivers/delay_timer.h>
15 #include <drivers/st/stm32_i2c.h>
16 #include <drivers/st/stm32mp_pmic.h>
17 #include <drivers/st/stpmic1.h>
18 #include <lib/mmio.h>
19 #include <lib/utils_def.h>
20
21 #define STPMIC1_LDO12356_OUTPUT_MASK (uint8_t)(GENMASK(6, 2))
22 #define STPMIC1_LDO12356_OUTPUT_SHIFT 2
23 #define STPMIC1_LDO3_MODE (uint8_t)(BIT(7))
24 #define STPMIC1_LDO3_DDR_SEL 31U
25 #define STPMIC1_LDO3_1800000 (9U << STPMIC1_LDO12356_OUTPUT_SHIFT)
26
27 #define STPMIC1_BUCK_OUTPUT_SHIFT 2
28 #define STPMIC1_BUCK3_1V8 (39U << STPMIC1_BUCK_OUTPUT_SHIFT)
29
30 #define STPMIC1_DEFAULT_START_UP_DELAY_MS 1
31
32 static struct i2c_handle_s i2c_handle;
33 static uint32_t pmic_i2c_addr;
34
dt_get_pmic_node(void * fdt)35 static int dt_get_pmic_node(void *fdt)
36 {
37 return fdt_node_offset_by_compatible(fdt, -1, "st,stpmic1");
38 }
39
dt_pmic_status(void)40 int dt_pmic_status(void)
41 {
42 int node;
43 void *fdt;
44
45 if (fdt_get_address(&fdt) == 0) {
46 return -ENOENT;
47 }
48
49 node = dt_get_pmic_node(fdt);
50 if (node <= 0) {
51 return -FDT_ERR_NOTFOUND;
52 }
53
54 return fdt_get_status(node);
55 }
56
dt_pmic_is_secure(void)57 static bool dt_pmic_is_secure(void)
58 {
59 int status = dt_pmic_status();
60
61 return (status >= 0) &&
62 (status == DT_SECURE) &&
63 (i2c_handle.dt_status == DT_SECURE);
64 }
65
66 /*
67 * Get PMIC and its I2C bus configuration from the device tree.
68 * Return 0 on success, negative on error, 1 if no PMIC node is found.
69 */
dt_pmic_i2c_config(struct dt_node_info * i2c_info,struct stm32_i2c_init_s * init)70 static int dt_pmic_i2c_config(struct dt_node_info *i2c_info,
71 struct stm32_i2c_init_s *init)
72 {
73 int pmic_node, i2c_node;
74 void *fdt;
75 const fdt32_t *cuint;
76
77 if (fdt_get_address(&fdt) == 0) {
78 return -ENOENT;
79 }
80
81 pmic_node = dt_get_pmic_node(fdt);
82 if (pmic_node < 0) {
83 return 1;
84 }
85
86 cuint = fdt_getprop(fdt, pmic_node, "reg", NULL);
87 if (cuint == NULL) {
88 return -FDT_ERR_NOTFOUND;
89 }
90
91 pmic_i2c_addr = fdt32_to_cpu(*cuint) << 1;
92 if (pmic_i2c_addr > UINT16_MAX) {
93 return -EINVAL;
94 }
95
96 i2c_node = fdt_parent_offset(fdt, pmic_node);
97 if (i2c_node < 0) {
98 return -FDT_ERR_NOTFOUND;
99 }
100
101 dt_fill_device_info(i2c_info, i2c_node);
102 if (i2c_info->base == 0U) {
103 return -FDT_ERR_NOTFOUND;
104 }
105
106 return stm32_i2c_get_setup_from_fdt(fdt, i2c_node, init);
107 }
108
dt_pmic_configure_boot_on_regulators(void)109 int dt_pmic_configure_boot_on_regulators(void)
110 {
111 int pmic_node, regulators_node, regulator_node;
112 void *fdt;
113
114 if (fdt_get_address(&fdt) == 0) {
115 return -ENOENT;
116 }
117
118 pmic_node = dt_get_pmic_node(fdt);
119 if (pmic_node < 0) {
120 return -FDT_ERR_NOTFOUND;
121 }
122
123 regulators_node = fdt_subnode_offset(fdt, pmic_node, "regulators");
124
125 fdt_for_each_subnode(regulator_node, fdt, regulators_node) {
126 const fdt32_t *cuint;
127 const char *node_name = fdt_get_name(fdt, regulator_node, NULL);
128 uint16_t voltage;
129 int status;
130
131 #if defined(IMAGE_BL2)
132 if ((fdt_getprop(fdt, regulator_node, "regulator-boot-on",
133 NULL) == NULL) &&
134 (fdt_getprop(fdt, regulator_node, "regulator-always-on",
135 NULL) == NULL)) {
136 #else
137 if (fdt_getprop(fdt, regulator_node, "regulator-boot-on",
138 NULL) == NULL) {
139 #endif
140 continue;
141 }
142
143 if (fdt_getprop(fdt, regulator_node, "regulator-pull-down",
144 NULL) != NULL) {
145
146 status = stpmic1_regulator_pull_down_set(node_name);
147 if (status != 0) {
148 return status;
149 }
150 }
151
152 if (fdt_getprop(fdt, regulator_node, "st,mask-reset",
153 NULL) != NULL) {
154
155 status = stpmic1_regulator_mask_reset_set(node_name);
156 if (status != 0) {
157 return status;
158 }
159 }
160
161 cuint = fdt_getprop(fdt, regulator_node,
162 "regulator-min-microvolt", NULL);
163 if (cuint == NULL) {
164 continue;
165 }
166
167 /* DT uses microvolts, whereas driver awaits millivolts */
168 voltage = (uint16_t)(fdt32_to_cpu(*cuint) / 1000U);
169
170 status = stpmic1_regulator_voltage_set(node_name, voltage);
171 if (status != 0) {
172 return status;
173 }
174
175 if (stpmic1_is_regulator_enabled(node_name) == 0U) {
176 status = stpmic1_regulator_enable(node_name);
177 if (status != 0) {
178 return status;
179 }
180 }
181 }
182
183 return 0;
184 }
185
186 bool initialize_pmic_i2c(void)
187 {
188 int ret;
189 struct dt_node_info i2c_info;
190 struct i2c_handle_s *i2c = &i2c_handle;
191 struct stm32_i2c_init_s i2c_init;
192
193 ret = dt_pmic_i2c_config(&i2c_info, &i2c_init);
194 if (ret < 0) {
195 ERROR("I2C configuration failed %d\n", ret);
196 panic();
197 }
198
199 if (ret != 0) {
200 return false;
201 }
202
203 /* Initialize PMIC I2C */
204 i2c->i2c_base_addr = i2c_info.base;
205 i2c->dt_status = i2c_info.status;
206 i2c->clock = i2c_info.clock;
207 i2c_init.own_address1 = pmic_i2c_addr;
208 i2c_init.addressing_mode = I2C_ADDRESSINGMODE_7BIT;
209 i2c_init.dual_address_mode = I2C_DUALADDRESS_DISABLE;
210 i2c_init.own_address2 = 0;
211 i2c_init.own_address2_masks = I2C_OAR2_OA2NOMASK;
212 i2c_init.general_call_mode = I2C_GENERALCALL_DISABLE;
213 i2c_init.no_stretch_mode = I2C_NOSTRETCH_DISABLE;
214 i2c_init.analog_filter = 1;
215 i2c_init.digital_filter_coef = 0;
216
217 ret = stm32_i2c_init(i2c, &i2c_init);
218 if (ret != 0) {
219 ERROR("Cannot initialize I2C %x (%d)\n",
220 i2c->i2c_base_addr, ret);
221 panic();
222 }
223
224 if (!stm32_i2c_is_device_ready(i2c, pmic_i2c_addr, 1,
225 I2C_TIMEOUT_BUSY_MS)) {
226 ERROR("I2C device not ready\n");
227 panic();
228 }
229
230 stpmic1_bind_i2c(i2c, (uint16_t)pmic_i2c_addr);
231
232 return true;
233 }
234
235 static void register_pmic_shared_peripherals(void)
236 {
237 uintptr_t i2c_base = i2c_handle.i2c_base_addr;
238
239 if (dt_pmic_is_secure()) {
240 stm32mp_register_secure_periph_iomem(i2c_base);
241 } else {
242 if (i2c_base != 0U) {
243 stm32mp_register_non_secure_periph_iomem(i2c_base);
244 }
245 }
246 }
247
248 void initialize_pmic(void)
249 {
250 unsigned long pmic_version;
251
252 if (!initialize_pmic_i2c()) {
253 VERBOSE("No PMIC\n");
254 return;
255 }
256
257 register_pmic_shared_peripherals();
258
259 if (stpmic1_get_version(&pmic_version) != 0) {
260 ERROR("Failed to access PMIC\n");
261 panic();
262 }
263
264 INFO("PMIC version = 0x%02lx\n", pmic_version);
265 stpmic1_dump_regulators();
266
267 #if defined(IMAGE_BL2)
268 if (dt_pmic_configure_boot_on_regulators() != 0) {
269 panic();
270 };
271 #endif
272 }
273
274 int pmic_ddr_power_init(enum ddr_type ddr_type)
275 {
276 bool buck3_at_1v8 = false;
277 uint8_t read_val;
278 int status;
279
280 switch (ddr_type) {
281 case STM32MP_DDR3:
282 /* Set LDO3 to sync mode */
283 status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val);
284 if (status != 0) {
285 return status;
286 }
287
288 read_val &= ~STPMIC1_LDO3_MODE;
289 read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK;
290 read_val |= STPMIC1_LDO3_DDR_SEL <<
291 STPMIC1_LDO12356_OUTPUT_SHIFT;
292
293 status = stpmic1_register_write(LDO3_CONTROL_REG, read_val);
294 if (status != 0) {
295 return status;
296 }
297
298 status = stpmic1_regulator_voltage_set("buck2", 1350);
299 if (status != 0) {
300 return status;
301 }
302
303 status = stpmic1_regulator_enable("buck2");
304 if (status != 0) {
305 return status;
306 }
307
308 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
309
310 status = stpmic1_regulator_enable("vref_ddr");
311 if (status != 0) {
312 return status;
313 }
314
315 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
316
317 status = stpmic1_regulator_enable("ldo3");
318 if (status != 0) {
319 return status;
320 }
321
322 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
323 break;
324
325 case STM32MP_LPDDR2:
326 case STM32MP_LPDDR3:
327 /*
328 * Set LDO3 to 1.8V
329 * Set LDO3 to bypass mode if BUCK3 = 1.8V
330 * Set LDO3 to normal mode if BUCK3 != 1.8V
331 */
332 status = stpmic1_register_read(BUCK3_CONTROL_REG, &read_val);
333 if (status != 0) {
334 return status;
335 }
336
337 if ((read_val & STPMIC1_BUCK3_1V8) == STPMIC1_BUCK3_1V8) {
338 buck3_at_1v8 = true;
339 }
340
341 status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val);
342 if (status != 0) {
343 return status;
344 }
345
346 read_val &= ~STPMIC1_LDO3_MODE;
347 read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK;
348 read_val |= STPMIC1_LDO3_1800000;
349 if (buck3_at_1v8) {
350 read_val |= STPMIC1_LDO3_MODE;
351 }
352
353 status = stpmic1_register_write(LDO3_CONTROL_REG, read_val);
354 if (status != 0) {
355 return status;
356 }
357
358 status = stpmic1_regulator_voltage_set("buck2", 1200);
359 if (status != 0) {
360 return status;
361 }
362
363 status = stpmic1_regulator_enable("ldo3");
364 if (status != 0) {
365 return status;
366 }
367
368 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
369
370 status = stpmic1_regulator_enable("buck2");
371 if (status != 0) {
372 return status;
373 }
374
375 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
376
377 status = stpmic1_regulator_enable("vref_ddr");
378 if (status != 0) {
379 return status;
380 }
381
382 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
383 break;
384
385 default:
386 break;
387 };
388
389 return 0;
390 }
391