Searched defs:ld1r (Results 1 – 6 of 6) sorted by relevance
| /external/llvm-project/llvm/test/tools/llvm-mca/AArch64/Exynos/ |
| D | asimd-ld1.s | 7 ld1r {v0.2s}, [sp] label
14 ld1r {v0.2d}, [sp] label
21 ld1r {v0.2s}, [sp], #4 label
28 ld1r {v0.2d}, [sp], #8 label
35 ld1r {v0.2s}, [sp], x0 label
42 ld1r {v0.2d}, [sp], x0 label
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| /external/llvm/test/MC/AArch64/ |
| D | arm64-simd-ldst.s | 850 ld1r: label
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| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | arm64-simd-ldst.s | 850 ld1r: label
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| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 941 __ ld1r(v2.V16B(), MemOperand(x0)); in GenerateTestSequenceNEON() local
942 __ ld1r(v2.V16B(), MemOperand(x1, x2, PostIndex)); in GenerateTestSequenceNEON() local
943 __ ld1r(v22.V16B(), MemOperand(x1, 1, PostIndex)); in GenerateTestSequenceNEON() local
944 __ ld1r(v25.V1D(), MemOperand(x0)); in GenerateTestSequenceNEON() local
945 __ ld1r(v9.V1D(), MemOperand(x1, x2, PostIndex)); in GenerateTestSequenceNEON() local
946 __ ld1r(v23.V1D(), MemOperand(x1, 8, PostIndex)); in GenerateTestSequenceNEON() local
947 __ ld1r(v19.V2D(), MemOperand(x0)); in GenerateTestSequenceNEON() local
948 __ ld1r(v21.V2D(), MemOperand(x1, x2, PostIndex)); in GenerateTestSequenceNEON() local
949 __ ld1r(v30.V2D(), MemOperand(x1, 8, PostIndex)); in GenerateTestSequenceNEON() local
950 __ ld1r(v24.V2S(), MemOperand(x0)); in GenerateTestSequenceNEON() local
[all …]
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| /external/vixl/src/aarch64/ |
| D | logic-aarch64.cc | 187 void Simulator::ld1r(VectorFormat vform, in ld1r() function in vixl::aarch64::Simulator
204 void Simulator::ld1r(VectorFormat vform, LogicVRegister dst, uint64_t addr) { in ld1r() function in vixl::aarch64::Simulator
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| D | assembler-aarch64.cc | 2368 void Assembler::ld1r(const VRegister& vt, const MemOperand& src) { in ld1r() function in vixl::aarch64::Assembler
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