1 //===-- DWARFExpression.cpp -----------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "llvm/DebugInfo/DWARF/DWARFExpression.h"
10 #include "llvm/DebugInfo/DWARF/DWARFUnit.h"
11 #include "llvm/MC/MCRegisterInfo.h"
12 #include "llvm/Support/Format.h"
13 #include <cassert>
14 #include <cstdint>
15 #include <vector>
16 
17 using namespace llvm;
18 using namespace dwarf;
19 
20 namespace llvm {
21 
22 typedef std::vector<DWARFExpression::Operation::Description> DescVector;
23 
getDescriptions()24 static DescVector getDescriptions() {
25   DescVector Descriptions;
26   typedef DWARFExpression::Operation Op;
27   typedef Op::Description Desc;
28 
29   Descriptions.resize(0xff);
30   Descriptions[DW_OP_addr] = Desc(Op::Dwarf2, Op::SizeAddr);
31   Descriptions[DW_OP_deref] = Desc(Op::Dwarf2);
32   Descriptions[DW_OP_const1u] = Desc(Op::Dwarf2, Op::Size1);
33   Descriptions[DW_OP_const1s] = Desc(Op::Dwarf2, Op::SignedSize1);
34   Descriptions[DW_OP_const2u] = Desc(Op::Dwarf2, Op::Size2);
35   Descriptions[DW_OP_const2s] = Desc(Op::Dwarf2, Op::SignedSize2);
36   Descriptions[DW_OP_const4u] = Desc(Op::Dwarf2, Op::Size4);
37   Descriptions[DW_OP_const4s] = Desc(Op::Dwarf2, Op::SignedSize4);
38   Descriptions[DW_OP_const8u] = Desc(Op::Dwarf2, Op::Size8);
39   Descriptions[DW_OP_const8s] = Desc(Op::Dwarf2, Op::SignedSize8);
40   Descriptions[DW_OP_constu] = Desc(Op::Dwarf2, Op::SizeLEB);
41   Descriptions[DW_OP_consts] = Desc(Op::Dwarf2, Op::SignedSizeLEB);
42   Descriptions[DW_OP_dup] = Desc(Op::Dwarf2);
43   Descriptions[DW_OP_drop] = Desc(Op::Dwarf2);
44   Descriptions[DW_OP_over] = Desc(Op::Dwarf2);
45   Descriptions[DW_OP_pick] = Desc(Op::Dwarf2, Op::Size1);
46   Descriptions[DW_OP_swap] = Desc(Op::Dwarf2);
47   Descriptions[DW_OP_rot] = Desc(Op::Dwarf2);
48   Descriptions[DW_OP_xderef] = Desc(Op::Dwarf2);
49   Descriptions[DW_OP_abs] = Desc(Op::Dwarf2);
50   Descriptions[DW_OP_and] = Desc(Op::Dwarf2);
51   Descriptions[DW_OP_div] = Desc(Op::Dwarf2);
52   Descriptions[DW_OP_minus] = Desc(Op::Dwarf2);
53   Descriptions[DW_OP_mod] = Desc(Op::Dwarf2);
54   Descriptions[DW_OP_mul] = Desc(Op::Dwarf2);
55   Descriptions[DW_OP_neg] = Desc(Op::Dwarf2);
56   Descriptions[DW_OP_not] = Desc(Op::Dwarf2);
57   Descriptions[DW_OP_or] = Desc(Op::Dwarf2);
58   Descriptions[DW_OP_plus] = Desc(Op::Dwarf2);
59   Descriptions[DW_OP_plus_uconst] = Desc(Op::Dwarf2, Op::SizeLEB);
60   Descriptions[DW_OP_shl] = Desc(Op::Dwarf2);
61   Descriptions[DW_OP_shr] = Desc(Op::Dwarf2);
62   Descriptions[DW_OP_shra] = Desc(Op::Dwarf2);
63   Descriptions[DW_OP_xor] = Desc(Op::Dwarf2);
64   Descriptions[DW_OP_skip] = Desc(Op::Dwarf2, Op::SignedSize2);
65   Descriptions[DW_OP_bra] = Desc(Op::Dwarf2, Op::SignedSize2);
66   Descriptions[DW_OP_eq] = Desc(Op::Dwarf2);
67   Descriptions[DW_OP_ge] = Desc(Op::Dwarf2);
68   Descriptions[DW_OP_gt] = Desc(Op::Dwarf2);
69   Descriptions[DW_OP_le] = Desc(Op::Dwarf2);
70   Descriptions[DW_OP_lt] = Desc(Op::Dwarf2);
71   Descriptions[DW_OP_ne] = Desc(Op::Dwarf2);
72   for (uint16_t LA = DW_OP_lit0; LA <= DW_OP_lit31; ++LA)
73     Descriptions[LA] = Desc(Op::Dwarf2);
74   for (uint16_t LA = DW_OP_reg0; LA <= DW_OP_reg31; ++LA)
75     Descriptions[LA] = Desc(Op::Dwarf2);
76   for (uint16_t LA = DW_OP_breg0; LA <= DW_OP_breg31; ++LA)
77     Descriptions[LA] = Desc(Op::Dwarf2, Op::SignedSizeLEB);
78   Descriptions[DW_OP_regx] = Desc(Op::Dwarf2, Op::SizeLEB);
79   Descriptions[DW_OP_fbreg] = Desc(Op::Dwarf2, Op::SignedSizeLEB);
80   Descriptions[DW_OP_bregx] = Desc(Op::Dwarf2, Op::SizeLEB, Op::SignedSizeLEB);
81   Descriptions[DW_OP_piece] = Desc(Op::Dwarf2, Op::SizeLEB);
82   Descriptions[DW_OP_deref_size] = Desc(Op::Dwarf2, Op::Size1);
83   Descriptions[DW_OP_xderef_size] = Desc(Op::Dwarf2, Op::Size1);
84   Descriptions[DW_OP_nop] = Desc(Op::Dwarf2);
85   Descriptions[DW_OP_push_object_address] = Desc(Op::Dwarf3);
86   Descriptions[DW_OP_call2] = Desc(Op::Dwarf3, Op::Size2);
87   Descriptions[DW_OP_call4] = Desc(Op::Dwarf3, Op::Size4);
88   Descriptions[DW_OP_call_ref] = Desc(Op::Dwarf3, Op::SizeRefAddr);
89   Descriptions[DW_OP_form_tls_address] = Desc(Op::Dwarf3);
90   Descriptions[DW_OP_call_frame_cfa] = Desc(Op::Dwarf3);
91   Descriptions[DW_OP_bit_piece] = Desc(Op::Dwarf3, Op::SizeLEB, Op::SizeLEB);
92   Descriptions[DW_OP_implicit_value] =
93       Desc(Op::Dwarf3, Op::SizeLEB, Op::SizeBlock);
94   Descriptions[DW_OP_stack_value] = Desc(Op::Dwarf3);
95   Descriptions[DW_OP_WASM_location] =
96       Desc(Op::Dwarf4, Op::SizeLEB, Op::WasmLocationArg);
97   Descriptions[DW_OP_GNU_push_tls_address] = Desc(Op::Dwarf3);
98   Descriptions[DW_OP_addrx] = Desc(Op::Dwarf4, Op::SizeLEB);
99   Descriptions[DW_OP_GNU_addr_index] = Desc(Op::Dwarf4, Op::SizeLEB);
100   Descriptions[DW_OP_GNU_const_index] = Desc(Op::Dwarf4, Op::SizeLEB);
101   Descriptions[DW_OP_GNU_entry_value] = Desc(Op::Dwarf4, Op::SizeLEB);
102 
103   Descriptions[DW_OP_convert] = Desc(Op::Dwarf5, Op::BaseTypeRef);
104   Descriptions[DW_OP_entry_value] = Desc(Op::Dwarf5, Op::SizeLEB);
105   Descriptions[DW_OP_regval_type] =
106       Desc(Op::Dwarf5, Op::SizeLEB, Op::BaseTypeRef);
107 
108   return Descriptions;
109 }
110 
getOpDesc(unsigned OpCode)111 static DWARFExpression::Operation::Description getOpDesc(unsigned OpCode) {
112   // FIXME: Make this constexpr once all compilers are smart enough to do it.
113   static DescVector Descriptions = getDescriptions();
114   // Handle possible corrupted or unsupported operation.
115   if (OpCode >= Descriptions.size())
116     return {};
117   return Descriptions[OpCode];
118 }
119 
extract(DataExtractor Data,uint8_t AddressSize,uint64_t Offset,Optional<DwarfFormat> Format)120 bool DWARFExpression::Operation::extract(DataExtractor Data,
121                                          uint8_t AddressSize, uint64_t Offset,
122                                          Optional<DwarfFormat> Format) {
123   EndOffset = Offset;
124   Opcode = Data.getU8(&Offset);
125 
126   Desc = getOpDesc(Opcode);
127   if (Desc.Version == Operation::DwarfNA)
128     return false;
129 
130   for (unsigned Operand = 0; Operand < 2; ++Operand) {
131     unsigned Size = Desc.Op[Operand];
132     unsigned Signed = Size & Operation::SignBit;
133 
134     if (Size == Operation::SizeNA)
135       break;
136 
137     switch (Size & ~Operation::SignBit) {
138     case Operation::Size1:
139       Operands[Operand] = Data.getU8(&Offset);
140       if (Signed)
141         Operands[Operand] = (int8_t)Operands[Operand];
142       break;
143     case Operation::Size2:
144       Operands[Operand] = Data.getU16(&Offset);
145       if (Signed)
146         Operands[Operand] = (int16_t)Operands[Operand];
147       break;
148     case Operation::Size4:
149       Operands[Operand] = Data.getU32(&Offset);
150       if (Signed)
151         Operands[Operand] = (int32_t)Operands[Operand];
152       break;
153     case Operation::Size8:
154       Operands[Operand] = Data.getU64(&Offset);
155       break;
156     case Operation::SizeAddr:
157       Operands[Operand] = Data.getUnsigned(&Offset, AddressSize);
158       break;
159     case Operation::SizeRefAddr:
160       if (!Format)
161         return false;
162       Operands[Operand] =
163           Data.getUnsigned(&Offset, dwarf::getDwarfOffsetByteSize(*Format));
164       break;
165     case Operation::SizeLEB:
166       if (Signed)
167         Operands[Operand] = Data.getSLEB128(&Offset);
168       else
169         Operands[Operand] = Data.getULEB128(&Offset);
170       break;
171     case Operation::BaseTypeRef:
172       Operands[Operand] = Data.getULEB128(&Offset);
173       break;
174     case Operation::WasmLocationArg:
175       assert(Operand == 1);
176       switch (Operands[0]) {
177       case 0: case 1: case 2:
178         Operands[Operand] = Data.getULEB128(&Offset);
179         break;
180       case 3: // global as uint32
181          Operands[Operand] = Data.getU32(&Offset);
182          break;
183       default:
184         return false; // Unknown Wasm location
185       }
186       break;
187     case Operation::SizeBlock:
188       // We need a size, so this cannot be the first operand
189       if (Operand == 0)
190         return false;
191       // Store the offset of the block as the value.
192       Operands[Operand] = Offset;
193       Offset += Operands[Operand - 1];
194       break;
195     default:
196       llvm_unreachable("Unknown DWARFExpression Op size");
197     }
198 
199     OperandEndOffsets[Operand] = Offset;
200   }
201 
202   EndOffset = Offset;
203   return true;
204 }
205 
prettyPrintBaseTypeRef(DWARFUnit * U,raw_ostream & OS,DIDumpOptions DumpOpts,uint64_t Operands[2],unsigned Operand)206 static void prettyPrintBaseTypeRef(DWARFUnit *U, raw_ostream &OS,
207                                    DIDumpOptions DumpOpts, uint64_t Operands[2],
208                                    unsigned Operand) {
209   assert(Operand < 2 && "operand out of bounds");
210   auto Die = U->getDIEForOffset(U->getOffset() + Operands[Operand]);
211   if (Die && Die.getTag() == dwarf::DW_TAG_base_type) {
212     OS << " (";
213     if (DumpOpts.Verbose)
214       OS << format("0x%08" PRIx64 " -> ", Operands[Operand]);
215     OS << format("0x%08" PRIx64 ")", U->getOffset() + Operands[Operand]);
216     if (auto Name = Die.find(dwarf::DW_AT_name))
217       OS << " \"" << Name->getAsCString() << "\"";
218   } else {
219     OS << format(" <invalid base_type ref: 0x%" PRIx64 ">",
220                  Operands[Operand]);
221   }
222 }
223 
prettyPrintRegisterOp(DWARFUnit * U,raw_ostream & OS,DIDumpOptions DumpOpts,uint8_t Opcode,uint64_t Operands[2],const MCRegisterInfo * MRI,bool isEH)224 static bool prettyPrintRegisterOp(DWARFUnit *U, raw_ostream &OS,
225                                   DIDumpOptions DumpOpts, uint8_t Opcode,
226                                   uint64_t Operands[2],
227                                   const MCRegisterInfo *MRI, bool isEH) {
228   if (!MRI)
229     return false;
230 
231   uint64_t DwarfRegNum;
232   unsigned OpNum = 0;
233 
234   if (Opcode == DW_OP_bregx || Opcode == DW_OP_regx ||
235       Opcode == DW_OP_regval_type)
236     DwarfRegNum = Operands[OpNum++];
237   else if (Opcode >= DW_OP_breg0 && Opcode < DW_OP_bregx)
238     DwarfRegNum = Opcode - DW_OP_breg0;
239   else
240     DwarfRegNum = Opcode - DW_OP_reg0;
241 
242   if (Optional<unsigned> LLVMRegNum = MRI->getLLVMRegNum(DwarfRegNum, isEH)) {
243     if (const char *RegName = MRI->getName(*LLVMRegNum)) {
244       if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) ||
245           Opcode == DW_OP_bregx)
246         OS << format(" %s%+" PRId64, RegName, Operands[OpNum]);
247       else
248         OS << ' ' << RegName;
249 
250       if (Opcode == DW_OP_regval_type)
251         prettyPrintBaseTypeRef(U, OS, DumpOpts, Operands, 1);
252       return true;
253     }
254   }
255 
256   return false;
257 }
258 
print(raw_ostream & OS,DIDumpOptions DumpOpts,const DWARFExpression * Expr,const MCRegisterInfo * RegInfo,DWARFUnit * U,bool isEH)259 bool DWARFExpression::Operation::print(raw_ostream &OS, DIDumpOptions DumpOpts,
260                                        const DWARFExpression *Expr,
261                                        const MCRegisterInfo *RegInfo,
262                                        DWARFUnit *U, bool isEH) {
263   if (Error) {
264     OS << "<decoding error>";
265     return false;
266   }
267 
268   StringRef Name = OperationEncodingString(Opcode);
269   assert(!Name.empty() && "DW_OP has no name!");
270   OS << Name;
271 
272   if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) ||
273       (Opcode >= DW_OP_reg0 && Opcode <= DW_OP_reg31) ||
274       Opcode == DW_OP_bregx || Opcode == DW_OP_regx ||
275       Opcode == DW_OP_regval_type)
276     if (prettyPrintRegisterOp(U, OS, DumpOpts, Opcode, Operands, RegInfo, isEH))
277       return true;
278 
279   for (unsigned Operand = 0; Operand < 2; ++Operand) {
280     unsigned Size = Desc.Op[Operand];
281     unsigned Signed = Size & Operation::SignBit;
282 
283     if (Size == Operation::SizeNA)
284       break;
285 
286     if (Size == Operation::BaseTypeRef && U) {
287       // For DW_OP_convert the operand may be 0 to indicate that conversion to
288       // the generic type should be done. The same holds for DW_OP_reinterpret,
289       // which is currently not supported.
290       if (Opcode == DW_OP_convert && Operands[Operand] == 0)
291         OS << " 0x0";
292       else
293         prettyPrintBaseTypeRef(U, OS, DumpOpts, Operands, Operand);
294     } else if (Size == Operation::WasmLocationArg) {
295       assert(Operand == 1);
296       switch (Operands[0]) {
297       case 0: case 1: case 2:
298       case 3: // global as uint32
299         OS << format(" 0x%" PRIx64, Operands[Operand]);
300         break;
301       default: assert(false);
302       }
303     } else if (Size == Operation::SizeBlock) {
304       uint64_t Offset = Operands[Operand];
305       for (unsigned i = 0; i < Operands[Operand - 1]; ++i)
306         OS << format(" 0x%02x", Expr->Data.getU8(&Offset));
307     } else {
308       if (Signed)
309         OS << format(" %+" PRId64, (int64_t)Operands[Operand]);
310       else if (Opcode != DW_OP_entry_value &&
311                Opcode != DW_OP_GNU_entry_value)
312         OS << format(" 0x%" PRIx64, Operands[Operand]);
313     }
314   }
315   return true;
316 }
317 
print(raw_ostream & OS,DIDumpOptions DumpOpts,const MCRegisterInfo * RegInfo,DWARFUnit * U,bool IsEH) const318 void DWARFExpression::print(raw_ostream &OS, DIDumpOptions DumpOpts,
319                             const MCRegisterInfo *RegInfo, DWARFUnit *U,
320                             bool IsEH) const {
321   uint32_t EntryValExprSize = 0;
322   for (auto &Op : *this) {
323     if (!Op.print(OS, DumpOpts, this, RegInfo, U, IsEH)) {
324       uint64_t FailOffset = Op.getEndOffset();
325       while (FailOffset < Data.getData().size())
326         OS << format(" %02x", Data.getU8(&FailOffset));
327       return;
328     }
329 
330     if (Op.getCode() == DW_OP_entry_value ||
331         Op.getCode() == DW_OP_GNU_entry_value) {
332       OS << "(";
333       EntryValExprSize = Op.getRawOperand(0);
334       continue;
335     }
336 
337     if (EntryValExprSize) {
338       EntryValExprSize--;
339       if (EntryValExprSize == 0)
340         OS << ")";
341     }
342 
343     if (Op.getEndOffset() < Data.getData().size())
344       OS << ", ";
345   }
346 }
347 
verify(DWARFUnit * U)348 bool DWARFExpression::Operation::verify(DWARFUnit *U) {
349 
350   for (unsigned Operand = 0; Operand < 2; ++Operand) {
351     unsigned Size = Desc.Op[Operand];
352 
353     if (Size == Operation::SizeNA)
354       break;
355 
356     if (Size == Operation::BaseTypeRef) {
357       // For DW_OP_convert the operand may be 0 to indicate that conversion to
358       // the generic type should be done, so don't look up a base type in that
359       // case. The same holds for DW_OP_reinterpret, which is currently not
360       // supported.
361       if (Opcode == DW_OP_convert && Operands[Operand] == 0)
362         continue;
363       auto Die = U->getDIEForOffset(U->getOffset() + Operands[Operand]);
364       if (!Die || Die.getTag() != dwarf::DW_TAG_base_type) {
365         Error = true;
366         return false;
367       }
368     }
369   }
370 
371   return true;
372 }
373 
verify(DWARFUnit * U)374 bool DWARFExpression::verify(DWARFUnit *U) {
375   for (auto &Op : *this)
376     if (!Op.verify(U))
377       return false;
378 
379   return true;
380 }
381 
382 /// A user-facing string representation of a DWARF expression. This might be an
383 /// Address expression, in which case it will be implicitly dereferenced, or a
384 /// Value expression.
385 struct PrintedExpr {
386   enum ExprKind {
387     Address,
388     Value,
389   };
390   ExprKind Kind;
391   SmallString<16> String;
392 
PrintedExprllvm::PrintedExpr393   PrintedExpr(ExprKind K = Address) : Kind(K) {}
394 };
395 
printCompactDWARFExpr(raw_ostream & OS,DWARFExpression::iterator I,const DWARFExpression::iterator E,const MCRegisterInfo & MRI)396 static bool printCompactDWARFExpr(raw_ostream &OS, DWARFExpression::iterator I,
397                                   const DWARFExpression::iterator E,
398                                   const MCRegisterInfo &MRI) {
399   SmallVector<PrintedExpr, 4> Stack;
400 
401   while (I != E) {
402     DWARFExpression::Operation &Op = *I;
403     uint8_t Opcode = Op.getCode();
404     switch (Opcode) {
405     case dwarf::DW_OP_regx: {
406       // DW_OP_regx: A register, with the register num given as an operand.
407       // Printed as the plain register name.
408       uint64_t DwarfRegNum = Op.getRawOperand(0);
409       Optional<unsigned> LLVMRegNum = MRI.getLLVMRegNum(DwarfRegNum, false);
410       if (!LLVMRegNum) {
411         OS << "<unknown register " << DwarfRegNum << ">";
412         return false;
413       }
414       raw_svector_ostream S(Stack.emplace_back(PrintedExpr::Value).String);
415       S << MRI.getName(*LLVMRegNum);
416       break;
417     }
418     case dwarf::DW_OP_bregx: {
419       int DwarfRegNum = Op.getRawOperand(0);
420       int64_t Offset = Op.getRawOperand(1);
421       Optional<unsigned> LLVMRegNum = MRI.getLLVMRegNum(DwarfRegNum, false);
422       if (!LLVMRegNum) {
423         OS << "<unknown register " << DwarfRegNum << ">";
424         return false;
425       }
426       raw_svector_ostream S(Stack.emplace_back().String);
427       S << MRI.getName(*LLVMRegNum);
428       if (Offset)
429         S << format("%+" PRId64, Offset);
430       break;
431     }
432     case dwarf::DW_OP_entry_value:
433     case dwarf::DW_OP_GNU_entry_value: {
434       // DW_OP_entry_value contains a sub-expression which must be rendered
435       // separately.
436       uint64_t SubExprLength = Op.getRawOperand(0);
437       DWARFExpression::iterator SubExprEnd = I.skipBytes(SubExprLength);
438       ++I;
439       raw_svector_ostream S(Stack.emplace_back().String);
440       S << "entry(";
441       printCompactDWARFExpr(S, I, SubExprEnd, MRI);
442       S << ")";
443       I = SubExprEnd;
444       continue;
445     }
446     case dwarf::DW_OP_stack_value: {
447       // The top stack entry should be treated as the actual value of tne
448       // variable, rather than the address of the variable in memory.
449       assert(!Stack.empty());
450       Stack.back().Kind = PrintedExpr::Value;
451       break;
452     }
453     default:
454       if (Opcode >= dwarf::DW_OP_reg0 && Opcode <= dwarf::DW_OP_reg31) {
455         // DW_OP_reg<N>: A register, with the register num implied by the
456         // opcode. Printed as the plain register name.
457         uint64_t DwarfRegNum = Opcode - dwarf::DW_OP_reg0;
458         Optional<unsigned> LLVMRegNum = MRI.getLLVMRegNum(DwarfRegNum, false);
459         if (!LLVMRegNum) {
460           OS << "<unknown register " << DwarfRegNum << ">";
461           return false;
462         }
463         raw_svector_ostream S(Stack.emplace_back(PrintedExpr::Value).String);
464         S << MRI.getName(*LLVMRegNum);
465       } else if (Opcode >= dwarf::DW_OP_breg0 &&
466                  Opcode <= dwarf::DW_OP_breg31) {
467         int DwarfRegNum = Opcode - dwarf::DW_OP_breg0;
468         int64_t Offset = Op.getRawOperand(0);
469         Optional<unsigned> LLVMRegNum = MRI.getLLVMRegNum(DwarfRegNum, false);
470         if (!LLVMRegNum) {
471           OS << "<unknown register " << DwarfRegNum << ">";
472           return false;
473         }
474         raw_svector_ostream S(Stack.emplace_back().String);
475         S << MRI.getName(*LLVMRegNum);
476         if (Offset)
477           S << format("%+" PRId64, Offset);
478       } else {
479         // If we hit an unknown operand, we don't know its effect on the stack,
480         // so bail out on the whole expression.
481         OS << "<unknown op " << dwarf::OperationEncodingString(Opcode) << " ("
482            << (int)Opcode << ")>";
483         return false;
484       }
485       break;
486     }
487     ++I;
488   }
489 
490   assert(Stack.size() == 1 && "expected one value on stack");
491 
492   if (Stack.front().Kind == PrintedExpr::Address)
493     OS << "[" << Stack.front().String << "]";
494   else
495     OS << Stack.front().String;
496 
497   return true;
498 }
499 
printCompact(raw_ostream & OS,const MCRegisterInfo & MRI)500 bool DWARFExpression::printCompact(raw_ostream &OS, const MCRegisterInfo &MRI) {
501   return printCompactDWARFExpr(OS, begin(), end(), MRI);
502 }
503 
504 } // namespace llvm
505