1 /*
2 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
3 VA Linux Systems Inc., Fremont, California.
4
5 All Rights Reserved.
6
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
14
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
18
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 */
27
28 /*
29 * Authors:
30 * Gareth Hughes <gareth@valinux.com>
31 * Brian Paul <brianp@valinux.com>
32 */
33
34 #include "main/glheader.h"
35 #include "main/context.h"
36 #include "main/enums.h"
37 #include "main/image.h"
38 #include "main/teximage.h"
39 #include "main/texobj.h"
40
41 #include "radeon_context.h"
42 #include "radeon_mipmap_tree.h"
43 #include "radeon_ioctl.h"
44 #include "radeon_tex.h"
45
46 #include "util/u_memory.h"
47 #include "util/driconf.h"
48
49
50
51 /**
52 * Set the texture wrap modes.
53 *
54 * \param t Texture object whose wrap modes are to be set
55 * \param swrap Wrap mode for the \a s texture coordinate
56 * \param twrap Wrap mode for the \a t texture coordinate
57 */
58
radeonSetTexWrap(radeonTexObjPtr t,GLenum swrap,GLenum twrap)59 static void radeonSetTexWrap( radeonTexObjPtr t, GLenum swrap, GLenum twrap )
60 {
61 GLboolean is_clamp = GL_FALSE;
62 GLboolean is_clamp_to_border = GL_FALSE;
63
64 t->pp_txfilter &= ~(RADEON_CLAMP_S_MASK | RADEON_CLAMP_T_MASK | RADEON_BORDER_MODE_D3D);
65
66 switch ( swrap ) {
67 case GL_REPEAT:
68 t->pp_txfilter |= RADEON_CLAMP_S_WRAP;
69 break;
70 case GL_CLAMP:
71 t->pp_txfilter |= RADEON_CLAMP_S_CLAMP_GL;
72 is_clamp = GL_TRUE;
73 break;
74 case GL_CLAMP_TO_EDGE:
75 t->pp_txfilter |= RADEON_CLAMP_S_CLAMP_LAST;
76 break;
77 case GL_CLAMP_TO_BORDER:
78 t->pp_txfilter |= RADEON_CLAMP_S_CLAMP_GL;
79 is_clamp_to_border = GL_TRUE;
80 break;
81 case GL_MIRRORED_REPEAT:
82 t->pp_txfilter |= RADEON_CLAMP_S_MIRROR;
83 break;
84 case GL_MIRROR_CLAMP_EXT:
85 t->pp_txfilter |= RADEON_CLAMP_S_MIRROR_CLAMP_GL;
86 is_clamp = GL_TRUE;
87 break;
88 case GL_MIRROR_CLAMP_TO_EDGE_EXT:
89 t->pp_txfilter |= RADEON_CLAMP_S_MIRROR_CLAMP_LAST;
90 break;
91 case GL_MIRROR_CLAMP_TO_BORDER_EXT:
92 t->pp_txfilter |= RADEON_CLAMP_S_MIRROR_CLAMP_GL;
93 is_clamp_to_border = GL_TRUE;
94 break;
95 default:
96 _mesa_problem(NULL, "bad S wrap mode in %s", __func__);
97 }
98
99 if (t->base.Target != GL_TEXTURE_1D) {
100 switch ( twrap ) {
101 case GL_REPEAT:
102 t->pp_txfilter |= RADEON_CLAMP_T_WRAP;
103 break;
104 case GL_CLAMP:
105 t->pp_txfilter |= RADEON_CLAMP_T_CLAMP_GL;
106 is_clamp = GL_TRUE;
107 break;
108 case GL_CLAMP_TO_EDGE:
109 t->pp_txfilter |= RADEON_CLAMP_T_CLAMP_LAST;
110 break;
111 case GL_CLAMP_TO_BORDER:
112 t->pp_txfilter |= RADEON_CLAMP_T_CLAMP_GL;
113 is_clamp_to_border = GL_TRUE;
114 break;
115 case GL_MIRRORED_REPEAT:
116 t->pp_txfilter |= RADEON_CLAMP_T_MIRROR;
117 break;
118 case GL_MIRROR_CLAMP_EXT:
119 t->pp_txfilter |= RADEON_CLAMP_T_MIRROR_CLAMP_GL;
120 is_clamp = GL_TRUE;
121 break;
122 case GL_MIRROR_CLAMP_TO_EDGE_EXT:
123 t->pp_txfilter |= RADEON_CLAMP_T_MIRROR_CLAMP_LAST;
124 break;
125 case GL_MIRROR_CLAMP_TO_BORDER_EXT:
126 t->pp_txfilter |= RADEON_CLAMP_T_MIRROR_CLAMP_GL;
127 is_clamp_to_border = GL_TRUE;
128 break;
129 default:
130 _mesa_problem(NULL, "bad T wrap mode in %s", __func__);
131 }
132 }
133
134 if ( is_clamp_to_border ) {
135 t->pp_txfilter |= RADEON_BORDER_MODE_D3D;
136 }
137
138 t->border_fallback = (is_clamp && is_clamp_to_border);
139 }
140
radeonSetTexMaxAnisotropy(radeonTexObjPtr t,GLfloat max)141 static void radeonSetTexMaxAnisotropy( radeonTexObjPtr t, GLfloat max )
142 {
143 t->pp_txfilter &= ~RADEON_MAX_ANISO_MASK;
144
145 if ( max == 1.0 ) {
146 t->pp_txfilter |= RADEON_MAX_ANISO_1_TO_1;
147 } else if ( max <= 2.0 ) {
148 t->pp_txfilter |= RADEON_MAX_ANISO_2_TO_1;
149 } else if ( max <= 4.0 ) {
150 t->pp_txfilter |= RADEON_MAX_ANISO_4_TO_1;
151 } else if ( max <= 8.0 ) {
152 t->pp_txfilter |= RADEON_MAX_ANISO_8_TO_1;
153 } else {
154 t->pp_txfilter |= RADEON_MAX_ANISO_16_TO_1;
155 }
156 }
157
158 /**
159 * Set the texture magnification and minification modes.
160 *
161 * \param t Texture whose filter modes are to be set
162 * \param minf Texture minification mode
163 * \param magf Texture magnification mode
164 */
165
radeonSetTexFilter(radeonTexObjPtr t,GLenum minf,GLenum magf)166 static void radeonSetTexFilter( radeonTexObjPtr t, GLenum minf, GLenum magf )
167 {
168 GLuint anisotropy = (t->pp_txfilter & RADEON_MAX_ANISO_MASK);
169
170 /* Force revalidation to account for switches from/to mipmapping. */
171 t->validated = GL_FALSE;
172
173 t->pp_txfilter &= ~(RADEON_MIN_FILTER_MASK | RADEON_MAG_FILTER_MASK);
174
175 /* r100 chips can't handle mipmaps/aniso for cubemap/volume textures */
176 if ( t->base.Target == GL_TEXTURE_CUBE_MAP ) {
177 switch ( minf ) {
178 case GL_NEAREST:
179 case GL_NEAREST_MIPMAP_NEAREST:
180 case GL_NEAREST_MIPMAP_LINEAR:
181 t->pp_txfilter |= RADEON_MIN_FILTER_NEAREST;
182 break;
183 case GL_LINEAR:
184 case GL_LINEAR_MIPMAP_NEAREST:
185 case GL_LINEAR_MIPMAP_LINEAR:
186 t->pp_txfilter |= RADEON_MIN_FILTER_LINEAR;
187 break;
188 default:
189 break;
190 }
191 }
192 else if ( anisotropy == RADEON_MAX_ANISO_1_TO_1 ) {
193 switch ( minf ) {
194 case GL_NEAREST:
195 t->pp_txfilter |= RADEON_MIN_FILTER_NEAREST;
196 break;
197 case GL_LINEAR:
198 t->pp_txfilter |= RADEON_MIN_FILTER_LINEAR;
199 break;
200 case GL_NEAREST_MIPMAP_NEAREST:
201 t->pp_txfilter |= RADEON_MIN_FILTER_NEAREST_MIP_NEAREST;
202 break;
203 case GL_NEAREST_MIPMAP_LINEAR:
204 t->pp_txfilter |= RADEON_MIN_FILTER_LINEAR_MIP_NEAREST;
205 break;
206 case GL_LINEAR_MIPMAP_NEAREST:
207 t->pp_txfilter |= RADEON_MIN_FILTER_NEAREST_MIP_LINEAR;
208 break;
209 case GL_LINEAR_MIPMAP_LINEAR:
210 t->pp_txfilter |= RADEON_MIN_FILTER_LINEAR_MIP_LINEAR;
211 break;
212 }
213 } else {
214 switch ( minf ) {
215 case GL_NEAREST:
216 t->pp_txfilter |= RADEON_MIN_FILTER_ANISO_NEAREST;
217 break;
218 case GL_LINEAR:
219 t->pp_txfilter |= RADEON_MIN_FILTER_ANISO_LINEAR;
220 break;
221 case GL_NEAREST_MIPMAP_NEAREST:
222 case GL_LINEAR_MIPMAP_NEAREST:
223 t->pp_txfilter |= RADEON_MIN_FILTER_ANISO_NEAREST_MIP_NEAREST;
224 break;
225 case GL_NEAREST_MIPMAP_LINEAR:
226 case GL_LINEAR_MIPMAP_LINEAR:
227 t->pp_txfilter |= RADEON_MIN_FILTER_ANISO_NEAREST_MIP_LINEAR;
228 break;
229 }
230 }
231
232 switch ( magf ) {
233 case GL_NEAREST:
234 t->pp_txfilter |= RADEON_MAG_FILTER_NEAREST;
235 break;
236 case GL_LINEAR:
237 t->pp_txfilter |= RADEON_MAG_FILTER_LINEAR;
238 break;
239 }
240 }
241
radeonSetTexBorderColor(radeonTexObjPtr t,const GLfloat color[4])242 static void radeonSetTexBorderColor( radeonTexObjPtr t, const GLfloat color[4] )
243 {
244 GLubyte c[4];
245 CLAMPED_FLOAT_TO_UBYTE(c[0], color[0]);
246 CLAMPED_FLOAT_TO_UBYTE(c[1], color[1]);
247 CLAMPED_FLOAT_TO_UBYTE(c[2], color[2]);
248 CLAMPED_FLOAT_TO_UBYTE(c[3], color[3]);
249 t->pp_border_color = radeonPackColor( 4, c[0], c[1], c[2], c[3] );
250 }
251
252 #define SCALED_FLOAT_TO_BYTE( x, scale ) \
253 (((GLuint)((255.0F / scale) * (x))) / 2)
254
radeonTexEnv(struct gl_context * ctx,GLenum target,GLenum pname,const GLfloat * param)255 static void radeonTexEnv( struct gl_context *ctx, GLenum target,
256 GLenum pname, const GLfloat *param )
257 {
258 r100ContextPtr rmesa = R100_CONTEXT(ctx);
259 GLuint unit = ctx->Texture.CurrentUnit;
260 struct gl_fixedfunc_texture_unit *texUnit =
261 &ctx->Texture.FixedFuncUnit[unit];
262
263 if ( RADEON_DEBUG & RADEON_STATE ) {
264 fprintf( stderr, "%s( %s )\n",
265 __func__, _mesa_enum_to_string( pname ) );
266 }
267
268 switch ( pname ) {
269 case GL_TEXTURE_ENV_COLOR: {
270 GLubyte c[4];
271 GLuint envColor;
272 _mesa_unclamped_float_rgba_to_ubyte(c, texUnit->EnvColor);
273 envColor = radeonPackColor( 4, c[0], c[1], c[2], c[3] );
274 if ( rmesa->hw.tex[unit].cmd[TEX_PP_TFACTOR] != envColor ) {
275 RADEON_STATECHANGE( rmesa, tex[unit] );
276 rmesa->hw.tex[unit].cmd[TEX_PP_TFACTOR] = envColor;
277 }
278 break;
279 }
280
281 case GL_TEXTURE_LOD_BIAS_EXT: {
282 GLfloat bias, min;
283 GLuint b;
284
285 /* The Radeon's LOD bias is a signed 2's complement value with a
286 * range of -1.0 <= bias < 4.0. We break this into two linear
287 * functions, one mapping [-1.0,0.0] to [-128,0] and one mapping
288 * [0.0,4.0] to [0,127].
289 */
290 min = driQueryOptionb (&rmesa->radeon.optionCache, "no_neg_lod_bias") ?
291 0.0 : -1.0;
292 bias = CLAMP( *param, min, 4.0 );
293 if ( bias == 0 ) {
294 b = 0;
295 } else if ( bias > 0 ) {
296 b = ((GLuint)SCALED_FLOAT_TO_BYTE( bias, 4.0 )) << RADEON_LOD_BIAS_SHIFT;
297 } else {
298 b = ((GLuint)SCALED_FLOAT_TO_BYTE( bias, 1.0 )) << RADEON_LOD_BIAS_SHIFT;
299 }
300 if ( (rmesa->hw.tex[unit].cmd[TEX_PP_TXFILTER] & RADEON_LOD_BIAS_MASK) != b ) {
301 RADEON_STATECHANGE( rmesa, tex[unit] );
302 rmesa->hw.tex[unit].cmd[TEX_PP_TXFILTER] &= ~RADEON_LOD_BIAS_MASK;
303 rmesa->hw.tex[unit].cmd[TEX_PP_TXFILTER] |= (b & RADEON_LOD_BIAS_MASK);
304 }
305 break;
306 }
307
308 default:
309 return;
310 }
311 }
312
radeonTexUpdateParameters(struct gl_context * ctx,GLuint unit)313 void radeonTexUpdateParameters(struct gl_context *ctx, GLuint unit)
314 {
315 struct gl_sampler_object *samp = _mesa_get_samplerobj(ctx, unit);
316 radeonTexObj* t = radeon_tex_obj(ctx->Texture.Unit[unit]._Current);
317
318 radeonSetTexMaxAnisotropy(t , samp->MaxAnisotropy);
319 radeonSetTexFilter(t, samp->MinFilter, samp->MagFilter);
320 radeonSetTexWrap(t, samp->WrapS, samp->WrapT);
321 radeonSetTexBorderColor(t, samp->BorderColor.f);
322 }
323
324
325 /**
326 * Changes variables and flags for a state update, which will happen at the
327 * next UpdateTextureState
328 */
329
radeonTexParameter(struct gl_context * ctx,struct gl_texture_object * texObj,GLenum pname)330 static void radeonTexParameter( struct gl_context *ctx,
331 struct gl_texture_object *texObj,
332 GLenum pname )
333 {
334 radeonTexObj* t = radeon_tex_obj(texObj);
335
336 radeon_print(RADEON_TEXTURE, RADEON_VERBOSE, "%s( %s )\n", __func__,
337 _mesa_enum_to_string( pname ) );
338
339 switch ( pname ) {
340 case GL_TEXTURE_BASE_LEVEL:
341 case GL_TEXTURE_MAX_LEVEL:
342 case GL_TEXTURE_MIN_LOD:
343 case GL_TEXTURE_MAX_LOD:
344 t->validated = GL_FALSE;
345 break;
346
347 default:
348 return;
349 }
350 }
351
radeonDeleteTexture(struct gl_context * ctx,struct gl_texture_object * texObj)352 static void radeonDeleteTexture( struct gl_context *ctx,
353 struct gl_texture_object *texObj )
354 {
355 r100ContextPtr rmesa = R100_CONTEXT(ctx);
356 radeonTexObj* t = radeon_tex_obj(texObj);
357 int i;
358
359 radeon_print(RADEON_TEXTURE, RADEON_NORMAL,
360 "%s( %p (target = %s) )\n", __func__, (void *)texObj,
361 _mesa_enum_to_string( texObj->Target ) );
362
363 if ( rmesa ) {
364 radeon_firevertices(&rmesa->radeon);
365 for ( i = 0 ; i < rmesa->radeon.glCtx.Const.MaxTextureUnits ; i++ ) {
366 if ( t == rmesa->state.texture.unit[i].texobj ) {
367 rmesa->state.texture.unit[i].texobj = NULL;
368 rmesa->hw.tex[i].dirty = GL_FALSE;
369 rmesa->hw.cube[i].dirty = GL_FALSE;
370 }
371 }
372 }
373
374 radeon_miptree_unreference(&t->mt);
375
376 /* Free mipmap images and the texture object itself */
377 _mesa_delete_texture_object(ctx, texObj);
378 }
379
380 /* Need:
381 * - Same GEN_MODE for all active bits
382 * - Same EyePlane/ObjPlane for all active bits when using Eye/Obj
383 * - STRQ presumably all supported (matrix means incoming R values
384 * can end up in STQ, this has implications for vertex support,
385 * presumably ok if maos is used, though?)
386 *
387 * Basically impossible to do this on the fly - just collect some
388 * basic info & do the checks from ValidateState().
389 */
radeonTexGen(struct gl_context * ctx,GLenum coord,GLenum pname,const GLfloat * params)390 static void radeonTexGen( struct gl_context *ctx,
391 GLenum coord,
392 GLenum pname,
393 const GLfloat *params )
394 {
395 r100ContextPtr rmesa = R100_CONTEXT(ctx);
396 GLuint unit = ctx->Texture.CurrentUnit;
397 rmesa->recheck_texgen[unit] = GL_TRUE;
398 }
399
400 /**
401 * Allocate a new texture object.
402 * Called via ctx->Driver.NewTextureObject.
403 * Note: we could use containment here to 'derive' the driver-specific
404 * texture object from the core mesa gl_texture_object. Not done at this time.
405 */
406 static struct gl_texture_object *
radeonNewTextureObject(struct gl_context * ctx,GLuint name,GLenum target)407 radeonNewTextureObject( struct gl_context *ctx, GLuint name, GLenum target )
408 {
409 r100ContextPtr rmesa = R100_CONTEXT(ctx);
410 radeonTexObj* t = CALLOC_STRUCT(radeon_tex_obj);
411
412 _mesa_initialize_texture_object(ctx, &t->base, name, target);
413 t->base.Sampler.MaxAnisotropy = rmesa->radeon.initialMaxAnisotropy;
414
415 t->border_fallback = GL_FALSE;
416
417 t->pp_txfilter = RADEON_BORDER_MODE_OGL;
418 t->pp_txformat = (RADEON_TXFORMAT_ENDIAN_NO_SWAP |
419 RADEON_TXFORMAT_PERSPECTIVE_ENABLE);
420
421 radeonSetTexWrap( t, t->base.Sampler.WrapS, t->base.Sampler.WrapT );
422 radeonSetTexMaxAnisotropy( t, t->base.Sampler.MaxAnisotropy );
423 radeonSetTexFilter( t, t->base.Sampler.MinFilter, t->base.Sampler.MagFilter );
424 radeonSetTexBorderColor( t, t->base.Sampler.BorderColor.f );
425 return &t->base;
426 }
427
428
429 static struct gl_sampler_object *
radeonNewSamplerObject(struct gl_context * ctx,GLuint name)430 radeonNewSamplerObject(struct gl_context *ctx, GLuint name)
431 {
432 r100ContextPtr rmesa = R100_CONTEXT(ctx);
433 struct gl_sampler_object *samp = _mesa_new_sampler_object(ctx, name);
434 if (samp)
435 samp->MaxAnisotropy = rmesa->radeon.initialMaxAnisotropy;
436 return samp;
437 }
438
439
radeonInitTextureFuncs(radeonContextPtr radeon,struct dd_function_table * functions)440 void radeonInitTextureFuncs( radeonContextPtr radeon, struct dd_function_table *functions )
441 {
442 radeon_init_common_texture_funcs(radeon, functions);
443
444 functions->NewTextureObject = radeonNewTextureObject;
445 // functions->BindTexture = radeonBindTexture;
446 functions->DeleteTexture = radeonDeleteTexture;
447
448 functions->TexEnv = radeonTexEnv;
449 functions->TexParameter = radeonTexParameter;
450 functions->TexGen = radeonTexGen;
451 functions->NewSamplerObject = radeonNewSamplerObject;
452 }
453