/external/llvm-project/llvm/test/MC/AArch64/SVE/ |
D | scvtf.s | 10 scvtf z0.h, p0/m, z0.h label 16 scvtf z0.h, p0/m, z0.s label 22 scvtf z0.h, p0/m, z0.d label 28 scvtf z0.s, p0/m, z0.s label 34 scvtf z0.s, p0/m, z0.d label 40 scvtf z0.d, p0/m, z0.s label 46 scvtf z0.d, p0/m, z0.d label 62 scvtf z5.d, p0/m, z0.d label 74 scvtf z5.d, p0/m, z0.d label
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D | scvtf-diagnostics.s | 3 scvtf z0.s, p0/m, z0.h label 8 scvtf z0.d, p0/m, z0.h label 17 scvtf z0.h, p8/m, z0.h label
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/external/llvm-project/llvm/test/tools/llvm-mca/AArch64/Exynos/ |
D | float-integer.s | 6 scvtf h0, w0 label 7 scvtf s1, w1 label 8 scvtf d2, x2 define
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/external/llvm/test/MC/AArch64/ |
D | arm64-fp-encoding.s | 470 scvtf d1, w2 define 471 scvtf d1, w2, #1 define 476 scvtf d1, x2 define 477 scvtf d1, x2, #1 define
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D | arm64-advsimd.s | 1381 scvtf d0, d0, #2 define
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/external/llvm-project/llvm/test/MC/AArch64/ |
D | arm64-fp-encoding.s | 470 scvtf d1, w2 define 471 scvtf d1, w2, #1 define 476 scvtf d1, x2 define 477 scvtf d1, x2, #1 define
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D | arm64-advsimd.s | 1381 scvtf d0, d0, #2 define
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/external/llvm-project/llvm/test/tools/llvm-mca/AArch64/Cortex/ |
D | A55-basic-instructions.s | 704 scvtf h23, w19, #1 label 705 scvtf h31, wzr, #20 label 706 scvtf h14, w0, #32 label 707 scvtf h23, x19, #1 label 708 scvtf h31, xzr, #20 label 709 scvtf h14, x0, #64 label 710 scvtf s23, w19, #1 label 711 scvtf s31, wzr, #20 label 712 scvtf s14, w0, #32 label 713 scvtf s23, x19, #1 label [all …]
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/external/vixl/test/aarch64/ |
D | test-api-movprfx-aarch64.cc | 531 __ scvtf(z25.VnD(), p6.Merging(), z25.VnS()); in TEST() local 534 __ scvtf(z0.VnD(), p3.Merging(), z0.VnD()); in TEST() local 537 __ scvtf(z19.VnS(), p7.Merging(), z19.VnD()); in TEST() local 540 __ scvtf(z19.VnH(), p4.Merging(), z19.VnD()); in TEST() local 1006 __ scvtf(z22.VnD(), p3.Merging(), z24.VnS()); in TEST() local 1009 __ scvtf(z20.VnH(), p2.Merging(), z9.VnH()); in TEST() local 1012 __ scvtf(z19.VnS(), p1.Merging(), z6.VnD()); in TEST() local 1015 __ scvtf(z31.VnH(), p3.Merging(), z22.VnD()); in TEST() local 1829 __ scvtf(z2.VnD(), p1.Merging(), z16.VnS()); in TEST() local 1832 __ scvtf(z10.VnD(), p5.Merging(), z20.VnD()); in TEST() local [all …]
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D | test-trace-aarch64.cc | 583 __ scvtf(d31, d16); in GenerateTestSequenceFP() local 584 __ scvtf(d26, d31, 24); in GenerateTestSequenceFP() local 585 __ scvtf(d6, w16); in GenerateTestSequenceFP() local 586 __ scvtf(d5, w20, 6); in GenerateTestSequenceFP() local 587 __ scvtf(d16, x8); in GenerateTestSequenceFP() local 588 __ scvtf(d15, x8, 10); in GenerateTestSequenceFP() local 589 __ scvtf(s7, s4); in GenerateTestSequenceFP() local 590 __ scvtf(s8, s15, 14); in GenerateTestSequenceFP() local 591 __ scvtf(s29, w10); in GenerateTestSequenceFP() local 592 __ scvtf(s15, w21, 11); in GenerateTestSequenceFP() local [all …]
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.cc | 3247 void Assembler::scvtf(const VRegister& vd, const VRegister& vn, int fbits) { in scvtf() function in vixl::aarch64::Assembler 3266 void Assembler::scvtf(const VRegister& vd, const Register& rn, int fbits) { in scvtf() function in vixl::aarch64::Assembler
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D | logic-aarch64.cc | 6588 LogicVRegister Simulator::scvtf(VectorFormat vform, in scvtf() function in vixl::aarch64::Simulator 6631 LogicVRegister Simulator::scvtf(VectorFormat vform, in scvtf() function in vixl::aarch64::Simulator
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D | assembler-sve-aarch64.cc | 1884 void Assembler::scvtf(const ZRegister& zd, in scvtf() function in vixl::aarch64::Assembler
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