1 /*
2  * Copyright 2017 Google Inc.
3  *
4  * Use of this source code is governed by a BSD-style license that can
5  * be found in the LICENSE file.
6  *
7  */
8 
9 //
10 // NOTE THAT NONE OF THESE EXTENTS CHECK FOR ZERO-SIZED ALLOCATIONS.
11 // THAT'S OK FOR NOW.
12 //
13 
14 #include <stdlib.h>
15 
16 #include "runtime_cl_12.h"
17 #include "extent_cl_12.h"
18 #include "common/cl/assert_cl.h"
19 
20 //
21 // EPHEMERAL MAPPING
22 //
23 // ENTIRE EXTENT   MAPPED TO R/W   HOST MEMORY
24 // ENTIRE EXTENT UNMAPPED TO R/W DEVICE MEMORY
25 //
26 // Note: integrated vs. discrete GPUs will have different
27 // implementations because we don't want a GPU kernel repeatedly
28 // accessing pinned memory.
29 //
30 
31 #if 0
32 
33 #pragma message("struct skc_extent_thrw_tdrw will be removed once the sorter is installed.")
34 
35 void
36 skc_extent_thrw_tdrw_alloc(struct skc_runtime          * const runtime,
37                            struct skc_extent_thrw_tdrw * const extent,
38                            size_t                        const size)
39 {
40   extent->drw = skc_runtime_device_temp_alloc(runtime,
41                                               CL_MEM_READ_WRITE /* | CL_MEM_ALLOC_HOST_PTR */,
42                                               size,&extent->id,&extent->size);
43 }
44 
45 void
46 skc_extent_thrw_tdrw_free(struct skc_runtime          * const runtime,
47                           struct skc_extent_thrw_tdrw * const extent)
48 {
49   skc_runtime_device_temp_free(runtime,extent->drw,extent->id);
50 }
51 
52 void *
53 skc_extent_thrw_tdrw_map_size(struct skc_extent_thrw_tdrw * const extent,
54                               size_t                        const size,
55                               cl_command_queue              const cq,
56                               cl_event                    * const event)
57 {
58   cl_int cl_err;
59 
60   void * hrw = clEnqueueMapBuffer(cq,extent->drw,
61                                   CL_FALSE,
62                                   CL_MAP_READ | CL_MAP_WRITE,0,size,
63                                   0,NULL,event,&cl_err); cl_ok(cl_err);
64 
65   return hrw;
66 }
67 
68 void *
69 skc_extent_thrw_tdrw_map(struct skc_extent_thrw_tdrw * const extent,
70                          cl_command_queue              const cq,
71                          cl_event                    * const event)
72 {
73   return skc_extent_thrw_tdrw_map_size(extent,extent->size,cq,event);
74 }
75 
76 void
77 skc_extent_thrw_tdrw_unmap(struct skc_extent_thrw_tdrw * const extent,
78                            void                        * const hrw,
79                            cl_command_queue              const cq,
80                            cl_event                    * const event)
81 {
82   cl(EnqueueUnmapMemObject(cq,extent->drw,hrw,0,NULL,event));
83 }
84 
85 #endif
86 
87 //
88 // DURABLE MAPPING
89 //
90 // ENTIRE EXTENT   MAPPED TO R/W   HOST MEMORY
91 // ENTIRE EXTENT UNMAPPED TO R/W DEVICE MEMORY
92 //
93 // Note: integrated vs. discrete GPUs will have different
94 // implementations because we don't want a GPU kernel repeatedly
95 // accessing pinned memory.
96 //
97 
98 void
skc_extent_phrw_pdrw_alloc(struct skc_runtime * const runtime,struct skc_extent_phrw_pdrw * const extent,size_t const size)99 skc_extent_phrw_pdrw_alloc(struct skc_runtime          * const runtime,
100                            struct skc_extent_phrw_pdrw * const extent,
101                            size_t                        const size)
102 {
103   cl_int cl_err;
104 
105   extent->size = size;
106   extent->drw  = clCreateBuffer(runtime->cl.context,
107                                 CL_MEM_READ_WRITE | CL_MEM_ALLOC_HOST_PTR,
108                                 size,NULL,&cl_err); cl_ok(cl_err);
109 }
110 
111 void
skc_extent_phrw_pdrw_free(struct skc_runtime * const runtime,struct skc_extent_phrw_pdrw * const extent)112 skc_extent_phrw_pdrw_free(struct skc_runtime          * const runtime,
113                           struct skc_extent_phrw_pdrw * const extent)
114 {
115   cl(ReleaseMemObject(extent->drw));
116 }
117 
118 void *
skc_extent_phrw_pdrw_map_size(struct skc_extent_phrw_pdrw * const extent,size_t const size,cl_command_queue const cq,cl_event * const event)119 skc_extent_phrw_pdrw_map_size(struct skc_extent_phrw_pdrw * const extent,
120                               size_t                        const size,
121                               cl_command_queue              const cq,
122                               cl_event                    * const event)
123 {
124   cl_int cl_err;
125 
126   void * hrw = clEnqueueMapBuffer(cq,extent->drw,
127                                   CL_FALSE,
128                                   CL_MAP_READ | CL_MAP_WRITE,0,size,
129                                   0,NULL,event,&cl_err); cl_ok(cl_err);
130 
131   return hrw;
132 }
133 
134 void *
skc_extent_phrw_pdrw_map(struct skc_extent_phrw_pdrw * const extent,cl_command_queue const cq,cl_event * const event)135 skc_extent_phrw_pdrw_map(struct skc_extent_phrw_pdrw * const extent,
136                          cl_command_queue              const cq,
137                          cl_event                    * const event)
138 {
139   return skc_extent_phrw_pdrw_map_size(extent,extent->size,cq,event);
140 }
141 
142 void
skc_extent_phrw_pdrw_unmap(struct skc_extent_phrw_pdrw * const extent,void * const hrw,cl_command_queue const cq,cl_event * const event)143 skc_extent_phrw_pdrw_unmap(struct skc_extent_phrw_pdrw * const extent,
144                            void                        * const hrw,
145                            cl_command_queue              const cq,
146                            cl_event                    * const event)
147 {
148   cl(EnqueueUnmapMemObject(cq,extent->drw,hrw,0,NULL,event));
149 }
150 
151 //
152 // DURABLE MAPPING
153 //
154 // ENTIRE EXTENT   MAPPED TO R/O   HOST MEMORY
155 // ENTIRE EXTENT UNMAPPED TO W/O DEVICE MEMORY
156 //
157 // Note: integrated vs. discrete GPUs will have different
158 // implementations because we don't want a GPU kernel repeatedly
159 // accessing pinned memory.
160 //
161 
162 void
skc_extent_phrN_pdwN_alloc(struct skc_runtime * const runtime,struct skc_extent_phrN_pdwN * const extent,size_t const size)163 skc_extent_phrN_pdwN_alloc(struct skc_runtime          * const runtime,
164                            struct skc_extent_phrN_pdwN * const extent,
165                            size_t                        const size)
166 {
167   cl_int cl_err;
168 
169   extent->size = size;
170   extent->dwN  = clCreateBuffer(runtime->cl.context,
171                                 CL_MEM_WRITE_ONLY | CL_MEM_ALLOC_HOST_PTR,
172                                 size,NULL,&cl_err); cl_ok(cl_err);
173 }
174 
175 void
skc_extent_phrN_pdwN_free(struct skc_runtime * const runtime,struct skc_extent_phrN_pdwN * const extent)176 skc_extent_phrN_pdwN_free(struct skc_runtime          * const runtime,
177                           struct skc_extent_phrN_pdwN * const extent)
178 {
179   cl(ReleaseMemObject(extent->dwN));
180 }
181 
182 void *
skc_extent_phrN_pdwN_map_size(struct skc_extent_phrN_pdwN * const extent,size_t const size,cl_command_queue const cq,cl_event * const event)183 skc_extent_phrN_pdwN_map_size(struct skc_extent_phrN_pdwN * const extent,
184                               size_t                        const size,
185                               cl_command_queue              const cq,
186                               cl_event                    * const event)
187 {
188   cl_int cl_err;
189 
190   void * hrN = clEnqueueMapBuffer(cq,extent->dwN,
191                                   CL_FALSE,
192                                   CL_MAP_READ,0,size,
193                                   0,NULL,event,&cl_err); cl_ok(cl_err);
194 
195   return hrN;
196 }
197 
198 void *
skc_extent_phrN_pdwN_map(struct skc_extent_phrN_pdwN * const extent,cl_command_queue const cq,cl_event * const event)199 skc_extent_phrN_pdwN_map(struct skc_extent_phrN_pdwN * const extent,
200                          cl_command_queue              const cq,
201                          cl_event                    * const event)
202 {
203   return skc_extent_phrN_pdwN_map_size(extent,extent->size,cq,event);
204 }
205 
206 void
skc_extent_phrN_pdwN_unmap(struct skc_extent_phrN_pdwN * const extent,void * const hrN,cl_command_queue const cq,cl_event * const event)207 skc_extent_phrN_pdwN_unmap(struct skc_extent_phrN_pdwN * const extent,
208                            void                        * const hrN,
209                            cl_command_queue              const cq,
210                            cl_event                    * const event)
211 {
212   cl(EnqueueUnmapMemObject(cq,extent->dwN,hrN,0,NULL,event));
213 }
214 
215 //
216 // DURABLE MAPPING
217 //
218 // ENTIRE EXTENT   MAPPED TO W/O   HOST MEMORY
219 // ENTIRE EXTENT UNMAPPED TO R/O DEVICE MEMORY
220 //
221 // Note: integrated vs. discrete GPUs will have different
222 // implementations because we don't want a GPU kernel repeatedly
223 // accessing pinned memory.
224 //
225 
226 void
skc_extent_phwN_pdrN_alloc(struct skc_runtime * const runtime,struct skc_extent_phwN_pdrN * const extent,size_t const size)227 skc_extent_phwN_pdrN_alloc(struct skc_runtime          * const runtime,
228                            struct skc_extent_phwN_pdrN * const extent,
229                            size_t                        const size)
230 {
231   cl_int cl_err;
232 
233   extent->size = size;
234   extent->drN  = clCreateBuffer(runtime->cl.context,
235                                 CL_MEM_READ_ONLY | CL_MEM_ALLOC_HOST_PTR,
236                                 size,NULL,&cl_err); cl_ok(cl_err);
237 }
238 
239 void
skc_extent_phwN_pdrN_free(struct skc_runtime * const runtime,struct skc_extent_phwN_pdrN * const extent)240 skc_extent_phwN_pdrN_free(struct skc_runtime          * const runtime,
241                           struct skc_extent_phwN_pdrN * const extent)
242 {
243   cl(ReleaseMemObject(extent->drN));
244 }
245 
246 void *
skc_extent_phwN_pdrN_map_size(struct skc_extent_phwN_pdrN * const extent,size_t const size,cl_command_queue const cq,cl_event * const event)247 skc_extent_phwN_pdrN_map_size(struct skc_extent_phwN_pdrN * const extent,
248                               size_t                        const size,
249                               cl_command_queue              const cq,
250                               cl_event                    * const event)
251 {
252   cl_int cl_err;
253 
254   void * hwN = clEnqueueMapBuffer(cq,extent->drN,
255                                   CL_FALSE,
256                                   CL_MAP_WRITE,0,size,
257                                   0,NULL,event,&cl_err); cl_ok(cl_err);
258 
259   return hwN;
260 }
261 
262 void *
skc_extent_phwN_pdrN_map(struct skc_extent_phwN_pdrN * const extent,cl_command_queue const cq,cl_event * const event)263 skc_extent_phwN_pdrN_map(struct skc_extent_phwN_pdrN * const extent,
264                          cl_command_queue              const cq,
265                          cl_event                    * const event)
266 {
267   return skc_extent_phwN_pdrN_map_size(extent,extent->size,cq,event);
268 }
269 
270 void
skc_extent_phwN_pdrN_unmap(struct skc_extent_phwN_pdrN * const extent,void * const hwN,cl_command_queue const cq,cl_event * const event)271 skc_extent_phwN_pdrN_unmap(struct skc_extent_phwN_pdrN * const extent,
272                            void                        * const hwN,
273                            cl_command_queue              const cq,
274                            cl_event                    * const event)
275 {
276   cl(EnqueueUnmapMemObject(cq,extent->drN,hwN,0,NULL,event));
277 }
278 
279 //
280 //
281 //
282