| /external/llvm-project/llvm/test/MC/AArch64/SVE2/ |
| D | sqdmulh-diagnostics.s | 7 sqdmulh z0.h, z1.h, z8.h[0] label
12 sqdmulh z0.s, z1.s, z8.s[0] label
17 sqdmulh z0.d, z1.d, z16.d[0] label
26 sqdmulh z0.h, z1.h, z2.h[-1] label
31 sqdmulh z0.h, z1.h, z2.h[8] label
36 sqdmulh z0.s, z1.s, z2.s[-1] label
41 sqdmulh z0.s, z1.s, z2.s[4] label
46 sqdmulh z0.d, z1.d, z2.d[-1] label
51 sqdmulh z0.d, z1.d, z2.d[2] label
59 sqdmulh z0.b, z1.h, z2.h label
[all …]
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| D | sqdmulh.s | 10 sqdmulh z0.b, z1.b, z2.b label
16 sqdmulh z0.h, z1.h, z2.h label
22 sqdmulh z29.s, z30.s, z31.s label
28 sqdmulh z31.d, z31.d, z31.d label
34 sqdmulh z0.h, z1.h, z7.h[7] label
40 sqdmulh z0.s, z1.s, z7.s[3] label
46 sqdmulh z0.d, z1.d, z15.d[1] label
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 1560 __ sqdmulh(h17, h27, h12); in GenerateTestSequenceNEON() local
1561 __ sqdmulh(h16, h5, v11.H(), 0); in GenerateTestSequenceNEON() local
1562 __ sqdmulh(s1, s19, s16); in GenerateTestSequenceNEON() local
1563 __ sqdmulh(s1, s16, v2.S(), 0); in GenerateTestSequenceNEON() local
1564 __ sqdmulh(v28.V2S(), v1.V2S(), v8.V2S()); in GenerateTestSequenceNEON() local
1565 __ sqdmulh(v28.V2S(), v8.V2S(), v3.S(), 0); in GenerateTestSequenceNEON() local
1566 __ sqdmulh(v11.V4H(), v25.V4H(), v5.V4H()); in GenerateTestSequenceNEON() local
1567 __ sqdmulh(v30.V4H(), v14.V4H(), v8.H(), 5); in GenerateTestSequenceNEON() local
1568 __ sqdmulh(v25.V4S(), v21.V4S(), v13.V4S()); in GenerateTestSequenceNEON() local
1569 __ sqdmulh(v23.V4S(), v2.V4S(), v10.S(), 3); in GenerateTestSequenceNEON() local
[all …]
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| /external/vixl/src/aarch64/ |
| D | logic-aarch64.cc | 1023 LogicVRegister Simulator::sqdmulh(VectorFormat vform, in sqdmulh() function in vixl::aarch64::Simulator
4073 LogicVRegister Simulator::sqdmulh(VectorFormat vform, in sqdmulh() function in vixl::aarch64::Simulator
|