| /external/llvm-project/llvm/test/MC/AArch64/SVE/ |
| D | uzp2-diagnostics.s | 4 uzp2 z6.h, z23.h, z31.x label
10 uzp2 z0.h, z30.h, z24.b label
16 uzp2 z1.h, z2.h label
22 uzp2 z1.s, z2.s, z32.s label
28 uzp2 p1.s, p2.s, p16.s label
34 uzp2 z1.s, z2.s, p3.s label
40 uzp2 p1.s, p2.s, z3.s label
50 uzp2 z31.d, z31.d, z31.d label
56 uzp2 z31.d, z31.d, z31.d label
|
| D | uzp2.s | 10 uzp2 z31.b, z31.b, z31.b label
16 uzp2 z31.h, z31.h, z31.h label
22 uzp2 z31.s, z31.s, z31.s label
28 uzp2 z31.d, z31.d, z31.d label
34 uzp2 p15.b, p15.b, p15.b label
40 uzp2 p15.s, p15.s, p15.s label
46 uzp2 p15.h, p15.h, p15.h label
52 uzp2 p15.d, p15.d, p15.d label
|
| D | matrix-multiply-fp64.s | 261 uzp2 z0.q, z1.q, z2.q label
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 2485 __ uzp2(v8.V16B(), v18.V16B(), v26.V16B()); in GenerateTestSequenceNEON() local
2486 __ uzp2(v21.V2D(), v22.V2D(), v24.V2D()); in GenerateTestSequenceNEON() local
2487 __ uzp2(v20.V2S(), v21.V2S(), v2.V2S()); in GenerateTestSequenceNEON() local
2488 __ uzp2(v16.V4H(), v31.V4H(), v6.V4H()); in GenerateTestSequenceNEON() local
2489 __ uzp2(v25.V4S(), v11.V4S(), v8.V4S()); in GenerateTestSequenceNEON() local
2490 __ uzp2(v31.V8B(), v31.V8B(), v13.V8B()); in GenerateTestSequenceNEON() local
2491 __ uzp2(v8.V8H(), v17.V8H(), v1.V8H()); in GenerateTestSequenceNEON() local
|
| /external/vixl/src/aarch64/ |
| D | assembler-sve-aarch64.cc | 5425 void Assembler::uzp2(const PRegisterWithLaneSize& pd, in uzp2() function in vixl::aarch64::Assembler
5526 void Assembler::uzp2(const ZRegister& zd, in uzp2() function in vixl::aarch64::Assembler
|
| D | assembler-aarch64.cc | 4866 void Assembler::uzp2(const VRegister& vd, in uzp2() function in vixl::aarch64::Assembler
|
| D | logic-aarch64.cc | 4268 LogicVRegister Simulator::uzp2(VectorFormat vform, in uzp2() function in vixl::aarch64::Simulator
|